Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a series of sensing operations respectively corresponding to a plurality of sensing voltages, wherein a sensing voltage of a specific sensing operation of the series of sensing operations has a sensing voltage determined according to a result of an initial sensing operation of the series of sensing operations; determining a threshold voltage of the Flash cell according to at least a digital value generated by the series of sensing operations; and using the determined threshold voltage to perform soft decoding of the Flash cell.

Abstract: A graphics card assembly includes a mounting cage, two riser cards and two graphics cards. The mounting cage has two accommodation spaces arranged side by side horizontally. The two riser cards are disposed on the mounting cage and are located in the two accommodation spaces, respectively. The two graphics cards are located in the two accommodation spaces and are detachably inserted into the two riser cards, respectively.

Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.

Abstract: A riser card module includes a frame assembly, two first riser card assemblies and two second riser card assemblies. The frame assembly includes a mount component, a first frame and a second frame. The first frame and the second frame are fixed to the mount component, the first frame has two first installation slots, and the second frame has two second installation slots. The first riser card assemblies each includes a first circuit board and a first cable connected to each other. The two first circuit boards are respectively mounted into the two first installation slots. The second riser card assemblies each includes a second circuit board and a second cable connected to each other. The two second circuit boards are respectively mounted into the two second installation slots, and colors of the two second cables are different from colors of the two first cables.

Abstract: An expansion frame includes a main body, a cable gathering component fixed to the main body and having a cable management space, two mount cages, a cable organizer including a mount part and a cable organization part connected to each other, four circuit boards, and four connection cables. The mount cages are located on a side of the cable gathering component. The mount part is located between the mount cages. The cable organization part extends from the mount part towards the cable gathering component and has a cable gathering hole connected to the cable management space. Two of the circuit boards are disposed on one of the mount cages, and other two of the circuit boards are disposed on the other of the mount cages. The connection cables are connected to the circuit boards, disposed through the cable gathering hole and extend into the cable management space.

Abstract: A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.

Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.

Abstract: An expansion frame includes a main body, a cable gathering component fixed to the main body and having a cable management space, two mount cages, a cable organizer including a mount part and a cable organization part connected to each other, four circuit boards, and four connection cables. The mount cages are located on a side of the cable gathering component. The mount part is located between the mount cages. The cable organization part extends from the mount part towards the cable gathering component and has a cable gathering hole connected to the cable management space. Two of the circuit boards are disposed on one of the mount cages, and other two of the circuit boards are disposed on the other of the mount cages. The connection cables are connected to the circuit boards, disposed through the cable gathering hole and extend into the cable management space.

Abstract: A graphics card assembly includes a mounting cage, two riser cards and two graphics cards. The mounting cage has two accommodation spaces arranged side by side horizontally. The two riser cards are disposed on the mounting cage and are located in the two accommodation spaces, respectively. The two graphics cards are located in the two accommodation spaces and are detachably inserted into the two riser cards, respectively.

Abstract: A riser card module includes a frame assembly, two first riser card assemblies and two second riser card assemblies. The frame assembly includes a mount component, a first frame and a second frame. The first frame and the second frame are fixed to the mount component, the first frame has two first installation slots, and the second frame has two second installation slots. The first riser card assemblies each includes a first circuit board and a first cable connected to each other. The two first circuit boards are respectively mounted into the two first installation slots. The second riser card assemblies each includes a second circuit board and a second cable connected to each other. The two second circuit boards are respectively mounted into the two second installation slots, and colors of the two second cables are different from colors of the two first cables.

Abstract: A server including a chassis, a motherboard, a graphic processing assembly and a storage assembly. The chassis includes a bottom plate and two side plates that together form an accommodation space. The two side plates are connected to two opposite sides of the bottom plate, respectively. The bottom plate has a front edge and a rear edge that are opposite to each other. The motherboard is disposed in the accommodation space. The graphic processing assembly is electrically connected to the motherboard and disposed in the accommodation space. The storage assembly is electrically connected to the motherboard and disposed in the accommodation space. The graphic processing assembly and the storage assembly are located closer to the front edge than the motherboard.

Abstract: A disk drive assembly includes a mounting cage, at least one disk drive, a first assembly structure and a second assembly structure. The mounting cage has a front side, a back side and at least one installation space. The back side is opposite to the front side, and the at least one installation space extends from the front side to the back side. The at least one disk drive is mounted in the at least one installation space. The first assembly structure and the second assembly structure are located adjacent to the front side and the back side of the mounting cage, respectively.

Abstract: A circuit structure includes a low-density conductive structure, a high-density conductive structure and a plurality of traces. The high-density conductive structure is disposed over the low-density conductive structure, and defines an opening extending from a top surface of the high-density conductive structure to a bottom surface of the high-density conductive structure. The opening exposes a first pad of the low-density conductive structure and a second pad of the low-density conductive structure. The second pad is spaced apart from the first pad. The traces extend from the top surface of the high-density conductive structure into the opening. The traces include a first trace connecting to the first pad of the low-density conductive structure and a second trace connecting to the second pad of the low-density conductive structure.

Abstract: A semiconductor device is provided. The semiconductor device includes a first optical transceiver, a second optical transceiver and a component. The component is configured to provide a magnetic field to change a light emitting direction from the first optical transceiver to the second optical transceiver or from the second optical transceiver to the first optical transceiver.

Abstract: A semiconductor device package includes a substrate; an electronic component disposed on the substrate; multiple supporting structures disposed on the substrate; and a reinforced structure disposed on the supporting structures and extending in parallel with the substrate.

Abstract: A method of making a semiconductor device includes comparing a thickness profile of a surface of a wafer with a reference value using a control unit. The method further includes transmitting a control signal to an adjustable nozzle based on the comparison of the thickness profile and the reference value. The method further includes rotating the adjustable nozzle about a longitudinal axis of the adjustable nozzle in response to the control signal.

Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a series of sensing operations respectively corresponding to a plurality of sensing voltages, wherein a sensing voltage of a specific sensing operation of the series of sensing operations has a sensing voltage determined according to a result of an initial sensing operation of the series of sensing operations; determining a threshold voltage of the Flash cell according to at least a digital value generated by the series of sensing operations; and using the determined threshold voltage to perform soft decoding of the Flash cell.

Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a plurality of sensing operations respectively corresponding to a plurality of sensing voltages to generate a first digital value and a second digital value of the Flash cell, the second digital value representing at least one candidate threshold voltage of the Flash cell; determining a threshold voltage of the Flash cell according to whether the at least one candidate threshold voltage is high or low; determining soft information of a bit stored in the Flash cell according to the threshold voltage of the Flash cell; and using the soft information to perform soft decoding.

Abstract: A thermal conduction unit includes a conductive via, a periphery conductor and an isolation material. The conductive via includes a first thermoelectric material. The periphery conductor encloses the conductive via and includes a second thermoelectric material. An end of the periphery conductor is electrically connected to an end of the conductive via. The isolation material is interposed between the conductive via and the periphery conductor.

Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.