Patents by Inventor Wen-Shan Wang

Wen-Shan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961939
    Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a top surface; forming a precursor layer on the top surface; removing a portion of the precursor layer and a portion of the substrate from the top surface to form a base portion and a plurality of protrusions regularly arranged on the base portion; forming a buffer layer on the base portion and the plurality protrusions; and forming a III-V compound cap layer on the buffer layer; wherein one of the plurality of protrusions comprises a first portion and a second portion formed on the first portion; wherein the first portion is integrated with the base portion and has a first material which is the same as that of the base portion; and wherein the buffer layer contacts side surfaces of the plurality of protrusions and a surface of the base portion.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: April 16, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Peng Ren Chen, Yu-Shan Chiu, Wen-Hsiang Lin, Shih-Wei Wang, Chen Ou
  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Publication number: 20240090190
    Abstract: A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction substantially perpendicular to the first direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and each of the gate structures extending at least unilaterally substantially beyond a first side of the corresponding first or second active region that is proximal to the gap or a second side of the corresponding first or second active region that is distal to the gap; and some but not all of the gate structures also extending bilaterally substantially beyond each of the first and second sides of the corresponding first or second active region.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Jen CHEN, Wen-Hsi LEE, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG
  • Patent number: 11705928
    Abstract: A signal predistortion circuit configuration includes a digital predistortion circuit, a first transceiver, a first analog front-end (AFE) circuit, a second transceiver, and a second AFE circuit. The digital predistortion circuit outputs a first transmission signal according to first predistortion parameters and outputs a second transmission signal according to second predistortion parameters, and the digital predistortion circuit determines whether to adjust the first predistortion parameters according to a first reception signal and determines whether to adjust the second predistortion parameters according to a second reception signal. A transmitting circuit of the first transceiver, the first AFE circuit, and a receiving circuit of the second transceiver jointly generates the first reception signal according to the first transmission signal.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: July 18, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Wen-Shan Wang, Ming-Chun Hsu
  • Patent number: 11671060
    Abstract: The present invention discloses a power amplification apparatus having a digital pre-distortion mechanism that includes a digital pre-distortion circuit and a power amplifier. The digital pre-distortion circuit receives an original digital signal having an original real part and an original imaginary part. When a first one and a second one of the original real part and the original imaginary part are a low state voltage level and a high state voltage level, the digital pre-distortion circuit outputs a first and a second voltage levels equivalent to the low state voltage level as a first pre-distortion part and directly outputs the second one of the original real part and the original imaginary part as a second pre-distortion part to generate an input signal having an input real part and an input imaginary part each corresponding to one of the first pre-distortion part and the second pre-distortion part. The power amplifier receives the input signal to perform power amplification to generate an output signal.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: June 6, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hang Liu, Wen-Shan Wang, Chien-I Chou, Kiat-Seng Yeo
  • Publication number: 20220286152
    Abstract: A signal predistortion circuit configuration includes a digital predistortion circuit, a first transceiver, a first analog front-end (APE) circuit, a second transceiver, and a second AFE circuit. The digital predistortion circuit outputs a first transmission signal according to first predistortion parameters and outputs a second transmission signal according to second predistortion parameters, and the digital predistortion circuit determines whether to adjust the first predistortion parameters according to a first reception signal and determines whether to adjust the second predistortion parameters according to a second reception signal. A transmitting circuit of the first transceiver, the first AFE circuit, and a receiving circuit of the second transceiver jointly generates the first reception signal according to the first transmission signal.
    Type: Application
    Filed: February 18, 2022
    Publication date: September 8, 2022
    Inventors: WEN-SHAN WANG, MING-CHUN HSU
  • Publication number: 20220060154
    Abstract: The present invention discloses a power amplification apparatus having a digital pre-distortion mechanism that includes a digital pre-distortion circuit and a power amplifier. The digital pre-distortion circuit receives an original digital signal having an original real part and an original imaginary part. When a first one and a second one of the original real part and the original imaginary part are a low state voltage level and a high state voltage level, the digital pre-distortion circuit outputs a first and a second voltage levels equivalent to the low state voltage level as a first pre-distortion part and directly outputs the second one of the original real part and the original imaginary part as a second pre-distortion part to generate an input signal having an input real part and an input imaginary part each corresponding to one of the first pre-distortion part and the second pre-distortion part. The power amplifier receives the input signal to perform power amplification to generate an output signal.
    Type: Application
    Filed: April 8, 2021
    Publication date: February 24, 2022
    Inventors: HANG LIU, WEN-SHAN WANG, CHIEN-I CHOU, KIAT-SENG YEO
  • Patent number: 11152964
    Abstract: A transmitter device includes a transmitter including a first oscillator circuitry, a signal processing circuitry, and a calibration circuitry, and a second oscillator circuitry. The first oscillator circuitry is configured to output a first oscillating signal. The signal processing circuitry is configured to mix calibration signals according to the first oscillating signal, in order to emit a first output signal. The calibration circuitry is configured to detect a power of the first output signal to generate coefficients, and generate the calibration signals according to the coefficients, an in-phase data signal, and a quadrature data signal. The second oscillator circuitry is disposed adjacent to the transmitter, and is configured to output a second oscillating signal. The calibration signals are configured to reduce a pulling generated by both of the first output signal and the second oscillating signal to the first oscillator circuitry.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: October 19, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Wen-Shan Wang, Yuan-Shuo Chang
  • Patent number: 11115260
    Abstract: A signal compensation device is disclosed. The signal compensation device includes an operation circuit and a modulation circuit. The operation circuit is configured to generate a control signal according to a first data signal and a second data signal, in which the second data signal is generated according to the first data signal by a signal conversion circuit. The modulation circuit is configured to provide a loop gain according to the control signal to compensate an attenuation of the signal conversion circuit.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: September 7, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Wen-Shan Wang
  • Publication number: 20210200168
    Abstract: The present invention provides a time series prediction method, wherein the time series prediction method includes the steps of: inputting a time series into a plurality of models to generate a plurality of predicted time series, respectively; using the plurality of models to calculate a plurality of uncertainty parameters, wherein the plurality of uncertainty parameters correspond to the plurality of predicted time series, respectively; determining a weight of each predicted time series according to the plurality of uncertainty parameters; and referring to the weight of each predicted time series to perform a weighting operation upon the plurality of predicted time series to generate a final predicted time series.
    Type: Application
    Filed: December 29, 2020
    Publication date: July 1, 2021
    Inventors: Wen-Shan Wang, Kuang-Yen Li
  • Patent number: 10938618
    Abstract: Disclosed is a device capable of compensating for amplitude-modulation to phase-modulation distortion. The device includes a transmitter and a controller. The transmitter includes an amplifier circuit, a phase-shift adjustment circuit, and an output circuit. The amplifier circuit is configured to output an amplified signal according to an input signal. The phase-shift adjustment circuit, set between the amplifier circuit and the output circuit, includes at least one of an adjustable capacitor and an adjustable inductor and is configured to adjust the phase shift of the amplified signal according to a control signal. The output circuit is configured to output an output signal according to the amplified signal. The controller is configured to generate the control signal according to the input signal, in which the control signal varies with the input signal.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 2, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Wen-Shan Wang
  • Patent number: 10856405
    Abstract: A 3D electromagnetic bandgap circuit includes: a dielectric layer having a first surface and an opposing second surface; a spiral element positioned on the first surface; a first surrounding element positioned on the first surface and surrounding the spiral element, but does not touch with the spiral element; a plane element positioned on the second surface and including a notch; a second surrounding element positioned on the second surface and surrounding the plane element, but does not touch with the plane element, wherein the second surrounding element further includes a protruding portion extending toward the notch; a first via passing through the dielectric layer, the spiral element, and the protruding portion; a second via passing through the dielectric layer, the plane element, and the first surrounding element; and a third via passing through the dielectric layer, the plane element, and the first surrounding element.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: December 1, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yu-Cong Wang, Ruey-Beei Wu, Shih-Hung Wang, Wen-Shan Wang
  • Publication number: 20200358465
    Abstract: A transmitter device includes a transmitter including a first oscillator circuitry, a signal processing circuitry, and a calibration circuitry, and a second oscillator circuitry. The first oscillator circuitry is configured to output a first oscillating signal. The signal processing circuitry is configured to mix calibration signals according to the first oscillating signal, in order to emit a first output signal. The calibration circuitry is configured to detect a power of the first output signal to generate coefficients, and generate the calibration signals according to the coefficients, an in-phase data signal, and a quadrature data signal. The second oscillator circuitry is disposed adjacent to the transmitter, and is configured to output a second oscillating signal. The calibration signals are configured to reduce a pulling generated by both of the first output signal and the second oscillating signal to the first oscillator circuitry.
    Type: Application
    Filed: April 27, 2020
    Publication date: November 12, 2020
    Inventors: Wen-Shan WANG, Yuan-Shuo CHANG
  • Publication number: 20200344108
    Abstract: A signal compensation device is disclosed. The signal compensation device includes an operation circuit and a modulation circuit. The operation circuit is configured to generate a control signal according to a first data signal and a second data signal, in which the second data signal is generated according to the first data signal by a signal conversion circuit. The modulation circuit is configured to provide a loop gain according to the control signal to compensate an attenuation of the signal conversion circuit.
    Type: Application
    Filed: November 4, 2019
    Publication date: October 29, 2020
    Inventor: Wen-Shan WANG
  • Publication number: 20200267875
    Abstract: An electronic apparatus having noise suppression mechanism is provided that includes a circuit board, a wireless communication circuit, a digital signal generation circuit, a metal shield and a grounding metal pillar. The wireless communication circuit is disposed on a chip disposing area of the circuit board and performs wireless communication within a wireless signal frequency range. The digital signal generation circuit is disposed on the chip disposing area and generates a digital signal transmitted through a transmission path within the chip disposing area. The metal shield is coupled to the circuit board to cover the chip disposing area. The grounding metal pillar is disposed on the chip disposing area of the circuit board. The grounding metal pillar extends for contacting the metal shield and increases a resonant frequency of the metal shield.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 20, 2020
    Inventors: Hao-Wei CHAN, Ruey-Beei WU, Shih-Hung WANG, Wen-Shan WANG
  • Publication number: 20200195489
    Abstract: Disclosed is a device capable of compensating for amplitude-modulation to phase-modulation distortion. The device includes a transmitter and a controller. The transmitter includes an amplifier circuit, a phase-shift adjustment circuit, and an output circuit. The amplifier circuit is configured to output an amplified signal according to an input signal. The phase-shift adjustment circuit, set between the amplifier circuit and the output circuit, includes at least one of an adjustable capacitor and an adjustable inductor and is configured to adjust the phase shift of the amplified signal according to a control signal. The output circuit is configured to output an output signal according to the amplified signal. The controller is configured to generate the control signal according to the input signal, in which the control signal varies with the input signal.
    Type: Application
    Filed: November 13, 2019
    Publication date: June 18, 2020
    Inventor: WEN-SHAN WANG
  • Publication number: 20190357349
    Abstract: A 3D electromagnetic bandgap circuit includes: a dielectric layer having a first surface and an opposing second surface; a spiral element positioned on the first surface; a first surrounding element positioned on the first surface and surrounding the spiral element, but does not touch with the spiral element; a plane element positioned on the second surface and including a notch; a second surrounding element positioned on the second surface and surrounding the plane element, but does not touch with the plane element, wherein the second surrounding element further includes a protruding portion extending toward the notch; a first via passing through the dielectric layer, the spiral element, and the protruding portion; a second via passing through the dielectric layer, the plane element, and the first surrounding element; and a third via passing through the dielectric layer, the plane element, and the first surrounding element.
    Type: Application
    Filed: May 15, 2019
    Publication date: November 21, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yu-Cong WANG, Ruey-Beei WU, Shih-Hung WANG, Wen-Shan WANG
  • Patent number: 10382232
    Abstract: A memory controller adjusts impedance matching of an output terminal and outputs a control signal that controls a memory through the output terminal. The memory controller includes a first driving and impedance matching circuit, a second driving and impedance matching circuit, and a logic circuit. The logic circuit, which is coupled to the first driving and impedance matching circuit and the second driving and impedance matching circuit, sets a first impedance and a first driving capability of the first driving and impedance matching circuit, sets a second impedance and a second driving capability of the second driving and impedance matching circuit, and enables the first driving and impedance matching circuit to cause the control signal to have a first level or enables the second driving and impedance matching circuit to cause the control signal to have a second level different from the first level.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: August 13, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Hung Wang, Shen-Kuo Huang, Gerchih Chou, Wen-Shan Wang
  • Patent number: 10374643
    Abstract: A transmitter with compensating mechanism of pulling effect includes an output unit and a correction unit. The output unit mixes a first correction signal and a second correction signal according to an oscillating signal to generate a modulated signal, and to amplify the modulated signal to generate a first output signal. The correction unit analyzes the power of the first output signal to generate a first coefficient and a second coefficient, and generate the first correction signal and the second correction signal according to the first coefficient, the second coefficient, an in-phase data signal, and a quadrature data signal.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: August 6, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Wen-Shan Wang, Yuan-Shuo Chang, Chih-Chieh Wang
  • Patent number: 10305523
    Abstract: A transmitting device, for handling signal interference, comprises a first transmitting circuit, for processing a first plurality of baseband signals, to generate a first plurality of radio frequency signals; a second transmitting circuit, for processing a second plurality of baseband signals and a plurality of input signals, to generate a second plurality of radio frequency signals; a feedback circuit, coupled to the second transmitting circuit, for processing the second plurality of radio frequency signals and a plurality of leakage signals, to generate a plurality of error signals; and a control circuit, coupled to the first transmitting circuit, the second transmitting circuit and the feedback circuit, for generating the plurality of input signals according to the first plurality of baseband signals and the plurality of error signals.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: May 28, 2019
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chin-Liang Wang, Min-Chau Jan, Wen-Shan Wang, Yuan-Shuo Chang, Wu-Chi Wang, Ying-Hsi Lin