Patents by Inventor Wen-Shan Wang

Wen-Shan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10211931
    Abstract: A method of interference cancellation includes the following steps: performing a take-energy operation on a to-be-sent signal at multiple times to generate multiple to-be-sent signal powers; performing a first high-pass operation on the to-be-sent signal powers to generate a to-be-sent high-pass result; performing a second high-pass operation on a received signal to generate a received high-pass result; adjusting multiple filter coefficients according to the to-be-sent high-pass result and the received high-pass result; and generating a recover signal according to the filter coefficients.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: February 19, 2019
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chin-Liang Wang, Kuan-Kai Chen, Min-Chau Jan, Wen-Shan Wang, Yuan-Shuo Chang, Ying-Hsi Lin
  • Patent number: 9955586
    Abstract: A Ball Grid Array (BGA) formed on printed circuit board is provided. The BGA comprises a first solder ball module and a second solder ball module. The first solder ball module comprises a plurality of first solder balls, wherein one of the first solder balls is grounded for shielding two other first solder balls, and one of the first solder balls is floating. The second solder ball module comprises a plurality of second solder balls, wherein two of the second solder balls are grounded and one of the two grounded second solder balls penetrates the printed circuit board through a plated through hole formed on the printed circuit board for shielding two first solder balls among the first solder balls.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: April 24, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ting-Ying Wu, Cheng-Lin Wu, Chin-Yuan Lo, Wen-Shan Wang
  • Patent number: 9948280
    Abstract: Disclosed is a two-capacitor-based filter design method comprising: determining a frequency f1 and a fractional bandwidth ratio FBW; selecting a first and a second capacitors according to f1 and FBW, in which a resonant frequency fC1 of the first capacitor is equal to f1×(1?N×FBW), a resonant frequency fC2 of the second capacitor is equal to f1×(1+M×FBW), and each of N and M is a positive number less than one; and determining a length of a first transmission line according to fC1 and a signal speed, and determining a length of a second transmission line according to fC2 and the signal speed. The first capacitor is coupled between a center of the first transmission line and ground, the second capacitor is coupled between a center of the second transmission line and ground, and the first and second transmission lines are connected in series.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 17, 2018
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Po-Chun Chen, Ruey-Beei Wu, Ting-Ying Wu, Wen-Shan Wang, Gerchih Chou
  • Publication number: 20170194990
    Abstract: A transmitter with compensating mechanism of pulling effect includes an output unit and a correction unit. The output unit mixes a first correction signal and a second correction signal according to an oscillating signal to generate a modulated signal, and to amplify the modulated signal to generate a first output signal. The correction unit analyzes the power of the first output signal to generate a first coefficient and a second coefficient, and generate the first correction signal and the second correction signal according to the first coefficient, the second coefficient, an in-phase data signal, and a quadrature data signal.
    Type: Application
    Filed: December 26, 2016
    Publication date: July 6, 2017
    Inventors: Wen-Shan WANG, Yuan-Shuo CHANG, Chih-Chieh WANG
  • Patent number: 9269674
    Abstract: The present invention discloses an integrated circuit having electromagnetic shielding capability and the manufacturing method thereof. An embodiment of the said integrated circuit comprises: a semiconductor circuit structure including a first surface which covers an electromagnetic radiation area; an electromagnetic shielding layer covering the first surface and including at least one contact; and at least one conducting path operable to electrically connect the at least one contact with a steady voltage and thereby shield off the electromagnetic wave from the electromagnetic radiation area, wherein the current running through the electromagnetic shielding layer is zero or less than the maximum current running through the electromagnetic radiation area.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: February 23, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chao-Cheng Lee, Wen-Shan Wang
  • Publication number: 20160021745
    Abstract: A Ball Grid Array (BGA) formed on printed circuit board is provided. The BGA comprises a first solder ball module and a second solder ball module. The first solder ball module comprises a plurality of first solder balls, wherein one of the first solder balls is grounded for shielding two other first solder balls, and one of the first solder balls is floating. The second solder ball module comprises a plurality of second solder balls, wherein two of the second solder balls are grounded and one of the two grounded second solder balls penetrates the printed circuit board through a plated through hole formed on the printed circuit board for shielding two first solder balls among the first solder balls.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 21, 2016
    Inventors: TING-YING WU, CHENG-LIN WU, CHIN-YUAN LO, WEN-SHAN WANG
  • Publication number: 20150364429
    Abstract: The present invention discloses an integrated circuit having electromagnetic shielding capability and the manufacturing method thereof. An embodiment of the said integrated circuit comprises: a semiconductor circuit structure including a first surface which covers an electromagnetic radiation area; an electromagnetic shielding layer covering the first surface and including at least one contact; and at least one conducting path operable to electrically connect the at least one contact with a steady voltage and thereby shield off the electromagnetic wave from the electromagnetic radiation area, wherein the current running through the electromagnetic shielding layer is zero or less than the maximum current running through the electromagnetic radiation area.
    Type: Application
    Filed: June 2, 2015
    Publication date: December 17, 2015
    Inventors: CHAO-CHENG LEE, WEN-SHAN WANG
  • Patent number: 9025658
    Abstract: An embodiment includes a method that includes receiving a number of pixels of video data. The method also includes commencing a first arithmetic operation of a matrix of the number of pixels with a transpose of a constant matrix prior to a first element of the second row being received.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 5, 2015
    Assignee: Intel Corporation
    Inventors: Wen-Shan Wang, Hyung-Suk Kim
  • Patent number: 8989279
    Abstract: Encoding or decoding digital video frames in intra-prediction mode by selecting column reference data locations for blocks adjacent a current block from a column reference data buffer storing column reference data samples for no more than two macro blocks of the frame. In some cases, the column reference data buffer may include a storage size for samples of a first column of data of blocks of one macro block of luminance samples. Encoding and decoding may also include selecting row reference data locations for blocks adjacent a current block from a row reference data buffer storing row reference data samples for at least one row of macro blocks of the frame. In some cases, the row reference data buffer may include storage for samples of a first row of data of fourteen successive blocks spanning two rows. The concept can be applied to various video processing components and standards.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: March 24, 2015
    Assignee: Intel Corporation
    Inventor: Wen-Shan Wang
  • Publication number: 20150081929
    Abstract: A control circuit for a peripheral component interconnect express (PCI-E) device includes a power detecting unit and a parameter adjustment unit. The power detecting unit is coupled to a wireless communication transmitter, and arranged to detect a spectrum intensity value of an output spectrum of the wireless communication transmitter. The parameter adjustment unit is coupled to the power detecting unit, and arranged to produce at least one control signal according to the spectrum intensity value and adaptively adjust a parameter setting of the PCI-E device in accordance with the at least one control signal.
    Type: Application
    Filed: February 27, 2014
    Publication date: March 19, 2015
    Applicant: Realtek Semiconductor Corp.
    Inventors: Wen-Shan Wang, Shih-Hung Wang
  • Patent number: 8922292
    Abstract: A device for compensating impedance and gain of a transmission interface is provided. The device includes a correcting and compensating unit, a clock data recovering unit, a decoder, a calculating unit, and an adaptive control unit. The correcting and compensating unit is used to receive a channel signal, and compensate the channel signal according to a control signal to generate a compensation signal. The clock data recovering unit is used to receive the compensation signal and generate a data signal. The decoder is used to decode the data signal and perform detection to generate error information and correct information. The calculating unit is used to count times of generating the error information and times of generating the correct information to accordingly generate reference data. The adaptive control unit is used to receive the reference data and perform calculation to generate the control signal.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: December 30, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventor: Wen-Shan Wang
  • Patent number: 8831550
    Abstract: Filter coefficients are generated by testing a wireless communication system using single-tone signals. While using the filter coefficients in a filter module, signal imbalance caused by a local oscillator or analog elements in a wireless communication system can be eliminated, so as to prevent the wireless communication system from being affected by the noises.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: September 9, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yuan-Shuo Chang, Wen-Shan Wang
  • Publication number: 20140018029
    Abstract: Filter coefficients are generated by testing a wireless communication system using single-tone signals. While using the filter coefficients in a filter module, signal imbalance caused by a local oscillator or analog elements in a wireless communication system can be eliminated, so as to prevent the wireless communication system from being affected by the noises.
    Type: Application
    Filed: July 8, 2013
    Publication date: January 16, 2014
    Inventors: Yuan-Shuo Chang, Wen-Shan Wang
  • Patent number: 8614585
    Abstract: An impedance correction device and a method thereof are provided. A step generator is used to generate a step signal and send to a circuit under test. A reflected signal returned back from the circuit under test is used as a measurement signal; and the measurement signal can be measured to obtain a characteristic impedance value. When the measurement signal is greater than the initially measured step signal, an impedance value of a correction resistor is increased; when the measurement signal is smaller than the initially measured step signal, the impedance value of the correction resistor is reduced. Through adjustment of the correction impedance value, impedance matching between the correction impedance value and the characteristic impedance value is achieved.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: December 24, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wen-Shan Wang, Ting-Ying Wu
  • Patent number: 8599049
    Abstract: A dynamic decoding lookup table generation method is provided. The generation method includes: receiving a variable length coding (VLC) table; and dynamically establishing an adaptive decoding lookup table from the VLC table according to a target decoding rate and a free system memory resource.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: December 3, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Shan Wang, Tse-Min Chen
  • Publication number: 20130051465
    Abstract: Encoding or decoding digital video frames in intra-prediction mode by selecting column reference data locations for blocks adjacent a current block from a column reference data buffer storing column reference data samples for no more than two macro blocks of the frame. In some cases, the column reference data buffer may include a storage size for samples of a first column of data of blocks of one macro block of luminance samples. Encoding and decoding may also include selecting row reference data locations for blocks adjacent a current block from a row reference data buffer storing row reference data samples for at least one row of macro blocks of the frame. In some cases, the row reference data buffer may include storage for samples of a first row of data of fourteen successive blocks spanning two rows. The concept can be applied to various video processing components and standards.
    Type: Application
    Filed: October 24, 2012
    Publication date: February 28, 2013
    Inventor: Wen-Shan Wang
  • Patent number: 8320463
    Abstract: Encoding or decoding digital video frames in intra-prediction mode by selecting column reference data locations for blocks adjacent a current block from a column reference data buffer storing column reference data samples for no more than two macro blocks of the frame. In some cases, the column reference data buffer may include a storage size for samples of a first column of data of blocks of one macro block of luminance samples. Encoding and decoding may also include selecting row reference data locations for blocks adjacent a current block from a row reference data buffer storing row reference data samples for at least one row of macro blocks of the frame. In some cases, the row reference data buffer may include storage for samples of a first row of data of fourteen successive blocks spanning two rows. The concept can be applied to various video processing components and standards.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: November 27, 2012
    Assignee: Intel Corporation
    Inventor: Wen-Shan Wang
  • Patent number: 8311124
    Abstract: A decoding method and a decoding apparatus is provided. The decoding apparatus includes a control unit, a lookup unit, an arithmetic unit, a first switch and a second switch. The control unit receives a part of a bin string. The lookup unit finds out a flag, a length and an indicator, corresponding to the part of the bin string, from a lookup table according to the part of the bin string and a node, and judges whether the flag is equal to a predetermined value. The arithmetic unit finds out a syntax element symbol corresponding to the bin string according to a basic syntax element symbol. The first switch connects the control unit to the lookup unit or the arithmetic unit. The second switch outputs the indicator as the basic syntax element symbol to the arithmetic unit or feeds the indicator as a next node back to the lookup unit.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: November 13, 2012
    Assignee: Industrial Technology Research Institute
    Inventor: Wen-Shan Wang
  • Publication number: 20120206214
    Abstract: A device for compensating impedance and gain of a transmission interface is provided. The device includes a correcting and compensating unit, a clock data recovering unit, a decoder, a calculating unit, and an adaptive control unit. The correcting and compensating unit is used to receive a channel signal, and compensate the channel signal according to a control signal to generate a compensation signal. The clock data recovering unit is used to receive the compensation signal and generate a data signal. The decoder is used to decode the data signal and perform detection to generate error information and correct information. The calculating unit is used to count times of generating the error information and times of generating the correct information to accordingly generate reference data. The adaptive control unit is used to receive the reference data and perform calculation to generate the control signal.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 16, 2012
    Inventor: Wen-Shan WANG
  • Publication number: 20120169518
    Abstract: A dynamic decoding lookup table generation method is provided. The generation method includes: receiving a variable length coding (VLC) table; and dynamically establishing an adaptive decoding lookup table from the VLC table according to a target decoding rate and a free system memory resource.
    Type: Application
    Filed: August 26, 2011
    Publication date: July 5, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Shan Wang, Tse-Min Chen