Patents by Inventor Wen Wang

Wen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240249977
    Abstract: A metal adhesion layer may be formed on a bottom and a sidewall of a trench prior to formation of a metal plug in the trench. A plasma may be used to modify the phase composition of the metal adhesion layer to increase adhesion between the metal adhesion layer and the metal plug. In particular, the plasma may cause a shift or transformation of the phase composition of the metal adhesion layer to cause the metal adhesion layer to be composed of a (111) dominant phase. The (111) dominant phase of the metal adhesion layer increases adhesion between the metal adhesion layer.
    Type: Application
    Filed: February 21, 2024
    Publication date: July 25, 2024
    Inventors: Pei-Wen WU, Chun-I TSAI, Chi-Cheng HUNG, Jyh-Cherng SHEU, Yu-Sheng WANG, Ming-Hsing TSAI
  • Publication number: 20240245080
    Abstract: The present invention relates to a food or beverage ingredient produced from enzymatically hydrolysed cereal, a method of producing such an ingredient by contacting a slurry of cereal bran with an enzyme composition comprising xylanase, alpha-amylase, beta-glucanase, cellulase and endoprotease. The invention also relates to a beverage creamer composition comprising the food or beverage ingredient of the invention and a method of producing it.
    Type: Application
    Filed: May 25, 2022
    Publication date: July 25, 2024
    Inventors: EDWIN ANANTA, WEN WANG, KORINA TERRAZAS VELARDE, CHING THENG TAN, SAMANTHA LIEW, SEINN LAE WAING
  • Publication number: 20240251501
    Abstract: A flexible circuit board and a display module are provided. The flexible circuit board includes: a flexible substrate having a chip binding region; a driving chip, arranged in the chip binding region of the flexible substrate; and a protective layer, arranged on a side of the driving chip away from the flexible substrate, where the protective layer includes an electrostatic discharge layer, an orthographic projection of the electrostatic discharge layer on the flexible substrate at least partially overlaps with an orthographic projection of the driving chip on the flexible substrate.
    Type: Application
    Filed: May 23, 2022
    Publication date: July 25, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Jiahua WANG, Hao CHENG, Jianjun WU, Qiang FAN, Xin BI, Jingchang SU, Wen HUANG
  • Patent number: 12048135
    Abstract: A semiconductor structure includes an SRAM cell that includes first and second pull-up (PU) transistors, first and second pull-down (PD) transistors, and first and second pass-gate (PG) transistors. A source, a drain, and a channel of the first PU transistor and a source, a drain, and a channel of the second PU transistor are collinear. A source, a drain, and a channel of the first PD transistor, a source, a drain, and a channel of the second PD transistor, a source, a drain, and a channel of the first PG transistor, and a source, a drain, and a channel of the second PG transistor are collinear.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Hsiu Hsu, Feng-Ming Chang, Kian-Long Lim, Ping-Wei Wang, Lien Jung Hung, Ruey-Wen Chang
  • Patent number: 12044721
    Abstract: A scan chain designing method includes: obtaining test points according to a gate-level netlist; determining integers M and N, wherein M and N are no greater than an amount X of the test points; selecting M and N test points to be a first and second set test points according to a priority; obtaining a first test coverage and a first test pattern count according to the first set test points and obtaining a second test coverage and a second test pattern count according to the second set test points; obtaining a predicted test coverage curve according to the first and second test coverages; determining an optimum amount O according to the predicted test coverage curve, the first and second test pattern counts, wherein O is no greater than X; and selecting O test points to arrange a scan chain according to the priority and the optimum amount O.
    Type: Grant
    Filed: October 25, 2022
    Date of Patent: July 23, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shiou Wen Wang, Yu Yen Yang, Ying-Yen Chen
  • Patent number: 12046510
    Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yip Loh, Chih-Wei Chang, Hong-Mao Lee, Chun-Hsien Huang, Yu-Ming Huang, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Yu-Kai Chen, Yu-Wen Cheng
  • Patent number: 12046596
    Abstract: The invention provides a method for forming a semiconductor structure, which comprises providing a substrate, sequentially a first groove and a second groove are formed in the substrate, the depth of the first groove is different from the depth of the second groove, a first oxide layer is formed in the first groove, a second oxide layer is formed in the second groove, an etching step is performed to remove part of the first oxide layer, a first gate structure is formed on the first oxide layer, and a second gate structure is formed on the second oxide layer.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: July 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Lun Huang, Chia-Ling Wang, Chia-Wen Lu, Ping-Hung Chiang
  • Publication number: 20240241259
    Abstract: A time-of-flight (ToF) three-dimensional (3D) sensing system includes a projector that generates an emitted light corresponding to an emitted signal; a sensor that generates a received signal according to a reflected light; and a decoder that determines a distance between the sensor and the object according to the received signal. The emitted signal associated with the emitted light is generated in a basis period, and the received signal associated with the reflected light is generated by the sensor with a first phase shift with respect to a beginning of the basis period. No emitted light is generated in a supplemental period following the basis period, and the received signal has a second phase shift with respect to a beginning of the supplemental period. The distance between the sensor and the object is determined according to the first phase shift and the second phase shift.
    Type: Application
    Filed: January 18, 2023
    Publication date: July 18, 2024
    Inventors: Hsueh-Tsung Lu, Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen
  • Publication number: 20240243073
    Abstract: A radio-frequency (RF) device includes a main device on a substrate, a first port extending along a first direction adjacent to a first side of the main device, a second port extending along the first direction adjacent to a second side of the main device, a first shield structure adjacent to a third side of the main device, a second shield structure adjacent to a fourth side of the main device, a first connecting structure extending along a second direction to connect the first port and the main device, and a second connecting structure extending along the second direction to connect the second port and the main device.
    Type: Application
    Filed: March 2, 2023
    Publication date: July 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Jinn-Horng Lai, Yan-Zung Wang, Peng-Hsiu Chen, Su-Ming Hsieh
  • Publication number: 20240243004
    Abstract: A semiconductor structure includes a substrate having a first device region and a second device region in proximity to the first device region. A first trench isolation structure is disposed in the substrate between the first device region and the second device region. The first trench isolation structure includes a first bottom surface within the first device region and a second bottom surface within the second device region. The first bottom surface is lower than the second bottom surface. The first trench isolation structure includes a first top surface within the first device region and a second top surface within the second device region. The first top surface is coplanar with the second top surface.
    Type: Application
    Filed: February 13, 2023
    Publication date: July 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ling Wang, Ping-Hung Chiang, Ta-Wei Chiu, Chia-Wen Lu, Wei-Lun Huang, Yueh-Chang Lin
  • Publication number: 20240243938
    Abstract: Presented herein is a stage area for “focused” video that is configured to allow for dynamic layout changes during an online video conference or meeting. By providing a user interface environment that allows a user (meeting participant) to customize the stage, each participant can choose their own view, and the meeting host can fully customize a view for every participant in the meeting.
    Type: Application
    Filed: January 31, 2024
    Publication date: July 18, 2024
    Inventors: Yun Teng, Wen Jiang, Shujun Han, Yiqun Wang, Lin Wang
  • Publication number: 20240244522
    Abstract: A communication method and apparatus for network energy saving. A second device is a requester device of energy saving analysis, and a first device is an execution device of energy saving analysis. The first device receives, from the second device, first information including an energy saving target of a network, and sends an energy saving analysis result corresponding to the energy saving target to the second device. The energy saving target includes at least one of energy consumption reduction and energy efficiency improvement. The energy saving analysis result corresponds to the energy saving target of the network.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 18, 2024
    Inventors: Xietian HUANG, Wen YAN, Yaoguang WANG, Xiaoli SHI
  • Publication number: 20240243114
    Abstract: An electronic package structure includes first and second package modules combined with each other. The first package module includes a substrate and a first electronic component disposed thereon, at least one second electronic component, and an insulation film. The first electronic component and the second electronic component are adjacent to each other. The insulation film includes a base material and a foam glue body, and the foam glue body is viscous and compressible. The second package module includes a heat dissipation plate and a liquid metal and an insulation protrusion portion disposed thereon. The liquid metal is pressed by the heat dissipation plate and the first electronic component. The insulation protrusion portion covers and abuts against the insulation film to press the foam glue body through the base material so as to deform the foam glue body and enable the foam glue body to cover the second electronic component.
    Type: Application
    Filed: January 17, 2024
    Publication date: July 18, 2024
    Applicant: Acer Incorporated
    Inventors: Yu-Ming Lin, Mao-Neng Liao, Cheng-Wen Hsieh, Kuang-Hua Lin, Wei-Chin Chen, Kuan-Lin Chen, Chun-Chieh Wang
  • Patent number: 12040219
    Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chung Huang, Chiung-Wen Hsu, Mei-Ju Kuo, Yu-Ting Weng, Yu-Chi Lin, Ting-Chung Wang, Chao-Cheng Chen
  • Patent number: 12038793
    Abstract: A hinge mechanism is provided, including a connecting unit, a hinge unit, and a locking element. The connecting unit has a connecting member and a tubular member. The tubular member is disposed on the connecting member. The hinge unit has a first member, a second member, a shaft, and a rod. The shaft pivotally connects the first member to the second member. The rod is affixed to the second member. The rod extends into the tubular member and has a slot. The locking element is fastened through the tubular member and joined in the slot.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: July 16, 2024
    Assignee: ACER INCORPORATED
    Inventors: Ting-Wen Pai, Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
  • Patent number: 12037244
    Abstract: In one aspect, the disclosure relates to CO2-free and/or low-CO2 methods of co-producing hydrogen and solid forms of carbon via natural gas decomposition using microwave radiation. The methods are efficient, self-sustaining, and environmentally benign. In a further aspect, the disclosure relates to recyclable and recoverable catalysts useful for enhancing the disclosed methods, wherein the catalysts are supported by solid forms of carbon. Methods for recycling the catalysts are also disclosed. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present disclosure.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: July 16, 2024
    Assignee: West Virginia University Board of Governors on Behalf of West Virginia University
    Inventors: Jianli Hu, Changle Jiang, Brandon Robinson, Xinwei Bai, I-Wen Wang
  • Patent number: 12040379
    Abstract: A device includes a substrate including a low-resistance top surface and a fin structure including a first fin and a second fin. Each of the first and second fins includes a low-resistance fin-top surface and two low-resistance sidewall surfaces. The device includes an insulation material over the top surface of the substrate and between the first fin and the second fin. The fin-top surface and a first portion of the sidewall surfaces of each of the first and the second fins are above the insulation material. The device further includes a dielectric layer over the insulation material and in direct contact with the fin-top surface and the first portion of the sidewall surfaces of each of the first and the second fins; a first electrode in direct contact with the fin-top surface of the first fin; and a second electrode over the dielectric layer that is over the second fin.
    Type: Grant
    Filed: August 7, 2023
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chi-Wen Liu, Chao-Hsiung Wang
  • Patent number: 12038420
    Abstract: The present invention relates to an early warning method before the occurrence of aflatoxin contamination.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: July 16, 2024
    Assignee: OIL CROPS RESEARCH INSTITUTE, CHINESE ACADEMY OF AGRICULTURAL SCIENCES
    Inventors: Qi Zhang, Peiwu Li, Huali Xie, Xiupin Wang, Xiaofeng Yue, Wen Zhang
  • Publication number: 20240235877
    Abstract: An information control method and apparatus, a network function device, a chip, a computer program product, and a readable storage medium. The information control method of the embodiments of this application includes: sending, by a radio access network (RAN) node, interaction assistance information to a first core network function, where the interaction assistance information is used to assist the first core network function in invoking information related to multicast and broadcast service management or session management to a second core network function, or the interaction assistance information is used to assist the first core network function in rejecting to invoke information related to the multicast and broadcast service management or session management to the second core network function.
    Type: Application
    Filed: March 22, 2024
    Publication date: July 11, 2024
    Applicant: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventors: Zhenhua XIE, Wen WANG
  • Publication number: 20240233152
    Abstract: A depth sensing system and a depth sensing method are provided. The sensing system includes depth sensing module and a processor for performing the sensing method. The depth sensing method incudes: obtaining a sensed target data set via a depth sensing module; calculating a period number corresponding to a measuring pixel; and calculating an actual range value or an actual depth of the measuring pixel in accordance with a period number and a range value of the measuring pixel. The step of calculating the period number of the target data set includes: calculating a spatial ratio in accordance with the position values of the pixel of optical center and measuring pixel, and a focal length of the depth sensing module; calculating a basic range in accordance with the spatial ratio and an unit depth; and calculating the period number corresponding to the measuring pixel.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 11, 2024
    Inventors: Wu-Feng CHEN, Ching-Wen WANG, Cheng Che TSAI, Hsueh-Tsung LU