Patents by Inventor Wen Wei
Wen Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030042398Abstract: A light-responsive controlling device for automatically controlling a headlamp and/or a sunshade curtain is disclosed. The control device includes a photo-sensor mounted on a vehicle for generating a sensing signal in response to the intensity of an environmental light, a discriminating circuit electrically connected to the photo-sensor for optionally generating a triggering signal according to a comparing result of the sensing signal with a reference signal, a hold circuit electrically connected to the discriminating circuit for outputting a confirming signal in response to the triggering signal uninterrupted for a predetermined period, and a drive circuit electrically connected to the hold circuit and a headlamp or a sunshade curtain of the vehicle for providing a drive current in response to the confirming signal for the headlamp to emit a certain level of light or for the sunshade curtain to perform opening/closing operations.Type: ApplicationFiled: September 4, 2001Publication date: March 6, 2003Applicant: Exon Science Inc.Inventors: Wen-Wei Su, Kuei-Hung Chen, Shun-Hsiang Hsiao
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Publication number: 20020179197Abstract: In order to improve castability of a titanium alloy, 0.1-5 wt %, preferably 0.5-3 wt %, of bismuth is doped, based on the weight of bismuth and the titanium alloy. The titanium alloy is for making a dental casting or a medical implant.Type: ApplicationFiled: June 26, 2002Publication date: December 5, 2002Applicant: Jiin-Huey Chern LINInventors: Jiin-Huey Chern Lin, Chien-Ping Ju, Wen-Wei Cheng
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Publication number: 20020179208Abstract: Quenching a work piece made of a titanium alloy having a temperature higher than 800° C. to a temperature lower than 500° C. at a cooling rate greater than 10° C./second between 800° C. and 500° C. is used to render the cooled work piece containing &agr;″ phase as a major phase. The work piece is preferably a medical implant.Type: ApplicationFiled: May 30, 2002Publication date: December 5, 2002Applicant: Jiin-Huey Chern LINInventors: Jiin-Huey Chern Lin, Chien-Ping Ju, Chih-Min Lee, Wen-Fu Ho, Dan Jae Lin, Wen-Wei Cheng, Chia Wei Lin, Che Chin Yang
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Publication number: 20020123184Abstract: Dynamic Random Access Memory (DRAM) cells are formed in a P well formed in a biased deep N well (DNW). PMOS transistors are formed in N wells. The NMOS channels stop implant mask is modified not to be a reverse of the N well mask in order to block the channels stop implant from an N+ contact region used for DNW biasing. In DRAMs and other integrated circuits, a minimal spacing requirement between a well of an integrated circuit on the one hand and adjacent circuitry on the other hand is eliminated by laying out the adjacent circuitry so that the well is located adjacent to a transistor having an electrode connected to the same voltage as the voltage that biases the well. For example, in DRAMs, the minimal spacing requirement between the DNW and the read/write circuitry is eliminated by locating the DNW next to a transistor precharging the bit lines before memory accesses. One electrode of the transistor is connected to a precharge voltage.Type: ApplicationFiled: April 30, 2002Publication date: September 5, 2002Inventors: Li-Chun Li, Huoy-Jong Wu, Chung-Cheng Wu, Saysamone Pittikoun, Wen-Wei Lo
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Patent number: 6406953Abstract: Dynamic Random Access Memory (DRAM) cells are formed in a P well formed in a biased deep N well (DNW). PMOS transistors are formed in N wells. The NMOS channels stop implant mask is modified not to be a reverse of the N well mask in order-to block the channels stop implant from an N+ contact region used for DNW biasing. In DRAMS and other integrated circuits, a minimal spacing requirement between a well of an integrated circuit on the one hand and adjacent circuitry on the other hand is eliminated by laying out the adjacent circuitry so that the well is located adjacent to a transistor having an electrode connected to the same voltage as the voltage that biases the well. For example, in DRAMs, the minimal spacing requirement between the DNW and the read/write circuitry is eliminated by locating the DNW next to a transistor precharging the bit lines before memory accesses. One electrode of the transistor is connected to a precharge voltage.Type: GrantFiled: April 1, 1998Date of Patent: June 18, 2002Assignee: Mosel Vitelic, Inc.Inventors: Li-Chun Li, Huoy-Jong Wu, Chung-Cheng Wu, Saysamone Pittikoun, Wen-Wei Lo
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Patent number: 6366764Abstract: A wireless LAN RF module uses parasitic element compensation devices in an antenna select circuit to improve port isolation. In addition, various combinations of RC filter networks and spurious radiation attenuators are incorporated into the Quad Demod/Mod and Synthesizer ;/circuits to provide suppression of EMI susceptibility and radiation throughout the RF module.Type: GrantFiled: May 8, 1998Date of Patent: April 2, 2002Assignee: Industrial Technology Research InstituteInventors: Wen-Wei Yang, Min Hung Shen, Chen-Chung Kuo, Shuw Guann Lin, Ssu-Pin Ma
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Patent number: 6274509Abstract: A method of planarizing a layer of dielectric material is disclosed herein that is particularly suitable for planarizing inter-layer-dielectrics (ILD) or inter-metal-dielectrics (IMD). The planarizing method comprises the steps of depositing a layer of sacrificial oxide over the dielectric material, depositing a layer of amorphous silicon over the sacrificial oxide layer by either sputtering or plasma enhanced chemical vapor deposition (PECVD) at a temperature less than about 500 degrees Celsius, performing a first chemical-mechanical polishing of the amorphous silicon layer to form a self-aligned mask for a subsequent etching step, etching a portion of the sacrificial oxide layer to form a channel therein, and performing a second chemical-mechanical polishing to remove the remaining amorphous silicon layer and the remaining sacrificial oxide, and to substantially planarize the underlying dielectric material.Type: GrantFiled: January 28, 1999Date of Patent: August 14, 2001Assignee: Mosel Vitelic, Inc.Inventors: Tzung-Rue Hsieh, Wen-Wei Lo
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Patent number: 6205171Abstract: A wireless LAN RF module uses a low power transistor switchable voltage divider circuit to control the bias input of a GaAs MESFET output power amplifier. This bias control circuit provides stable, high speed on-off switching of the power amplifier stage by applying low power bias voltages to the MESFET gate input, rather than by interrupting the high power MESFET drain to Vdd circuit.Type: GrantFiled: May 8, 1998Date of Patent: March 20, 2001Assignee: Industrial Technology Research InstituteInventors: Wen-Wei Yang, Min Hung Shen, Chen-Chung Kuo, Shuw Guann Lin, Ssu-Pin Ma
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Patent number: 6184676Abstract: A test head for a semiconductor integrated circuit tester comprises a housing which has an air inlet opening and an air outlet opening and bounds a pin card space and an air chamber. Multiple pin cards are located in the pin card space and radiate from an interior cavity which is within the pin card space. A baffle structure divides the air chamber, which is separated from the pin card space by a boundary surface, into an air supply duct which provides communication between the air inlet opening and the interior cavity and an outlet plenum which provides communication between the pin card space and the air outlet opening by way of the boundary surface. A fan is mounted in the interior cavity for inducing a flow of air from the interior cavity to the plenum by way of spaces between the pin cards.Type: GrantFiled: March 12, 1999Date of Patent: February 6, 2001Assignee: Credence Systems CorporationInventors: David A. Baker, Wen Wei, Henry Hanson
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Patent number: 6133597Abstract: Dynamic Random Access Memory (DRAM) cells are formed in a P well formed in a biased deep N well (DNW). PMOS transistors are formed in N wells. The NMOS channels stop implant mask is modified not to be a reverse of the N well mask in order to block the channels stop implant from an N+ contact region used for DNW biasing. In DRAMs and other integrated circuits, a minimal spacing requirement between a well of an integrated circuit on the one hand and adjacent circuitry on the other hand is eliminated by laying out the adjacent circuitry so that the well is located adjacent to a transistor having an electrode connected to the same voltage as the voltage that biases the well. For example, in DRAMs, the minimal spacing requirement between the DNW and the read/write circuitry is eliminated by locating the DNW next to a transistor precharging the bit lines before memory accesses. One electrode of the transistor is connected to a precharge voltage.Type: GrantFiled: July 25, 1997Date of Patent: October 17, 2000Assignee: Mosel Vitelic CorporationInventors: Li-Chun Li, Huoy-Jong Wu, Chung-Cheng Wu, Saysamone Pittikoun, Wen-Wei Lo
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Patent number: 5999602Abstract: The present invention relates to a telephone with an interface connection with the television, which includes a basic telephone set, central processing unit (CPU), display controller and a control program. The control program controls the whole operating procedures of the telephone of the invention. Under the operating procedures, the CPU transmits the phone-call information received by the basic telephone set to the display controller. In accordance to the received information, the display controller generates and transports a corresponding signal to a television. With the telephone of the invention, the information of a telephone call can be displayed in a television.Type: GrantFiled: December 18, 1998Date of Patent: December 7, 1999Assignee: Inventec CorporationInventors: Wen-Wei Yang, Zhang Hui, Jeffrey Lai
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Patent number: 5975314Abstract: A shipping rack is provided for safe and secure transport of a plurality of generally elongate workpieces, each of the plurality of workpieces having a longitudinal axis and distinctly different first and second ends. The shipping rack comprises a rectangular base with a vertical members extending perpendicularly upwardly from the four corners of the base. Affixed to the vertical members are at least one pair of horizontal support members. Each such pair is positioned in spaced apart parallel relationship. Across the length of the horizontal support members are a plurality of pairs of alternating first and second slots for receiving the first and second respective ends of the workpieces. Because of the difference in depth of the first and second slots, the workpieces are held in the pair of support members with the axis thereof at an angle of about 5 degrees relative to the horizontal.Type: GrantFiled: March 30, 1998Date of Patent: November 2, 1999Assignee: Dana CorporationInventor: Wen-Wei Lee
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Patent number: 5909333Abstract: A non-invasive servo-write system for use in a data recording disk drive. The system measures actuator position and generates a reference clock using semiconductor lasers. Internal position references are provided by reflective diffraction gratings affixed to the actuator arm and the spindle hub. Wavefront reconstruction optics correct for aberrations in the gratings. Optical sensors detect differential changes in the diffraction patterns created by the gratings, eliminating sensitivity to frequency drift. Decode electronics convert optical sensor data into an actuator position measurement. Control electronics drive the voice coil motor within the disk drive, which positions the write transducer to record servo information provided in a servo pattern generator. Transparent windows in the head-disk-assembly cover allow the servo-writer to write drives which are completely assembled and sealed.Type: GrantFiled: June 18, 1997Date of Patent: June 1, 1999Assignee: International Business Machines CorporationInventors: John Stewart Best, Wen-Wei Chiang, Steven Robert Hetzler, Donald Edward Horne, Chih-Kung Lee, Vincent Marrello
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Patent number: 5804778Abstract: An elevator control data intercommunication programmer including a main board equipped with master and slave CPUs for controlling the operation of the elevator, EEPROMs for providing operation data to the CPUs, a DSP for controlling vector operation of the elevator's motor, and a data communication port for data communication with an external microprocessor unit. Through the data communication port, data can be programmed in the EEPROMs, so that the elevator operation data (parameters) in the memory of a failed CPU can be copied to another CPU for replacement.Type: GrantFiled: December 27, 1996Date of Patent: September 8, 1998Assignee: Yungtay Engineering Co., Ltd.Inventors: Ching-Mau Chen, Tzu-Yuan Lin, Chin-Chang Wu, Liao-Chia Chang, Hsin-San Chang, Wen-Wei Chuang
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Patent number: 5795304Abstract: A method and system for analyzing an electrogastrophic (EGG) signal are disclosed. Electrodes are positioned on abdominal skin of a subject adjacent a stomach thereof. The electrodes obtain the EGG signal produced by the stomach. An amplifier is connected to the electrodes, receives the obtained EGG signals, and amplifies the obtained EGG signal. A transforming device is operatively connected to the amplifier. The transforming device receives the amplified EGG signal and transforms the amplified EGG signal from a time domain representation to a frequency domain representation. The transformation is accomplished by way of a predetermined transform function incorporating a variable frequency and a window function. The window function has a time resolution and a frequency resolution. The frequency resolution of the window function is proportional to the frequency.Type: GrantFiled: March 26, 1997Date of Patent: August 18, 1998Assignee: Drexel UniversityInventors: Hun H. Sun, Wen Wei Qiao, William Y. Chey, Kae Yol Lee
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Patent number: 5442172Abstract: An optical measurement system for use in a data recording disk drive includes wavefront reconstruction optics which correct and compensate for aberrations in laser beams reflected from radial and linear diffraction gratings. The reconstruction optics include two spherical lenses and two reflectors, one of each positioned on each side of a diffraction grating. Light directed from a laser beam toward the grating diffracts into a +1 order component directed at the first set of reconstruction optics and into a -1 order component directed at the second set of reconstruction optics. The reconstruction optics compensate for the variable yaw angle caused by a linear grating and for the optical wavefront aberrations caused by a radial grating.Type: GrantFiled: May 27, 1994Date of Patent: August 15, 1995Assignee: International Business Machines CorporationInventors: Wen-Wei Chiang, Chih-Kung Lee
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Patent number: 4007130Abstract: A method for treating catalyst solution comprising the complex reaction product formed on mixing of a rhodium component or an iridium component and a halogen component in the presence of carbon monoxide to remove metallic corrosion products and recover rhodium or iridium and halogen values therefrom.Type: GrantFiled: December 29, 1975Date of Patent: February 8, 1977Assignee: Monsanto CompanyInventors: Harry S. Leach, Thomas C. Singleton, Yu Wen Wei