Patents by Inventor Wen Yao

Wen Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250113717
    Abstract: The disclosure relates to a display device for displaying information, comprising at least one layer unit operable to change the quantity of light rays to pass through the layer unit, at least one display unit configured to display an image, wherein the at least one layer unit comprises or consists, mainly or fully, of at least one metal halide perovskite. The disclosure also relates to a display system comprising the display device as well as a method for changing the transparency while displaying information and a method for producing the display device or the display system.
    Type: Application
    Filed: November 3, 2022
    Publication date: April 3, 2025
    Applicant: Continental Automotive Technologies GmbH
    Inventors: Junn Yaw Ong, Yew Chye Leonard Shen, Wen Yao Jackson Chan
  • Publication number: 20250087592
    Abstract: A package structure includes a first bonding film on a first package component and a first alignment mark in the first bonding film. The first alignment mark includes a plurality of first patterns spaced apart from each other. The package structure includes a second bonding film on a second package component and bonded to the first bonding film, and a second alignment mark in the second bonding film. The second alignment mark includes a plurality of second patterns spaced apart from each other, and the first patterns overlap the second patterns. In this case, an interference pattern can be formed by the optical signal passing through the varying spacing between the gratings of top wafer and bottom wafer due to pitch difference between first pitch and second pitch. By reading the optical signal, the resolution of overlay (misalignment) measurement is improved.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 13, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Geng-Ming CHANG, Kewei ZUO, Tzu-Cheng LIN, Chih-Hang TUNG, Wen-Chih CHIOU, Wen-Yao CHANG, Chen-Hua YU
  • Patent number: 12237288
    Abstract: In an embodiment, an interposer has a first side, a first integrated circuit device attached to the first side of the interposer with a first set of conductive connectors, each of the first set of conductive connectors having a first height, a first die package attached to the first side of the interposer with a second set of conductive connectors, the second set of conductive connectors including a first conductive connector and a second conductive connector, the first conductive connector having a second height, the second conductive connector having a third height, the third height being different than the second height, a first dummy conductive connector being between the first side of the interposer and the first die package, an underfill disposed beneath the first integrated circuit device and the first die package, and an encapsulant disposed around the first integrated circuit device and the first die package.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shang-Yun Hou, Shu Chia Hsu, Yu-Yun Huang, Wen-Yao Chang, Yu-Jen Cheng
  • Publication number: 20250050734
    Abstract: A lighting unit for a display apparatus for use in a motor vehicle is disclosed herein. The lighting unit includes a light transmitting panel configured to transmit light rays through to a viewing side of a display apparatus; and at least one light source operable to emit light rays across a breadth of the light transmitting panel. the light transmitting panel further comprises a reflector foil sheet applied to at least two sides of the light transmitting panel with no air gaps therebetween. A vehicle display for mounting within an interior of a motor vehicle comprising such a lighting unit, and a method of optimizing light rays for illuminating a display apparatus for use in a motor vehicle is also disclosed.
    Type: Application
    Filed: November 3, 2022
    Publication date: February 13, 2025
    Applicant: Continental Automotive Technologies GmbH
    Inventors: Yew Chye Leonard Shen, Junn Yaw Ong, Wen Yao Jackson Chan
  • Publication number: 20250029161
    Abstract: A method for customizing an appearance of a merchandise which is suitable for being performed by a computing device in order to customize a customized choice result selected by a user includes a designed image and a merchandise information. The method includes receiving the designed image, receiving the merchandise information, overlappingly displaying the designed image on a virtual merchandise image corresponding to the merchandise information, receiving at least one edit operation for at least one designed element in the designed image, and editing for the designed element in the designed image according to the edit operation and then generating a customizing virtual image. Thereby, the method can be used for customizing an appearance of a merchandise and directly customize the designed image that has been arranged. In addition, a computing device and a non-transitory computer-readable recording medium for customizing the appearance of the merchandise are also provided.
    Type: Application
    Filed: June 3, 2024
    Publication date: January 23, 2025
    Applicant: EVOLUTIVE LABS CO., LTD.
    Inventors: TZI-HUEI LAI, YA-HSUAN CHANG, XIN-YING YOU, WEN-YAO TSAI, JUN-QI WANG, CHI-EN WU, YU-TING LIANG, YEONG-JYI LEI
  • Publication number: 20250015920
    Abstract: A transmitter for wireless communications includes an encoder, a normalizer, a binarizer, and a radio frequency (RF) circuit. The encoder is configured to encode a control message into a channel dimensional vector according to a channel dimension and the number of semantic fields by utilizing a training model. The control message includes at least one of control plane media access control layer information and control plane physical layer information. The normalizer is configured to normalize the channel dimensional vector to generate a normalized channel dimensional vector. The binarizer is configured to binarize the normalized channel dimensional vector to generate a fixed-point number. The RF circuit is configured to modulate the fixed-point number into an RF signal and transmit the RF signal.
    Type: Application
    Filed: November 14, 2023
    Publication date: January 9, 2025
    Inventors: Hsien Tsung HSU, Pei Yu HUNG, Wen-Yao CHANG
  • Publication number: 20240379845
    Abstract: A medium voltage transistor of a level shifter circuit may include a p-well region in a substrate. Moreover, the medium voltage transistor may include an n-type lightly-doped source/drain (NLDD) region in which an N+ source/drain region of the medium voltage transistor is included. The light doping in the NLDD region enables a threshold voltage (Vi) to be reduced while enabling medium voltage operation at the N+ source/drain region. To reduce the amount of current leakage in the medium voltage transistor due to the light doping in the NLDD region, a buffer layer may be included over and/or on a portion of the NLDD region under a gate structure of the medium voltage transistor. The NLDD region and the thermal region of the medium voltage transistor enables the threshold voltage of the medium voltage transistor while maintaining the same current leakage performance or reducing current leakage in the medium voltage transistor.
    Type: Application
    Filed: May 11, 2023
    Publication date: November 14, 2024
    Inventors: Chen-Liang CHU, Hsin-Chih CHIANG, Ruey-Hsin LIU, Ta-Yuan KUNG, Ta-Chuan LIAO, Chih-Wen YAO, Ming-Ta LEI
  • Patent number: 12090147
    Abstract: Provided herein are methods of treating, preventing, managing, and/or ameliorating hypotension related to administration of 2-(4-chlorophenyl)-N-((2-(2,6-dioxopiperidin-3-yl)-1-oxoisoindolin-5-yl)methyl)-2,2-difluoroacetamide or a stereoisomer or a mixture of stereoisomers, pharmaceutically acceptable salt, tautomer, prodrug, solvate, hydrate, co-crystal, clathrate, or polymorph thereof in a cancer patient, wherein the methods comprise administering a combination comprising 2-(4-chlorophenyl)-N-((2-(2,6-dioxopiperidin-3-yl)-1-oxoisoindolin-5-yl)methyl)-2,2-difluoroacetamide or a stereoisomer or a mixture of stereoisomers, pharmaceutically acceptable salt, tautomer, prodrug, solvate, hydrate, co-crystal, clathrate, or polymorph thereof and a glucocorticoid receptor agonist, an interleukin-1 receptor antagonist, or an interleukin-1? blocker.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: September 17, 2024
    Assignee: Celgene Corporation
    Inventors: Tonia Buchholz, Jinhong Fan, Daniel W. Pierce, Michael Pourdehnad, Tsun-Wen Yao
  • Patent number: 12073967
    Abstract: A microcoil element, an array-type microcoil element and a device are provided. The microcoil element includes a wiring layer having continuous multiple metal line segments that form multiple loops around a starting point of the element. Every metal line segment includes a first electrode end and a second electrode end. The microcoil element includes an electrode layer having a first electrode zone and a second electrode zone that respectively collect the first electrode ends and the second electrode ends of the multiple metal line segments. When designing the microcoil element, parameters such as a total length of the multiple line segments, a line width, a line spacing of adjacent line segments, a length of each line segment, turns of the microcoil, and a loop distance according to impedance requirement. The single microcoil element or the array-type microcoil element can be used as a magnetic component of a device.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: August 27, 2024
    Assignees: SOUNDS GREAT CO., LTD., XIAMEN SOUNDS GREAT ELECTRONIC SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Hong-Da Zhou, Chin-Hung Luo, Jung-Wai Wu, Wen-Yao Chiang
  • Publication number: 20240250188
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first doped region in a substrate and comprising a first doping type. A gate structure is over the first doped region. A pair of contact regions are in the substrate on opposing sides of the gate structure and comprising the first doping type. The first doped region continuously laterally extends between the pair of contact regions and contacts the pair of contact regions. A second doped region is in the substrate and along a bottom of the first doped region. The second doped region comprises a second doping type opposite the first doping type.
    Type: Application
    Filed: April 2, 2024
    Publication date: July 25, 2024
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Publication number: 20240186408
    Abstract: Transistors with improved saturation drain current and methods for making such transistors are disclosed. The gate is formed in the shape of a longitudinal trench and a plurality of lateral trenches below the longitudinal trench. The resulting dual-recess structure increases the surface area of the gate, which permits additional charge carriers and increases the saturation drain current of the transistor. Such transistors can be useful in high voltage and medium voltage applications such as in display driver integrated circuits.
    Type: Application
    Filed: January 5, 2023
    Publication date: June 6, 2024
    Inventors: Chen-Liang Chu, Chien-Chih Chou, Ta-Yuan Kung, Chun-Hsun Lee, Chih-Wen Yao, Yi-Huan Chen, Ming-Ta Lei
  • Patent number: 11990443
    Abstract: In an embodiment, an interposer has a first side, a first integrated circuit device attached to the first side of the interposer with a first set of conductive connectors, each of the first set of conductive connectors having a first height, a first die package attached to the first side of the interposer with a second set of conductive connectors, the second set of conductive connectors including a first conductive connector and a second conductive connector, the first conductive connector having a second height, the second conductive connector having a third height, the third height being different than the second height, a first dummy conductive connector being between the first side of the interposer and the first die package, an underfill disposed beneath the first integrated circuit device and the first die package, and an encapsulant disposed around the first integrated circuit device and the first die package.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shang-Yun Hou, Shu Chia Hsu, Yu-Yun Huang, Wen-Yao Chang, Yu-Jen Cheng
  • Patent number: 11978810
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a varactor comprising a reduced surface field (RESURF) region. The method includes forming a drift region having a first doping type within a substrate. A RESURF region having a second doping type is formed within the substrate such that the RESURF region is below the drift region. A gate structure is formed on the substrate. A pair of contact regions is formed within the substrate on opposing sides of the gate structure. The contact regions respectively abut the drift region and have the first doping type, and wherein the first doping type is opposite the second doping type.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Patent number: 11967645
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a field plate, a gate electrode, and a first dielectric layer. The substrate has a top surface. The substrate includes a first drift region with a first conductivity type extending from the top surface of the substrate into the substrate, and includes a second drill region with the first conductivity type extending from the top surface of the substrate into the substrate and adjacent to the first drift region. The field plate is over the substrate. The gate electrode has a first portion and a second portion, wherein the first portion of the gate electrode is located over the field plate. The first dielectric layer is between the substrate and the field plate. The first portion of the gate electrode is overlapping with a boundary of the first drift region and the second drift region in the substrate.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
  • Patent number: 11943300
    Abstract: Low-level nodes (LLNs) that are communicatively connected to one another each have sensing capability and processing capability. High-level nodes (HLNs) that are communicatively connected to one another and to the LLNs each have processing capability more powerful than the processing capability of each LLN. The LLNs and the HLNs perform processing based on sensing events captured by the LLNs. The processing is performed by the LLNs and the HLNs to minimize data communication among the LLNs and the HLNs, and to provide for software-defined sensing.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: March 26, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mehran Kafai, Wen Yao, April Slayden Mitchell
  • Publication number: 20240061325
    Abstract: In a method of de-mounting a pellicle from a photo mask, the photo mask with the pellicle is placed on a pellicle holder. The pellicle is attached to the photo mask by a plurality of micro structures. The plurality of micro structures are detached from the photo mask by applying a force or energy to the plurality of micro structures before or without applying a pulling force to separate the pellicle from the photo mask. The pellicle is de-mounted from the photo mask. In one or more of the foregoing and following embodiments, the plurality of micro structures are made of an elastomer.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 22, 2024
    Inventors: Wen-Yao WEI, Chi-Lun LU, Hsin-Chang LEE
  • Patent number: 11899172
    Abstract: An imaging optical lens assembly includes five lens elements, which are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. Each of the five lens elements has an object-side surface towards the object side and an image-side surface towards the image side. The third lens element has positive refractive power. At least one of the object-side surface and the image-side surface of at least one of the five lens elements includes at least one critical point in an off-axis region thereof.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: February 13, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chung-Yu Wei, Wen-Yao Yang, Yi-Hsiang Chuang, Tzu-Chieh Kuo
  • Patent number: 11860447
    Abstract: An imaging optical lens assembly includes five lens elements. The five lens elements in order from an object side to an image side along an optical path are a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. Each of the five lens elements has an object-side surface facing the object side and an image-side surface facing the image side. The first lens element has positive refractive power, the second lens element has negative refractive power and the third lens element has negative refractive power. With specific conditions being satisfied, the imaging optical lens assembly can be miniaturized while providing good image quality.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: January 2, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Wen-Yao Yang, Kuan-Chun Wang, Hsin-Hsuan Huang, Huan-Sheng Chang
  • Publication number: 20230387058
    Abstract: In an embodiment, an interposer has a first side, a first integrated circuit device attached to the first side of the interposer with a first set of conductive connectors, each of the first set of conductive connectors having a first height, a first die package attached to the first side of the interposer with a second set of conductive connectors, the second set of conductive connectors including a first conductive connector and a second conductive connector, the first conductive connector having a second height, the second conductive connector having a third height, the third height being different than the second height, a first dummy conductive connector being between the first side of the interposer and the first die package, an underfill disposed beneath the first integrated circuit device and the first die package, and an encapsulant disposed around the first integrated circuit device and the first die package.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shang-Yun Hou, Shu Chia Hsu, Yu-Yun Huang, Wen-Yao Chang, Yu-Jen Cheng
  • Patent number: 11822230
    Abstract: In a method of de-mounting a pellicle from a photo mask, the photo mask with the pellicle is placed on a pellicle holder. The pellicle is attached to the photo mask by a plurality of micro structures. The plurality of micro structures are detached from the photo mask by applying a force or energy to the plurality of micro structures before or without applying a pulling force to separate the pellicle from the photo mask. The pellicle is de-mounted from the photo mask. In one or more of the foregoing and following embodiments, the plurality of micro structures are made of an elastomer.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Yao Wei, Chi-Lun Lu, Hsin-Chang Lee