Patents by Inventor Wen Yao

Wen Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190270294
    Abstract: A silicon contained integrated structure and the method for forming the same is proposed, wherein a hot melt glue layer is adhered under a silicon layer. The hot melt glue layer contains a high temperature hot melt glue layer and a low temperature hot melt glue layer. By the high temperature hot melt glue layer, the hot melt glue layer may be combined to the silicon layer, while the low temperature hot melt glue layer cause the whole structure can be combined to an object, such as cloth. Furthermore, the present invention uses silicon as material. It can be formed as various specific shapes by molding manufacturing and then the silicon integrated sheet can be transferred to cloth. The whole process is quick and cost is low. Moreover, silicon is not deformed due to heat and thus it has lower effect to the environment than other conventional used material.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 5, 2019
    Inventor: WEN YAO CHANG
  • Publication number: 20190252545
    Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 15, 2019
    Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
  • Patent number: 10381259
    Abstract: A method of fabricating a semiconductor structure includes forming an isolation feature in a substrate, removing a portion of the isolation feature and a portion of the substrate underneath the removed portion of the isolation feature to form a trench in the substrate, and forming a trapping feature around a bottom portion of the trench. A first sidewall and a second sidewall of the trench are in direct contact with the isolation feature, and a bottom surface of the trench is below a bottom surface of the isolation feature.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: August 13, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Alex Kalnitsky, Chih-Wen Yao, Jun Cai, Ruey-Hsin Liu, Hsiao-Chin Tuan
  • Patent number: 10334726
    Abstract: A circuit board with a substrate made of silicon includes a silicon substrate made of silicon; an adhering layer which is a gluing layer and is adhered on the silicon substrate; and a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer. Furthermore, the method for forming the circuit board with silicon substrate is proposed, in that a method for forming a circuit board suitable for etching and a method for forming a circuit board for screen printing are proposed.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: June 25, 2019
    Inventor: Wen Yao Chang
  • Publication number: 20190191556
    Abstract: A circuit board with a substrate made of silicon comprises a silicon substrate made of silicon; an adhering layer which is a gluing layer and is adhered on the silicon substrate; a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer; and wherein the metal layer is etched to form with metal circuits. Furthermore, electronic elements are adhered on the metal layer to form as circuits with specific functions. A packaging silicon layer encapsulates the metal layer and the electronic elements for packaging. The circuit board is a flat plate board or a curled board.
    Type: Application
    Filed: November 20, 2018
    Publication date: June 20, 2019
    Inventor: WEN YAO CHANG
  • Publication number: 20190191555
    Abstract: A circuit board with a substrate made of silicon includes a silicon substrate made of silicon; an adhering layer which is a gluing layer and is adhered on the silicon substrate; a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer; and wherein the metal layer is formed with metal circuits by screen printing. Electronic elements are adhered on the metal layer to form as circuits with specific functions. Materials of the adhering layer contains Organic silicon polyester copolymer resin, Ethyl acetate and Organic silicon resin. Material of the metal layer is selected from copper, aluminum, sliver, and gold. A packaging silicon layer encapsulates the metal layer and the electronic elements for packaging. Material of the metal layer is selected from copper, aluminum, sliver, and gold.
    Type: Application
    Filed: November 12, 2018
    Publication date: June 20, 2019
    Inventor: WEN YAO CHANG
  • Publication number: 20190191554
    Abstract: A circuit board with a substrate made of silicon includes a silicon substrate made of silicon; an adhering layer which is a gluing layer and is adhered on the silicon substrate; and a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer. Furthermore, the method for forming the circuit board with silicon substrate is proposed, in that a method for forming a circuit board suitable for etching and a method for forming a circuit board for screen printing are proposed.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 20, 2019
    Inventor: WEN YAO CHANG
  • Patent number: 10278283
    Abstract: A circuit board with a substrate made of silicon includes a a silicon substrate made of silicon; an adhering layer which is a gluing layer and is adhered on the silicon substrate; a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer. Furthermore, the method for forming the circuit board with silicon substrate is proposed, in that a method for forming a circuit board suitable for etching and a method for forming a circuit board for screen printing are proposed.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: April 30, 2019
    Inventor: Wen Yao Chang
  • Patent number: 10269954
    Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
  • Patent number: 10262882
    Abstract: A method includes causing a carrier of an overhead hoist transfer system (OHT) to latch onto a top latch of a first semiconductor wafer transportation pod, the first semiconductor wafer transportation pod comprising a top latching mechanism configured to selectively connect to another pod or a carrier mechanism of an overhead hoist transfer (OHT) system, and a bottom latching mechanism configured to selectively connect to another pod. The method further includes rotating the first semiconductor wafer transportation pod such that the top latching mechanism of the first semiconductor wafer transportation pod latches on to a second semiconductor wafer transportation pod.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: April 16, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Yao Hsieh, Shao-Hao Chiu, Wen-Kai Hsieh, Lin Hung Kai, Si-Heng Liu
  • Patent number: 10221152
    Abstract: The present invention relates to a use of mycophenolate mofetil or a pharmaceutically acceptable salt thereof in the manufacture of a medicament against influenza virus. The present invention also relates to a use of mycophenolate mofetil or a pharmaceutically acceptable salt thereof in the manufacture of a medicament against drug-resistant influenza virus strains. The present invention is further related to a method for treating influenza in a subject, comprising administering to said subject an effective amount of mycophenolate mofetil or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: March 5, 2019
    Assignee: GIANT FORCE TECHNOLOGY CORPORATION
    Inventors: An-Rong Lee, Chi-Hong Chu, Wen-Liang Chang, Chen-Wen Yao, Wen-Hsin Huang, Li-Heng Pao
  • Patent number: 10019248
    Abstract: The present invention discloses a system and method for service matching of IM software, which is adapted for operating between a plurality of user devices and a plurality of IM software supplier servers. The IM software supplier server provides at least one IM software associated service. The user device merely installs one of the plurality of IM software, and the user device can access services provided by different IM software supplier servers. The service matching method comprises: relaying a service request to the corresponding IM software supplier server according to a correspondence table defining the IM software and names of the IM software associated service when the user device makes the service request; and returning a feedback of the corresponding IM software supplier server to the user device made the service request.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: July 10, 2018
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Frank Chee-Da Tsai, Wen-Jen Ho, Wen-Yao Chang
  • Publication number: 20180161688
    Abstract: A soft building block assembly includes at least one soft building block element formed by soft material and having at least one buckling portion; by stacking of the soft building block element elements, various kinds of toys being formed; a Shore value of the material of the soft building block element is between 20 to 95. Material of the soft building block element is selected from one of PE(Thermal Plastic Elastomer), TPR(Thermal Plastic Rubber), TPU(Thermal PU, PU(Polyurethane) or thermal static material, such as silica rubber. the soft building block element has at least one of a buckling portion and a coupling portion, and the buckling portion of a soft building block element is buckled to the coupling portion of another soft building block element.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Inventor: WEN YAO CHANG
  • Publication number: 20180130904
    Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.
    Type: Application
    Filed: January 5, 2018
    Publication date: May 10, 2018
    Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
  • Publication number: 20180121184
    Abstract: The present invention discloses a system and method for service matching of IM software, which is adapted for operating between a plurality of user devices and a plurality of IM software supplier servers. The IM software supplier server provides at least one IM software associated service. The user device merely installs one of the plurality of IM software, and the user device can access services provided by different IM software supplier servers. The service matching method comprises: relaying a service request to the corresponding IM software supplier server according to a correspondence table defining the IM software and names of the IM software associated service when the user device makes the service request; and returning a feedback of the corresponding IM software supplier server to the user device made the service request.
    Type: Application
    Filed: November 17, 2016
    Publication date: May 3, 2018
    Inventors: Frank Chee-Da TSAI, Wen-Jen HO, Wen-Yao CHANG
  • Publication number: 20180108550
    Abstract: A method includes causing a carrier of an overhead hoist transfer system (OHT) to latch onto a top latch of a first semiconductor wafer transportation pod, the first semiconductor wafer transportation pod comprising a top latching mechanism configured to selectively connect to another pod or a carrier mechanism of an overhead hoist transfer (OHT) system, and a bottom latching mechanism configured to selectively connect to another pod. The method further includes rotating the first semiconductor wafer transportation pod such that the top latching mechanism of the first semiconductor wafer transportation pod latches on to a second semiconductor wafer transportation pod.
    Type: Application
    Filed: December 15, 2017
    Publication date: April 19, 2018
    Inventors: Wen-Yao Hsieh, Shao-Hao Chiu, Wen-Kai Hsieh, Lin Hung Kai, Si-Heng Liu
  • Patent number: 9871134
    Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 16, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
  • Patent number: D817869
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: May 15, 2018
    Assignee: MOBILETRON ELECTRONICS CO., LTD.
    Inventors: Hsiang-Lin Lee, Wen-Yao Chi
  • Patent number: D818334
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: May 22, 2018
    Assignee: MOBILETRON ELECTRONICS CO., LTD.
    Inventors: Yi-Sung Lee, Wen-Yao Chi
  • Patent number: D856921
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: August 20, 2019
    Assignee: MOBILETRON ELECTRONICS CO., LTD.
    Inventors: Hsiang-Lin Lee, Wen-Yao Chi