Patents by Inventor Wen Yao

Wen Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210226025
    Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode, and a pair of source/drain regions. The gate dielectric is disposed in the semiconductor substrate having an upper boundary lower than an upper surface of the semiconductor substrate, and an upper surface flush with the upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric having a first section over the upper boundary of the gate dielectric and a second section over the upper surface of the gate dielectric. The second section partially covers and partially exposes the upper surface of the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric.
    Type: Application
    Filed: April 7, 2021
    Publication date: July 22, 2021
    Inventors: TA-YUAN KUNG, RUEY-HSIN LIU, CHEN-LIANG CHU, CHIH-WEN YAO, MING-TA LEI
  • Patent number: 11042080
    Abstract: A light source module includes first to third light sources respectively providing first, second and third lights, first and second wavelength conversion layers, first and second auxiliary light sources respectively providing first and second auxiliary lights, and a dichroic member. The first wavelength conversion layer is excited by the first light and the first auxiliary light from different sides to generate a first conversion light. The second wavelength conversion layer is excited by the second light and the second auxiliary light from different sides to generate a second conversion light. The dichroic member allows the first and second auxiliary lights to transmit therethrough and reflects the first and second conversion lights. The third light transmits through the dichroic member. The first and second conversion lights and the third light are different in wavelength ranges and combined to form an illumination light.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: June 22, 2021
    Assignee: Qisda Corporation
    Inventors: Wen-Yao Lin, Tsung-Hsun Wu, Ching-Shuai Huang
  • Patent number: 11018266
    Abstract: Various embodiments of the present disclosure are directed towards a varactor comprising a reduced surface field (RESURF) region. In some embodiments, the varactor includes a drift region, a gate structure, a pair of contact regions, and a RESURF region. The drift region is within a substrate and has a first doping type. The gate structure overlies the drift region. The contact regions are within the substrate and overlie the drift region. Further, the contact regions have the first doping type. The gate structure is laterally sandwiched between the contact regions. The RESURF region is in the substrate, below the drift region, and has a second doping type. The second doping type is opposite the first doping type. The RESURF region aids in depleting the drift region under the gate structure, which decreases the minimum capacitance of the varactor and increases the tuning range of the varactor.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: May 25, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Patent number: 10985256
    Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode, a pair of source/drain regions, a pair of first well regions, a second well region, a pair of contact regions and a pair of third well regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric. The pair of first well regions are disposed under the pair of source/drain regions. The second well region is disposed between the pair of first well regions. The pair of contact regions are disposed on opposing sides of the pair of source/drain regions. The pair of third well regions are disposed under the pair of contact regions.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: April 20, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ta-Yuan Kung, Ruey-Hsin Liu, Chen-Liang Chu, Chih-Wen Yao, Ming-Ta Lei
  • Publication number: 20200409249
    Abstract: A light source module includes first to third light sources respectively providing first, second and third lights, first and second wavelength conversion layers, first and second auxiliary light sources respectively providing first and second auxiliary lights, and a dichroic member. The first wavelength conversion layer is excited by the first light and the first auxiliary light from different sides to generate a first conversion light. The second wavelength conversion layer is excited by the second light and the second auxiliary light from different sides to generate a second conversion light. The dichroic member allows the first and second auxiliary lights to transmit therethrough and reflects the first and second conversion lights. The third light transmits through the dichroic member. The first and second conversion lights and the third light are different in wavelength ranges and combined to form an illumination light.
    Type: Application
    Filed: June 25, 2020
    Publication date: December 31, 2020
    Applicant: Qisda Corporation
    Inventors: Wen-Yao Lin, Tsung-Hsun Wu, Ching-Shuai Huang
  • Publication number: 20200333696
    Abstract: A projector includes a first light source, a second light source, a collimating lens, a wavelength conversion module and a dichroic mirror. The first light source and the second light source respectively emit a first illumination beam and a second illumination beam. The collimating lens includes a first part and a second part and configured to receive and transmit the first illumination beam. The wavelength conversion module receives the first illumination beam from the first part, and generates an excitation beam transmitted toward the first part and the second part. The dichroic mirror corresponds to the first part, and configured to reflect the first illumination beam and the second illumination beam respectively to different directions for projecting the first illumination beam onto the first part and to be passed by the excitation beam.
    Type: Application
    Filed: March 26, 2020
    Publication date: October 22, 2020
    Inventors: Wen-Yao Lin, Ching-Shuai Huang
  • Publication number: 20200295148
    Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode, a pair of source/drain regions, a pair of first well regions, a second well region, a pair of contact regions and a pair of third well regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric. The pair of first well regions are disposed under the pair of source/drain regions. The second well region is disposed between the pair of first well regions. The pair of contact regions are disposed on opposing sides of the pair of source/drain regions. The pair of third well regions are disposed under the pair of contact regions.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventors: TA-YUAN KUNG, RUEY-HSIN LIU, CHEN-LIANG CHU, CHIH-WEN YAO, MING-TA LEI
  • Publication number: 20200279948
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
  • Patent number: 10738158
    Abstract: A cation-conducting polymer has two or more repeating units of the following formula Owing to the cation-conducting polymer has good physicochemical properties, hydrolytic stability and conductivity, a film formed by coating the liquid cation-conducting polymer can be used as proton exchange membrane to apply in fuel cell system.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 11, 2020
    Assignee: NATIONAL SUN YAT-SEN UUNIVERSITY
    Inventors: Wen-Yao Huang, Hsu-Feng Lee
  • Publication number: 20200192203
    Abstract: An optical module includes a light source, a phosphor wheel, a first driving unit, a color wheel, a second driving unit, a third driving unit and a control unit. The phosphor wheel includes a phosphor area. The color wheel includes a plurality of sector-shaped filters. At least one of the sector-shaped filters includes a plurality of filter areas. Central angles of the filter areas are identical. Colors of at least two adjacent filter areas are different. The control unit selectively controls one of the first driving unit and the second driving unit by a delay time to control an overlap ratio between the phosphor area and one of the filter areas. The control unit selectively controls the third driving unit to drive the color wheel to move with respect to the phosphor wheel, so as to move one of the filter areas to a position corresponding to the phosphor area.
    Type: Application
    Filed: March 25, 2019
    Publication date: June 18, 2020
    Inventors: Wen-Yao Lin, Chi-Hung Hsiao
  • Patent number: 10686047
    Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode and a pair of source/drain regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: June 16, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ta-Yuan Kung, Ruey-Hsin Liu, Chen-Liang Chu, Chih-Wen Yao, Ming-Ta Lei
  • Patent number: 10684541
    Abstract: An optical module includes a light source, a phosphor wheel, a first driving unit, a color wheel, a second driving unit, a third driving unit and a control unit. The phosphor wheel includes a phosphor area. The color wheel includes a plurality of sector-shaped filters. At least one of the sector-shaped filters includes a plurality of filter areas. Central angles of the filter areas are identical. Colors of at least two adjacent filter areas are different. The control unit selectively controls one of the first driving unit and the second driving unit by a delay time to control an overlap ratio between the phosphor area and one of the filter areas. The control unit selectively controls the third driving unit to drive the color wheel to move with respect to the phosphor wheel, so as to move one of the filter areas to a position corresponding to the phosphor area.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: June 16, 2020
    Assignee: Qisda Corporation
    Inventors: Wen-Yao Lin, Chi-Hung Hsiao
  • Patent number: 10672904
    Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
  • Publication number: 20200163209
    Abstract: A circuit board with a substrate made of silicone comprises a silicone substrate made of silicone; an adhering layer adhered on the silicone substrate; a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer; and wherein the metal layer is etched to form with metal circuits. Furthermore, electronic elements are adhered on the metal layer to form as circuits. A packaging silicone layer encapsulates the metal layer and the electronic elements for packaging. The circuit board is a flat plate board or a curled board. The silicone are known as polysiloxanes, and are polymer that includes any synthetic compound made up of repeating unit of siloxane, which is a chain of alternating silicon atoms and oxygen atoms, combined with carbon, hydrogen, and sometimes other elements. The silicone is not silicon atoms as those used in wafer.
    Type: Application
    Filed: September 17, 2019
    Publication date: May 21, 2020
    Inventor: WEN YAO CHANG
  • Publication number: 20200127146
    Abstract: Various embodiments of the present disclosure are directed towards a varactor comprising a reduced surface field (RESURF) region. In some embodiments, the varactor includes a drift region, a gate structure, a pair of contact regions, and a RESURF region. The drift region is within a substrate and has a first doping type. The gate structure overlies the drift region. The contact regions are within the substrate and overlie the drift region. Further, the contact regions have the first doping type. The gate structure is laterally sandwiched between the contact regions. The RESURF region is in the substrate, below the drift region, and has a second doping type. The second doping type is opposite the first doping type. The RESURF region aids in depleting the drift region under the gate structure, which decreases the minimum capacitance of the varactor and increases the tuning range of the varactor.
    Type: Application
    Filed: June 7, 2019
    Publication date: April 23, 2020
    Inventors: Liang-Yu Su, Chih-Wen Yao, Hsiao-Chin Tuan, Ming-Ta Lei
  • Publication number: 20200103846
    Abstract: A method of sentencing, accepting or rejecting, a cast component is disclosed. Initially, scanning the component to determine a number of datum points; this can be done using optical scanning techniques. The datum points from the scanned results are then aligned with an ideal design computer aided design (CAD) model of the component. A comparison of the scanned datum points of the component is performed against the data from the ideal design CAD model of the component, and any geometric deviations between the scan and the ideal design CAD model are determined. Using the datum points from the scan of the component an assessment is performed of at least one performance prediction factor for the component. Finally, using dimensional data extracted from the scan and/or the performance prediction factor the component is sentenced for either acceptance or rejection.
    Type: Application
    Filed: August 21, 2019
    Publication date: April 2, 2020
    Inventors: John COULL, William N. DAWES, Wen Yao LEE
  • Publication number: 20200070488
    Abstract: A silicon contained integrated structure and the method for forming the same is proposed, wherein a hot melt glue layer is adhered under a silicon layer. The hot melt glue layer contains a high temperature hot melt glue layer and a low temperature hot melt glue layer. By the high temperature hot melt glue layer, the hot melt glue layer may be combined to the silicon layer, while the low temperature hot melt glue layer cause the whole structure can be combined to an object, such as cloth. Furthermore, the present invention uses silicon as material. It can be formed as various specific shapes by molding manufacturing and then the silicon integrated sheet can be transferred to cloth. The whole process is quick and cost is low. Moreover, silicon is not deformed due to heat and thus it has lower effect to the environment than other conventional used material.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 5, 2020
    Inventor: WEN YAO CHANG
  • Patent number: 10565218
    Abstract: Interactive sequential pattern mining is disclosed. One example is a system including a sequence miner, and an interaction processor. A sequence database is received, the sequence database including a plurality of input sequences, where each sequence of the plurality of input sequences is an ordered list of events, and each event in the list of events includes at least one item. The sequence miner mines the sequence database for a plurality of candidate sequence patterns, the mining based on an interaction with a user. The interaction processor processes the interaction with the user, the interaction based on domain relevance of the plurality of candidate sequence patterns to the user.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: February 18, 2020
    Assignee: MICRO FOCUS LLC
    Inventors: Wen Yao, Mehran Kafai, April Slayden Mitchell
  • Publication number: 20190390010
    Abstract: A cation-conducting polymer has two or more repeating units of the following formula Owing to the cation-conducting polymer has good physicochemical properties, hydrolytic stability and conductivity, a film formed by coating the liquid cation-conducting polymer can be used as proton exchange membrane to apply in fuel cell system.
    Type: Application
    Filed: June 29, 2018
    Publication date: December 26, 2019
    Inventors: Wen-Yao Huang, Hsu-Feng Lee
  • Publication number: 20190363165
    Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode and a pair of source/drain regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric.
    Type: Application
    Filed: May 23, 2018
    Publication date: November 28, 2019
    Inventors: TA-YUAN KUNG, RUEY-HSIN LIU, CHEN-LIANG CHU, CHIH-WEN YAO, MING-TA LEI