Abstract: Nanolaminates are formed by alternating deposition, e.g., by combustion chemical vapor deposition (CCVD), layers of resistive material and layers of dielectric material. Outer resistive material layers are patterned to form discrete patches of resistive material. Electrical pathways between opposed patches of resistive material on opposite sides of the laminate act as capacitors. Electrical pathways horizontally through resistive material layers, which may be connected by via plated holes, act as resistors.

Abstract: A method for inhibiting replication of reverse transcriptase dependent virus in plant or animal cells, comprising the step of administering to said cells a compound that depletes the intracellular pool of deoxyribonucleoside phosphate in an amount effective to inhibit replication of said virus. Hydroxyurea is one such suitable compound. Also disclosed is a method for producing incomplete reverse- transcriptase dependent viral DNA, by administering a deoxyribonucleoside phosphate-depleting drug to cells infected with such a virus.

Abstract: A fabrication method for a salicide gate is described, wherein the method comprising forming a gate structure on a substrate. The gate structure comprises a polysilicon gate and a selective-deposition dummy layer formed on the polysilicon gate. Source/drain regions are then formed on both sides of the gate structure in the substrate. After this, a dielectric layer is selectively deposited on the substrate, wherein the dielectric layer on the source/drain regions is thicker than the dielectric layer on the anti-reflection layer. A portion of the dielectric layer is removed until the anti-reflection layer is exposed. The anti-reflection layer is subsequently removed, followed by forming a salicide layer on the polysilicon gate to complete the manufacturing of a salicide gate.

Abstract: This invention provides a method of forming a self-aligned silicide of a semiconductor wafer, the surface of the semiconductor wafer comprising at least one silicon device. A cobalt-containing metallic layer is formed on the semiconductor wafer which covers on the surface of the silicon device. A first thermal treatment process is performed to rapidly heat the semiconductor wafer up to 300˜500° C. for 10˜50 seconds and form Co2Si on the surface of the silicon device. A second thermal treatment process is performed to rapidly heat the semiconductor wafer up to 400˜680° C. for 20˜50 seconds and then cool down the semiconductor wafer afterwards so as to convert Co2Si into CoSi. An etching process is performed to remove the metallic layer. A third thermal treatment process is performed to rapidly heat the semiconductor wafer up to 700˜950° C. for 30˜60 seconds and then cool down the semiconductor wafer afterward so as to convert CoSi into the self-aligned silicide.

Abstract: Inter-frequency handoffs in a CDMA or other wireless communication system are controlled using a noise-limited coverage trigger metric which is able to distinguish between same-frequency cell boundaries and other-frequency cell boundaries in the system. The trigger metric may be generated as a function of an average signal-to-noise measure for pilot signals received at a mobile station of the system and a linear sum of the signal-to-noise measures. The signal-to-noise measures may be generated in the mobile station and included in messages transmitted from the mobile station to one or more base stations of the system. The trigger metric is used to control a handoff from a current frequency to a new frequency in an ongoing call. The trigger metric may alternatively be based on a measure of mobile receive power alone.

Abstract: The proposed invention is a salicide process that is used to avoid bridge phenomena.

Abstract: A method of testing a leakage current caused by a self-aligned silicide process is described. The invention uses different test structure to monitor degree of and reason for a leakage current caused by a self-aligned silicide process. While monitoring a self-aligned silicide process performed on a metal-oxide semiconductor transistor without a LDD region, in addition to considering a leakage current occurring from the metal silicide layer to the junction and occurring at edge of the metal silicide layer, the invention further considers a leakage current at comer of the metal silicide layer. For a metal-oxide semiconductor transistor having a LDD region, the invention further considers a leakage current from the metal silicide layer to the LDD region. The invention monitors a leakage current at comer of the metal silicide layer.

Abstract: A method of forming bonding pad commences by forming a conformal barrier layer on a provided inter-metal dielectric layer. A first metal layer is formed on the barrier layer to partially fill the trench. A thin glue layer is formed on the first metal layer. A second metal layer is formed on the glue layer to fill the trench. The second metal layer, the glue layer, the first metal layer and the barrier layer are partially removed to expose the dielectric layer. A bonding pad structure is thus formed in the trench. The bonding pad structure comprises a first metal pad and a second metal pad.

Abstract: A process of forming a silicide on a source/drain region of a MOS device is described, wherein the MOS device has a gate spacer partially covering the source/drain region. A silicon film is formed on the source/drain region, wherein the silicon film has a portion near the gate spacer substantially thinner than the other portion of the silicon film. The silicon film is reacted with a metal film to wholly consume the portion of the silicon film near the gate spacer and to partially consume the other portion of the silicon film.

Abstract: A method of fabricating an HSG electrode. An electrode is defined before the formation of an HSG layer. The HSG layer is then formed on the top surface and the side wall of the electrode. The HSG layer is thermal oxidized in a furnace by rapid thermal process, and a silicon oxide layer is formed on the surface of the HSG layer. Dipping the electrode into a dilute solution of hydrogen fluoride or buffered oxide etching (BOE), the silicon oxide layer is lifted off while an HSG structure is remained on the top surface and the side wall of the electrode.

Abstract: A method for forming an inter-metal dielectric layer without voids therein is described. Wiring lines are formed on a provided substrate. Each of the wiring lines comprises a protective layer thereon. A liner layer is formed over the substrate and over the wiring lines. A fluorinated silicate glass (FSG) layer is formed on the liner layer by using high density plasma chemical vapor deposition (HDPCVD). A thickness of the FSG layer is about 0.9-1 times a thickness of the wiring lines. A cap layer is formed on the FSG layer using HDPCVD. A thickness of the cap layer is about 0.2-0.3 times a thickness of the wiring lines. An oxide layer is formed on the cap layer to achieve a predetermined thickness. A part of the dielectric layer is removed to obtain a planarized surface.

Abstract: A method of fabricating a DRAM capacitor uses tungsten nitride in the process of forming a capacitor. The structure of the capacitor is simple and the process is easily executed. Furthermore, the invention provides a method of forming tungsten nitride, comprising a step of implanting nitrogen into a tungsten silicide layer and a step of executing a rapid thermal process under ammonia gas to form a tungsten nitride layer on the surface of the tungsten silicide layer. The method of fabricating a DRAM capacitor comprises forming the tungsten silicide layer after forming a part smaller than a bottom electrode of the capacitor from doped polysilicon and forming tungsten nitride on the surface of the tungsten nitride layer.

Abstract: The present invention is a extended range concentric cell base station and a method for extending a cell size or access range without incurring ASIC correlator re-design. This is accomplished with a concentric cell base station design that incorporates multiple timing protocols. The concentric base station has associated a micro cell and a macro cell, wherein the micro and macro cells use a different timing protocol that will cause signals transmitted by mobiles within their respective cells to be received within the confines of search windows associated with the timing protocols.

Abstract: Nanolaminates are formed by alternating deposition, e.g., by combustion chemical vapor deposition (CCVD), layers of resistive material and layers of dielectric material. Outer resistive material layers are patterned to form discrete patches of resistive material. Electrical pathways between opposed patches of resistive material on opposite sides of the laminate act as capacitors. Electrical pathways horizontally through resistive material layers, which may be connected by via plated holes, act as resistors.

Abstract: Resistors are formed by selective etching from layered thin film material comprising an insulating substrate, a resistive material which is a mixture of a zero valence metal and a dielectric material, and a layer of conductive material.

Abstract: In thin layer resistors comprising a patch of a layer of resistive material on an insulating substrate and means at spaced apart locations on the patch, the resistive material is formed of 95 to 99.5 wt % of a zero valence metal and between 5 and 0.5 wt % of a dielectric material.

Abstract: Thin layer capacitors are formed from a first flexible metal layer, a dielectric layer between about 0.03 and about 2 microns deposited thereon, and a second flexible metal layer deposited on the dielectric layer. The first flexible metal layer may either be a metal foil, such as a copper, aluminum, or nickel foil, or a metal layer deposited on a polymeric support sheet. Depositions of the layers is by or is facilitate by combustion chemical vapor deposition or controlled atmosphere chemical vapor deposition.

Abstract: Apparatus for aiding in the disassembly of a mechanical assembly, such as an injector head having a plurality of interconnected, stacked plates. The apparatus includes a stationary base with side walls between which the plates are received to maintain registration of the latter during disassembly. A carriage slideably mounted on the base includes a clamp for clamping the head on the base and means for securing a portion of the head on the carriage such that the head portion moves along with the carriage. Through holes in the side walls allow certain of the plates to be secured to the side walls against movement of the carriage such that upward movement of the carriage separates the plates.

Abstract: Precursor solutions are provided to produce thin film resistive materials by combustion chemical vapor deposition (CCVD) or controlled atmosphere combustion chemical vapor deposition (CACCVD). The resistive material may be a mixture of a zero valence metal and a dielectric material, or the resistive materials may be a conductive oxide.

Abstract: A method for inhibiting replication of reverse transcriptase dependent virus in plant or animal cells, comprising the step of administering to said cells a compound that depletes the intracellular pool of deoxyribonucleoside phosphate in an amount effective to inhibit replication of said virus. Hydroxyurea is one such suitable compound. Also disclosed is a method for producing incomplete reverse-transcriptase dependent viral DNA, by administering a deoxyribonucleoside phosphate-depleting drug to cells infected with such a virus.