Patents by Inventor Wen Yi

Wen Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020045345
    Abstract: A method that enhances performance of copper damascene by embedding TiN layer is proposed. The spirit of the invention is that a CVD TiN layer is inserted between the copper seed layer and the dielectric layer to improve the quality of copper layer. Herein, the TiN layer can either be located between the copper seed layer and the barrier layer or be located between the barrier layer and the dielectric layer. Because the barrier layer and the copper seed layer are formed by physical vapor deposition in current mass product, a higher side wall converge of the CVD TiN layer can be obtained owing to the higher conformity nature of CVD technology. Therefore, a better sidewall CVD TiN converge serves as an extra protection layer for copper self diffusion. Furthermore, it also acts as a copper seed layer to remedy side wall void problems due to copper seed layer discontinuity. Thus, not only the quality of copper layer is improved but also the performance of copper damascene process is enhanced.
    Type: Application
    Filed: June 8, 1999
    Publication date: April 18, 2002
    Inventors: CHIUNG-SHENG HSIUNG, WEN-YI HSIEH, WATER LUR
  • Publication number: 20020044593
    Abstract: A method and apparatus to estimate the channel fade (both the amplitude gain/loss and the phase rotation) to assist the receiver to detect and recover the transmitted signal employs a continuous pilot signal such as the pilot code channel or pilot symbols. The channel estimator uses the same scrambling pattern of pilot channel and coherently integrates the continuous pilot signal to yield a channel estimate. The present invention employs adaptive integration duration to yield a channel estimate. The integration duration of the pilot signal for channel estimation is adaptive and proportional to the Doppler period. The Doppler period is proportional to the inverse of Doppler frequency and is an indicator of how fast the channel changes.
    Type: Application
    Filed: May 18, 2001
    Publication date: April 18, 2002
    Inventor: Wen-Yi Kuo
  • Publication number: 20020036999
    Abstract: A method for reducing multiple dominant pilots in a CDMA transmission system comprises linking a transceiver element with a nearby base station for transporting signals between the transceiver element and the nearby base station. Transmitting from the transceiver element forward link signals of a nearby sector associated with the nearby base station. An apparatus is also described.
    Type: Application
    Filed: November 21, 2001
    Publication date: March 28, 2002
    Inventors: Qi Bi, Wen-Yi Kuo, Martin Howard Meyers, Charles Albert Sanders, Carl Francis Weaver
  • Publication number: 20020027890
    Abstract: Inter-frequency handoffs in a CDMA or other wireless communication system are controlled using a noise-limited coverage trigger metric which is able to distinguish between same-frequency cell boundaries and other-frequency cell boundaries in the system. The trigger metric may be generated as a function of an average signal-to-noise measure for pilot signals received at a mobile station of the system and a linear sum of the signal-to-noise measures. The signal-to-noise measures may be generated in the mobile station and included in messages transmitted from the mobile station to one or more base stations of the system. The trigger metric is used to control a handoff from a current frequency to a new frequency in an ongoing call. The trigger metric may alternatively be based on a measure of mobile receive power alone.
    Type: Application
    Filed: June 25, 2001
    Publication date: March 7, 2002
    Applicant: Lucent Technologies Inc.
    Inventors: Neil E. Bernstein, Xiao C. Bernstein, Wen-Yi Kuo, Martin H. Meyers, Xiao Wang, Carl F. Weaver
  • Publication number: 20020025676
    Abstract: A method of making a semiconductor device including a MOS transistor provides an insulator formed on a semiconductor substrate and a gate electrode formed on the insulator. Source/drain regions are formed within the substrate on either side of the gate electrode. A layer of titanium is sputtered onto the semiconductor device, and a layer of titanium nitride is direct sputtered over the titanium layer using a titanium nitride target. The device is annealed at a first temperature to form a structure including titanium silicide on the polysilicon electrode, titanium silicide on the surface of the source/drain regions, unreacted titanium over the silicide regions, and titanium nitride over the unreacted metal. The unreacted titanium and titanium nitride are removed from the structure, and the structure is annealed at a higher temperature than the first temperature to form a lower resistivity titanium silicide.
    Type: Application
    Filed: June 7, 2001
    Publication date: February 28, 2002
    Inventors: Tung-Po Chen, Hong-Tsz Pan, Wen-Yi Hsieh
  • Publication number: 20020022262
    Abstract: The present invention relates to a type of plant tissue culture vessels which comprises a container and a cover, wherein the container is made of transparent synthetic polymers and has a opening, a stress concentration seams which be formed on the circumferential surface and/or bottom of the container and which can be focused the distribution of stresses in certain way that can be safely and easily avulsion before seedlings are removed from the culture vessel.
    Type: Application
    Filed: August 3, 2001
    Publication date: February 21, 2002
    Inventors: Wen-Yi Wang, Hui-Chen Hsu
  • Patent number: 6339025
    Abstract: A method of fabricating a copper capping layer. A silicon rich nitride layer is formed on an exposed copper layer. Since the silicon rich nitride layer has more dangling bonds inside, the silicon in the silicon rich nitride layer easily reacts with the copper and a copper silicide layer is formed between the copper and the silicon rich nitride layer. Therefore, adhesion of the copper and the silicon rich nitride layer can be improved.
    Type: Grant
    Filed: April 3, 1999
    Date of Patent: January 15, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Chien Liu, Kun-Chih Wang, Wen-Yi Hsieh, Yimin Huang
  • Publication number: 20020002222
    Abstract: An organic phosphorus-containing antioxidant which is stablized against hydrolysis includes (a) 20 to 99.9 wt % of organic phosphite or phosphonite; and (b) 0.1 to 80 wt % of acid-binding metal salt treated with a surface conditioning agent, wherein the weight ratio of the surface conditioning agent to the acid-binding metal salt is 0.1 to 50 wt %:99.9 to 50 wt %, and the surface conditioning agent is selected from the group consisting of silanes, titanates, zirconates, aluminates, zirco-alumiates, non-ionic surfactants, and anionic surfactants.
    Type: Application
    Filed: July 28, 1999
    Publication date: January 3, 2002
    Inventors: CHING-FAN CHIU, KUN-CHANG LEE, WEN-YI SU, DONG-BI SHIUEH
  • Publication number: 20010055282
    Abstract: An apparatus for reducing power amplifier headroom in a wireless transmission system comprises an orthogonal modulation circuit and a phase rotation circuit coupled to the orthogonal modulation circuit. The orthogonal modulation circuit utilizes a Walsh code for modulating an in-phase signal and a quadrature signal. The orthogonal modulation circuit has an in-phase output and a quadrature output. The phase rotation circuit rotates phase of the in-phase signal and the quadrature signal, producing a phase rotated in-phase signal and a phase rotated quadrature signal. Multiple Walsh code defined channels are associated with a particular wireless user.
    Type: Application
    Filed: December 15, 1997
    Publication date: December 27, 2001
    Inventors: DOUGLAS KNISELY, WEN-YI KUO, MARTIN HOWARD MEYERS, SANJIV NANDA
  • Patent number: 6329899
    Abstract: A method is provided for forming a patterned layer of resistive material in electrical contact with a layer of electrically conducting material. A three-layer structure is formed which comprises a metal conductive layer, an intermediate layer formed of material which is degradable by a chemical etchant, and a layer of resistive material of sufficient porosity such that the chemical etchant for said intermediate layer may seep through the resistive material and chemically degrade said intermediate layer so that the resistive material may be ablated from said conductive layer wherever the intermediate layer is chemically degraded. A patterned photoresist layer is formed on the resistive material layer. The resistive material layer is exposed to the chemical etchant for said intermediate layer so that the etchant seeps through the porous resistive material layer and degrades the intermediate layer. Then, portions of the resistive material layer are ablated away wherever the intermediate layer has been degraded.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: December 11, 2001
    Assignee: Microcoating Technologies, Inc.
    Inventors: Andrew T. Hunt, Wen-Yi Lin, Shara S. Shoup, Richard W. Carpenter, Stephen E. Bottomley, Tzyy Jiuan Hwang, Michelle Hendrick
  • Publication number: 20010043578
    Abstract: A mobile communications system employs extended channel assignment messaging during the call setup portion of a mobile call. As part of the call setup process, a mobile station sends an access request message to a primary base station that includes a list of alternate base stations. As call setup continues, the mobile station employs diversity reception in monitoring the paging channel of three base stations, each selected as a function of the strength of the signal-to-noise ratios of their respective pilot tones.
    Type: Application
    Filed: August 27, 1997
    Publication date: November 22, 2001
    Inventors: SARATH KUMAR, WEN-YI KUO, KIRAN M. REGE
  • Patent number: 6316323
    Abstract: The proposed invention is used to prevent the bridging issue of salicide process and also to provide a self-aligned contacted process in conventional self-aligned silicide process.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: November 13, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Edberg Fang, Wen-Yi Hsieh, Teng-Chun Tsai
  • Patent number: 6306435
    Abstract: The present invention relates to an oral pharmaceutical preparation which contains an acid or base labile pharmaceutical ingredient which is embedded in an oily matrix which is controlled at neutral pH. The oily matrix-embedded pharmaceutical ingredient is encapsulated and then being coated by an enteric coating. The enteric coating enables the pharmaceutical ingredient to reach the small intestine for absorption. The oily matrix has the advantages of avoiding acidic or basic conditions. It can also isolate moisture and oxygen so as to allow for greater absorption and bioavailability of the pharmaceutical ingredient in vivo.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: October 23, 2001
    Assignee: Yung Shin Pharmaceutical Industrial Co. Ltd.
    Inventors: Gan-Lin Chen, Wen-Yi Hsu
  • Patent number: 6304759
    Abstract: A method for extending a cell radius or access range of a base station without incurring ASIC correlator re-design. This is accomplished using a modified timing protocol that will cause signals transmitted by mobile-telephones positioned beyond the limitations of the ASIC correlator bit limitation to be received within a search window so the signals may be detected and demodulated. In one embodiment, the modified timing protocol incorporates a timing advance technique in which the base station transmits its signals at an advanced time before frame boundaries such that signals transmitted by out-of-range mobile-telephones can be received within a search window beginning at a frame boundary and spanning a time interval corresponding to the ASIC correlator bit limitation. In another embodiment, the modified timing protocol incorporates a shifted search window that begins at an advanced time after a frame boundary and spans a time interval corresponding to the ASIC correlator bit limitation.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: October 16, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Frances Jiang, Wen-Yi Kuo
  • Patent number: 6290413
    Abstract: A writing instrument includes a hollow barrel having a longitudinal slot defined through the barrel. The slot has two sides, and a series of continual indentations are formed in each side. A connecting device is slidably mounted in the barrel. A thrust device is mounted on the periphery of the barrel to drive the connecting device. The connecting device includes two opposite ends with a hollow, cylindrical connector attached to each end to connect to a crayon, a colored pencil or an eraser stick. Consequently, the writing instrument is easy to operate, never dirties the user's hands and can be used as an eraser or a double-color drawing pen.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: September 18, 2001
    Inventor: Wen-Yi Wang
  • Patent number: 6287967
    Abstract: A self-aligned silicide process. A substrate has at least a transistor formed thereon. A thin metal layer is formed over the substrate. A first rapid thermal process is performed to make the metal layer react with polysilicon of the gate and of the source/drain regions to form a first metal silicide layer. The metal layer, which does not react with polysilicon, is removed. A selective raised salicide process is performed to form a second metal silicide layer on the first metal silicide layer. A second rapid thermal process is performed to transform the first metal silicide layer and the second metal silicide layer from a high-resistance C49 phase into a low-resistance C54 phase.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: September 11, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Kevin Hsieh, Michael W C Huang, Wen-Yi Hsieh
  • Publication number: 20010019883
    Abstract: A method for forming an inter-metal dielectric layer without voids therein is described. Wiring lines are formed on a provided substrate. Each of the wiring lines comprises a protective layer thereon. A liner layer is formed over the substrate and over the wiring lines. An FSG layer is formed on the liner layer by using HDPCVD. A thickness of the FSG layer is about 0.9-1 times a thickness of the wiring lines. A cap layer is formed on the FSG layer using HDPCVD. A thickness of the cap layer is about 0.2-0.3 times a thickness of the wiring lines. An oxide layer is formed on the cap layer to achieve a predetermined thickness. A part of the dielectric layer is removed to obtain a planarized surface.
    Type: Application
    Filed: February 22, 2001
    Publication date: September 6, 2001
    Inventors: Chih-Chien Liu, Cheng-Yuan Tsai, Wen-Yi Hsieh, Water Lur
  • Patent number: 6285886
    Abstract: A power control method of the invention may be applied to downlink power control, uplink power control, or both to support different quality of service levels for multiple channels per a mobile station. The power control method transmits control data between a base station and a multi-channel mobile station on a single communications channel or sub-channel to minimize or reduce overhead traffic from the control data.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: September 4, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Raafat Edward Kamel, Wen-Yi Kuo, Martin Howard Meyers, Carl Francis Weaver, Xiao Cheng Wu
  • Patent number: 6277736
    Abstract: A method for forming a gate. A gate oxide layer, a polysilicon layer and a barrier layer are subsequently formed on a substrate, on which an isolation structure is formed. A conductive layer is formed on the barrier layer by sputtering deposition using titanium silicide with a low silicon content as a target. A rapid thermal process (RTP) is performed to remove the polymer nodule formed by sputtering deposition. An anti-reflection layer is formed on the conductive layer. The anti-reflection layer, the conductive layer and the barrier layer are patterned by the etchant composed of chlorine/nitrogen/hexafluoroethane until the polysilicon layer is exposed. Using the anti-reflection layer, the conductive layer and the barrier layer as a mask, the exposed polysilicon layer and the gate oxide layer underlying the exposed polysilicon layer are removed by the etchant composed of chlorine/hydrogen bromide/helium/oxygen until the substrate is exposed and a gate is formed.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: August 21, 2001
    Assignee: United Microelectronics, Corp.
    Inventors: L. Y. Chen, Heinz Shih, Wen-Yi Hsieh, Tsu-An Lin
  • Patent number: 6277721
    Abstract: A method of making a semiconductor device including a MOS transistor provides an insulator formed on a semiconductor substrate and a gate electrode formed on the insulator. Source/drain regions are formed within the substrate on either side of the gate electrode. A layer of titanium is sputtered onto the semiconductor device, and a layer of titanium nitride is direct sputtered over the titanium layer using a titanium nitride target. The device is annealed at a first temperature to form a structure including titanium silicide on the polysilicon electrode, titanium silicide on the surface of the source/drain regions, unreacted titanium over the silicide regions, and titanium nitride over the unreacted metal The unreacted titanium and titanium nitride are removed from the structure, and the structure is annealed at a higher temperature than the first temperature to form a lower resistivity titanium silicide.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: August 21, 2001
    Assignee: United Microelectronics Corporation
    Inventors: Tung-Po Chen, Hong-Tsz Pan, Wen-Yi Hsieh