Abstract: Disclosed is a package and method of forming the package with a mixed pad size. The package includes a first set of pads having a first size and a first pitch, where the first set of pads are solder mask defined (SMD) pads. The package also includes a second set of pads having a second size and a second pitch, where the second set of pads are non-solder mask defined (NSMD) pads.

Abstract: Example error correction methods and apparatus are described. In one example method, a register controller detects an error existing in a memory, and after detecting an uncorrected error (UCE), obtains a memory address in which the UCE occurs. The register controller reads raw data from a location indicated by the memory address, stores preset first data in the location indicated by the memory address, and reads second data from the location after storing the first data in the location. The register controller compares the first data with the second data to determine a first failure location in the location, determines raw data stored in the first failure location from the raw data in the location, and performs error correction on the raw data stored in the first failure location.

Abstract: An airtight device includes a container and an airtight cover on the container, and the airtight cover includes a fixing bracket, a door, and a pressuring handle. The fixing bracket has a through hole and a guiding slot, and the through hole communicates with internal space of the container. The guiding slot has adjacent first and second top surfaces, and the second top surface is higher than the first top surface. The door selectively covers the through hole. The pressuring handle pivoted on the door has a first section, a second section, and a rotating axis between the first and second sections, and the first section rotates relative to the second section. The second section receives a force to drive the first section to move from below the second top surface to below the first top surface such that the rotating axis pressures the door.

Abstract: A photocurrent-generating electrode includes a supporting substrate, a first nanoparticle layer, a second nanoparticle layer, and a semiconductor nanostructure formed on the second nanoparticle layer and having a biocompatible semiconductor nanomaterial. The first nanoparticle layer has first noble metal nanoparticles bonded to the supporting substrate. The second nanoparticle layer is formed on the first nanoparticle layer, and has second noble metal nanoparticles having an average dimension larger than an average dimension of the first noble metal nanoparticles. Two adjacent ones of the second noble metal nanoparticles are electrically connected to each other through one of the first noble metal nanoparticles.

Abstract: Disclosed are examples of integrated circuit (IC) structures and techniques to fabricate IC structures. Each IC package may include a die (e.g., a flip-chip (FC) die) and one or more die interconnects to electrically couple the die to a substrate. The die interconnect may include a pillar, a wetting barrier on the pillar, and a solder cap on the wetting barrier. The wetting barrier may be wider than the pillar. The die interconnect may also include a low wetting layer formed on the wetting barrier.

Abstract: A method for extracting flavone aglycones in Chrysanthemum morifolium is provided. The method includes: (a) immersing a Chrysanthemum morifolium raw material in water or an aqueous solution to perform an immersion procedure for 3.5 hours or more to obtain an immersion sample; and (b) adding an extraction solvent to the immersion sample to perform an extraction procedure 5-60 minutes to obtain an extract. The Chrysanthemum morifolium raw material includes at least one of the following parts of Chrysanthemum morifolium: whole plant, roots, stems, leaves and flowers.

Abstract: A data processing host includes a program running environment and a first isolation environment. The first isolation environment is isolated from the program running environment. The host operates in a non-secure mode in the program running environment, and operates in a secure mode in the first isolation environment. The program running environment includes a virtual instance operating in the non-secure mode, and the first isolation environment corresponds to the virtual instance in the program running environment. The first isolation environment includes an operating system in the secure mode and a resource allocated to the first isolation environment and comprising a first isolation space for running the operation system and a secure processing program, which corresponds to a program in the virtual instance and is for processing to-be-processed data.

Abstract: A field effect transistor and a preparation method thereof, and a semiconductor structure are provided. An example field effect transistor includes: a substrate structure, a source, a drain, and a gate. The source and the drain are arranged on the substrate structure in a first direction, and a channel region is formed between the source and the drain. A channel layer is formed in the channel region, and N carbon nanotubes extending in the first direction are embedded in the channel layer, where N is an integer greater than or equal to 1. Two ends of each of the N carbon nanotubes are respectively connected to the source and the drain to form a conductive path. The gate is formed on the channel layer. In the channel region between the source and the drain, electron conduction is implemented by using the carbon nanotube disposed in the channel layer.

Abstract: A device comprising a package and a board. The package includes a substrate comprising a first surface and a second surface, a passive component coupled to the first surface of the substrate, an integrated device coupled to the second surface of the substrate, a back side metal layer coupled to a back side of the integrated device, a first solder interconnect coupled to the back side metal layer, and a plurality of solder interconnects coupled to the second surface of the substrate. The board is coupled to the package through the plurality of solder interconnects. The first solder interconnect is coupled to the board.

Abstract: A fixing device includes a main body, a sliding block, and a fixing rod. The main body has a sliding rail and a guiding hole, and the sliding rail which is disposed at a front side of the main body vertically extends. The guiding hole adjoins the sliding rail and horizontally extends through the main body. The sliding block is slidably connected to the sliding rail. The fixing rod is movably connected to the sliding block extending through the guiding hole, and the sliding block is configured to move along the sliding rail and enable the guiding hole to drive the fixing rod to horizontally move.

Abstract: An airtight device includes a container and an airtight cover on the container, and the airtight cover includes a fixing bracket, a door, and a pressuring handle. The fixing bracket has a through hole and a guiding slot, and the through hole communicates with internal space of the container. The guiding slot has adjacent first and second top surfaces, and the second top surface is higher than the first top surface. The door selectively covers the through hole. The pressuring handle pivoted on the door has a first section, a second section, and a rotating axis between the first and second sections, and the first section rotates relative to the second section. The second section receives a force to drive the first section to move from below the second top surface to below the first top surface such that the rotating axis pressures the door.

Abstract: A hanging device includes an accommodation main body, a sliding assembly, a hook, and the accommodation main body that includes two parallel sidewalls, in which a first vertical path is defined between the two sidewalls. The sliding assembly is movably connected between the two sidewalls to move relative to the main body along the first vertical path. The sliding assembly further includes a sliding rail which defines a second vertical path, and the hook is movably connected to the sliding rail to move relative to the sliding assembly along the second vertical path.

Abstract: An immersion cooling system includes a cooling tank and a filtration system. The cooling tank is configured to accommodate a liquid coolant and an electronic device immersed in the liquid coolant. The filtration system includes a pipeline, a pump, a filter and a cooling device. The pipeline is in fluid communication with the cooling tank. The pump is disposed in the pipeline and is configured to drive the liquid coolant to flow through the pipeline. The filter is disposed in the pipeline and is configured to filter the liquid coolant. The cooling device is connected to the pipeline and is configured to cool the liquid coolant. The pipeline has an inlet connected to the cooling tank. The cooling device is located between the pump and the inlet of the pipeline.

Abstract: An immersion cooling system includes a tank, a first condenser, an enclosure, a second condenser and a connecting pipe. The tank has a first space. The first space is configured to accommodate a cooling liquid for at least one electronic equipment to immerse therein. The first condenser is disposed inside the tank. The enclosure is disposed outside the tank. The enclosure forms a second space together with the tank. The second condenser is disposed in the second space. The connecting pipe includes a first end and a second end opposite to the first end. The first end is connected with the second condenser. The second end is communicated with the first space.

Abstract: An immersion cooling system includes a cooling tank, a housing and a valve. The coolant tank is configured to accommodate a liquid coolant and an electronic device immersed in the liquid coolant. The housing covers a side of the cooling tank and thereby forms an enclosure. The valve has two ports, one of which communicates with the enclosure and the other communicates with a part of the cooling tank above the liquid coolant. The valve is configured to open in response to a gas pressure inside the cooling tank exceeding an upper limit.

Abstract: An immersion cooling system includes a tank, an isolation plate and a condenser. The tank includes a base plate and a sidewall connected with the base plate. The sidewall defines with the base plate a space configured to accommodate a cooling liquid. The isolation plate connects with the sidewall or the base plate and divides the space into a first subsidiary space and a second subsidiary space. The first subsidiary space is configured to accommodate electronic equipment which is immersed in the cooling liquid. The isolation plate and the base plate are separated from each other. The sidewall surrounds the condenser. A vertical projection of the condenser towards the base plate at least partially overlaps with the second subsidiary space. The electronic equipment evaporates a portion of the cooling liquid to form a vapor. The condenser is configured to condense the vapor into a liquid form.

Abstract: A clock circuit constructed in a processor integrated circuit includes a phase lock loop PLL, a clock tree, and a clock grid. The clock tree includes a plurality of clock buffers in a layered structure, The clock tree is configured to receive a first clock signal clk_1 that is output by the phase lock loop PLL, and to output a second clock signal clk_2. A plurality of child node circuits (400) are disposed on some nodes of the clock grid, and are configured to generate a third clock signal clk_3 based on the second clock signal clk_2. The clock grid (330) and the clock tree (320) are distributed on multiple dies in a three-dimensional structure of the processor integrated circuit.

Abstract: A package that includes a substrate, an integrated device, a plurality of first wire bonds, at least one second wire bond, and an encapsulation layer. The integrated device is coupled to the substrate. The plurality of first wire bonds is coupled to the integrated device and the substrate. The plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate. The at least one second wire bond is coupled to the integrated device. The at least one second wire bond is configured to be free of an electrical connection with a circuit of the integrated device. The encapsulation layer is located over the substrate and the integrated device. The encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.

Abstract: A beverage machine may have a first brew chamber for forming larger, multi-serving beverages, and a second brew chamber for receiving beverage cartridges to form single-serve beverages. Aspects relating to relative positioning of the brew chambers and associated components are described herein. The beverage machine may include a user interface that displays different selection options based on which of the two brew chambers is being used to form a beverage. The beverage machine may include a handle that may be manipulated by a user to both open a brew chamber and to remove a brew basket from the brew chamber. The beverage machine may include a liquid reservoir that removably couples to the machine housing at different discrete positions. The beverage machine may include a liquid supply lid that may be removably coupled to the housing.

Abstract: A memory manager disposed between a memory and a processor. One end of the memory manager is coupled to the processor using a serial line, and the other end of the memory manager is coupled to the memory using a parallel line to provide the processor with a serial interface instead of a parallel interface.