Patents by Inventor Wen Yin

Wen Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220270995
    Abstract: Disclosed are examples of integrated circuit (IC) structures and techniques to fabricate IC structures. Each IC package may include a die (e.g., a flip-chip (FC) die) and one or more die interconnects to electrically couple the die to a substrate. The die interconnect may include a pillar, a wetting barrier on the pillar, and a solder cap on the wetting barrier. The wetting barrier may be wider than the pillar such that during solder reflow, solder wetting of sidewall of the pillar is minimized or prevented all together. The die interconnect may also include a low wetting layer formed on the wetting barrier, which can further mitigate solder wetting problems.
    Type: Application
    Filed: February 25, 2021
    Publication date: August 25, 2022
    Inventors: Wei HU, Dongming HE, Wen YIN, Zhe GUAN, Lily ZHAO
  • Publication number: 20220157705
    Abstract: Disclosed is a package and method of forming the package with a mixed pad size. The package includes a first set of pads having a first size and a first pitch, where the first set of pads are solder mask defined (SMD) pads. The package also includes a second set of pads having a second size and a second pitch, where the second set of pads are non-solder mask defined (NSMD) pads.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 19, 2022
    Inventors: Wen YIN, Yonghao AN, Manuel ALDRETE
  • Publication number: 20220139677
    Abstract: A consumable part for a plasma processing chamber includes a plasma facing side. An engineered surface is formed into the plasma facing side of the consumable part. A plurality of raised features defines the engineered surface, wherein features are arranged in a predefined pattern, wherein each of the plurality of raised features includes a top region having an outer edge and a sidewall. A base surface of the engineered surface is configured to surround each of the plurality of raised features, such that a corresponding sidewall of a corresponding raised feature extends up at an angle from the base surface to a corresponding top region. The consumable part is configured to be installed in the plasma processing chamber. The consumable part is configured to be exposed to a plasma and byproducts of the plasma.
    Type: Application
    Filed: February 5, 2020
    Publication date: May 5, 2022
    Inventors: Gordon Wen-Yin Peng, Adrian Radocea, Yu Jiang, Mansa Rajagopalan, Nicolas Londono
  • Publication number: 20220037224
    Abstract: A package that includes a substrate, an integrated device, a plurality of first wire bonds, at least one second wire bond, and an encapsulation layer. The integrated device is coupled to the substrate. The plurality of first wire bonds is coupled to the integrated device and the substrate. The plurality of first wire bonds is configured to provide at least one electrical path between the integrated device and the substrate. The at least one second wire bond is coupled to the integrated device. The at least one second wire bond is configured to be free of an electrical connection with a circuit of the integrated device. The encapsulation layer is located over the substrate and the integrated device. The encapsulation layer encapsulates the integrated device, the plurality of first wire bonds and the at least one second wire bond.
    Type: Application
    Filed: July 28, 2020
    Publication date: February 3, 2022
    Inventors: Wen YIN, Yonghao AN, Reynante Tamunan ALVARADO
  • Patent number: 11189575
    Abstract: An integrated circuit (IC) package is described. The IC package includes a laminate substrate. The IC package also includes an active die on a surface of the laminate substrate. The IC package further includes fin-based thermal surface mount devices on the surface of the laminate substrate proximate the active die to provide an additional heat dissipation path.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: November 30, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Supatta Niramarnkarn, Bin Xu, Wen Yin, Yonghao An
  • Publication number: 20210358860
    Abstract: An integrated circuit (IC) package is described. The IC package includes a laminate substrate. The IC package also includes an active die on a surface of the laminate substrate. The IC package further includes fin-based thermal surface mount devices on the surface of the laminate substrate proximate the active die to provide an additional heat dissipation path.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Supatta NIRAMARNKARN, Bin XU, Wen YIN, Yonghao AN
  • Patent number: 11109538
    Abstract: A method for producing galanthamine using a plant, includes (a) performing a thermal treatment on a living plant to induce accumulation of galanthamine therein, wherein the living plant is a plant belonging to the family Amaryllidaceae; and (b) placing the living plant in a medium and performing an electrical stimulation treatment on the living plant to release the galanthamine from the living plant to the medium.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: September 7, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Yin Chen, Tsung-Lin Yang, Yung-Chi Kuo
  • Publication number: 20210225616
    Abstract: Components and processes are disclosed herein for managing non-volatile and/or low-volatility byproduct materials that are generated within a plasma processing region of a plasma processing chamber during performance of various plasma-based processes on a substrate. The components include a top window structure, a liner structure, an edge ring structure, a focus ring structure, a ground ring structure, a substrate access port shield, an insert liner for a port opening in a chamber wall, and an exhaust baffle assembly for positioning within an exhaust channel connected to the chamber. One or more process-exposed surface(s) of the various components are subjected to a surface roughening/texturizing process to impart a surface roughness and/or engineered topography to the process-exposed surface that promotes adhesion and retention of plasma process byproduct materials.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 22, 2021
    Inventors: Gordon Wen-Yin Peng, Ambarish (Rish) Chhatre, Dan Marohl, Tamarak Pandhumsoporn, Ignacio (Nacho) Chazaro
  • Publication number: 20210223122
    Abstract: The present invention discloses a stress sensor structure and a manufacturing method thereof, wherein the stress sensor structure comprises: a substrate; a blind-hole, provided on a first surface of the substrate; a first piezoresistive layer and a second piezoresistive layer, formed by material with piezoresistive effect, provided on a lateral wall of the blind-hole and interconnected at bottom portions of the layers; a second insulating layer, provided between the first piezoresistive layer and the second piezoresistive layer; a first electrode, provided on the first surface of the substrate and connected to the first piezoresistive layer; a second electrode, provided on the first surface of the substrate and connected to the second piezoresistive layer.
    Type: Application
    Filed: November 24, 2017
    Publication date: July 22, 2021
    Inventors: Wen Yin, Heng Yang, Chuanguo Dou, Wenqi Zhang, Tingyu Lin, Liqiang Cao
  • Patent number: 11064658
    Abstract: A method for inducing plants to increase their flavonoid compound content, includes performing an induction culture on a young shoot or an adult of a living plant, wherein flavonoid compound content of the young shoot or the adult of the living plant which has been subjected to the induction culture is higher than that of a young shoot or an adult of a living plant which is not subjected to the induction culture. Moreover, the induction culture includes a metal ion stimulation procedure comprising culturing the young shoot or the adult of the living plant in a culture environment with metal ion stimulation, wherein the culture environment with metal ion stimulation contains a metal ion used for stimulating the living plant, and the concentration of the metal ion used for stimulating the living plant is 5 ?M-50 mM.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: July 20, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Yin Chen, Tsung-Lin Yang
  • Patent number: 11067459
    Abstract: The present invention discloses a stress sensor structure and a manufacturing method thereof, wherein the stress sensor structure comprises: a substrate; a blind-hole, provided on a first surface of the substrate; a first piezoresistive layer and a second piezoresistive layer, formed by material with piezoresistive effect, provided on a lateral wall of the blind-hole and interconnected at bottom portions of the layers; a second insulating layer, provided between the first piezoresistive layer and the second piezoresistive layer; a first electrode, provided on the first surface of the substrate and connected to the first piezoresistive layer; a second electrode, provided on the first surface of the substrate and connected to the second piezoresistive layer.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: July 20, 2021
    Assignee: NATIONAL CENTER FOR ADVANCED PACKAGE
    Inventors: Wen Yin, Heng Yang, Chuanguo Dou, Wenqi Zhang, Tingyu Lin, Liqiang Cao
  • Patent number: 10839130
    Abstract: A computer-implemented method, and associated system and computer program product, for use in a design process for an integrated circuit (IC) comprises dividing a layout of a metal layer of the IC into a grid comprising a plurality of grid regions, calculating a respective weight for each grid region of the plurality of grid regions, and forming a plurality of groups based on a similarity of the respective weights. Each group of the plurality of groups respectively comprises one or more contiguous grid regions of the plurality of grid regions. The method further comprises assigning each group of the plurality of groups to a respective routing width group type of a plurality of routing width group types, and determining a location for one or more separator cells between adjacent groups of the plurality of groups that are of different routing width group types.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: November 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yue Xu, Wen Yin, Tong Zhao, Jin Song Jiang, Yang Liu
  • Publication number: 20200113137
    Abstract: A method for inducing plants to increase their flavonoid compound content, includes performing an induction culture on a young shoot or an adult of a living plant, wherein flavonoid compound content of the young shoot or the adult of the living plant which has been subjected to the induction culture is higher than that of a young shoot or an adult of a living plant which is not subjected to the induction culture. Moreover, the induction culture includes a metal ion stimulation procedure comprising culturing the young shoot or the adult of the living plant in a culture environment with metal ion stimulation, wherein the culture environment with metal ion stimulation contains a metal ion used for stimulating the living plant, and the concentration of the metal ion used for stimulating the living plant is 5 ?M-50 mM.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 16, 2020
    Applicant: Industrial Technology Research Institute
    Inventors: Wen-Yin CHEN, Tsung-Lin YANG
  • Patent number: 10565347
    Abstract: Method and apparatus for global routing optimization are provided herein. Optimizing global routing of a circuit, includes recursively generating, in parallel, a plurality of candidate wiring layouts for an integrated circuit, wherein each candidate wiring layout of the plurality of candidate wiring layouts corresponds to a respective parameter super-group of a plurality of parameter super-groups, wherein the plurality of parameter super-groups form a parameter set; calculating a Quality of Result (QoR) measure for each candidate wiring layout in an iteration; combining selected parameter super-groups of the iteration, based on the QoR measure, to form a new plurality of parameter super-groups for a next iteration; and determining a best parameter super-group from the parameter sets for use in globally routing the circuit.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: You Hang Wang, Xu Yue, Wen Yin
  • Publication number: 20190355982
    Abstract: A negative electrode of a thin film battery and method for forming the same, wherein the negative electrode comprises a porous structural layer, a capacitor layer, and a lithium ion source layer. The porous structural layer is formed on a metal substrate, and a thickness of the porous structural layer is between 200 nm and 700 nm. The capacitor layer is formed on the porous structural layer, and a thickness is between 100 nm and 300 nm. The lithium ion source layer is formed on the capacitor layer. Since the porous structural layer is made of stable material, a problem of charging-discharging instability that is occurred due to damage of battery structure caused by the volume expansion of the capacitor layer during the charging-discharging process can be improved. In addition, the negative electrode can be combined with a positive electrode for forming a thin film battery.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 21, 2019
    Applicant: Securitag Assembly Group Co., Ltd
    Inventors: Kuan-Jiuh Lin, Wen-Yin Ko, Man-Jyun Fang, Chia Ming Kuo, Wayyu Chen, Yu Ching Wang
  • Publication number: 20190303526
    Abstract: Method and apparatus for global routing optimization are provided herein. Optimizing global routing of a circuit, includes recursively generating, in parallel, a plurality of candidate wiring layouts for an integrated circuit, wherein each of the candidate wiring layouts corresponds to a respective one of a plurality of parameter super-groups, wherein the plurality of parameter super-groups form a parameter set; calculating a Quality of Result (QoR) measure for each candidate wiring layout in an iteration; combining selected parameter super-groups of the iteration, based on the QoR measure, to form a new plurality of parameter super-groups for a next iteration; and determining a best parameter super-group from the parameter sets for use in globally routing the circuit.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: You Hang WANG, Xu YUE, Wen YIN
  • Patent number: 10349645
    Abstract: A single-bearing reel includes a reel unit, a spool shaft, a support unit, a spool, a first restriction member, a second restriction member, a pair of first seal members, a second seal member, and a third seal member. The pair of first seal members is disposed on an outer peripheral surface of the support unit. One of the pair of first seal members seals between the support unit and the first restriction member. The other of the pair of first seal members seals between the support unit and the second restriction member. The second seal member seals an inner peripheral part of the support unit from an inner peripheral part of the first restriction member. A third seal member seals the inner peripheral part of the support unit from an inner peripheral part of the second restriction member.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: July 16, 2019
    Assignees: SHIMANO INC., SHIMANO COMPONENTS (MALAYSIA) SDN, BHD.
    Inventors: Keigo Kitajima, Chun Wee Chew, Muhamad Aidil Bin Misseri, Wen Yin Lee
  • Publication number: 20190203238
    Abstract: A method for producing galanthamine using a plant, includes (a) performing a thermal treatment on a living plant to induce accumulation of galanthamine therein, wherein the living plant is a plant belonging to the family Amaryllidaceae; and (b) placing the living plant in a medium and performing an electrical stimulation treatment on the living plant to release the galanthamine from the living plant to the medium.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Wen-Yin CHEN, Tsung-Lin YANG, Yung-Chi KUO
  • Patent number: 10312235
    Abstract: A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure. Next, an insulation material layer is formed on the substrate. Then, a portion of the first fin structure is removed, to form a first recess. Following this, a first buffer layer and a first channel layer are formed sequentially in the first recess. Next, a portion of the second fin structure is removed, to form a second recess. Then, a second buffer layer and a second channel layer are formed in the second recess sequentially, wherein the second buffer layer is different from the first buffer layer.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: June 4, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Yin Weng, Cheng-Tung Huang, Wei-Heng Hsu, Yu-Ming Lin, Ya-Ru Yang
  • Patent number: 10268754
    Abstract: A method for indexing with redundant information. The method may identify unknown code points for a document in response to an indexing request for the document. The method may further convert the identified unknown code points into a plurality of converted code points. Each set of converted code points of the plurality uses a different codepage. The method may further identify sets of same code points and sets of redundant code points from the plurality of converted code points. The method may build an index based on the sets of same code points and the sets of redundant code points.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: April 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Si Bin Fan, Peng Hui Jiang, Lin Sun, Yan Sun, Li Xiang, Yan Xu, Wen Yin