Abstract: A method of semiconductor device fabrication includes providing a substrate including a first fin element and a second fin element extending from the substrate. A first layer is formed over the first and second fin elements, where the first layer includes a gap. A laser anneal process is performed to the substrate to remove the gap in the first layer. An energy applied to the first layer during the laser anneal process is adjusted based on a height of the first layer.

Abstract: A method of manufacturing a Fin FET includes forming a fin structure including an upper layer. Part of the upper layer is exposed from an isolation insulating layer. A dummy gate structure is formed over part of the fin structure. The dummy gate structure includes a dummy gate electrode layer and a dummy gate dielectric layer. An interlayer insulating layer is formed over the dummy gate structure. The dummy gate structure is removed so that a space is formed. A gate dielectric layer is formed in the space. A first metal layer is formed over the gate dielectric in the space. A second metal layer is formed over the first metal layer in the space. The first and second metal layers are partially removed, thereby reducing a height of the first and second metal layers. A third metal layer is formed over the partially removed first and second metal layers.

Abstract: The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function metal layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode.

Abstract: A method and structure for providing a pre-deposition treatment (e.g., of a work-function layer) to accomplish work function tuning. In various embodiments, a gate dielectric layer is formed over a substrate, and a work-function metal layer is deposited over the gate dielectric layer. In some embodiments, a first in-situ process including a pre-treatment process of the work-function metal layer is performed. By way of example, the pre-treatment process removes an oxidized layer of the work-function metal layer to form a treated work-function metal layer. In some embodiments, after performing the first in-situ process, a second in-situ process including a deposition process of another metal layer over the treated work-function metal layer is performed.

Abstract: The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function meta layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode.

Abstract: Various methods and structures formed by those methods are described. In accordance with a method, a first metal-containing layer is formed on a substrate. A second metal-containing layer is formed on the substrate. A material of the first metal-containing layer is different from a material of the second metal-containing layer. A chlorine-based treatment is performed on the first metal-containing layer and the second metal-containing layer. A third metal-containing layer is deposited on the first metal-containing layer and the second metal-containing layer using Atomic Layer Deposition (ALD).

Abstract: A method of manufacturing a Fin FET includes forming a fin structure including an upper layer. Part of the upper layer is exposed from an isolation insulating layer. A dummy gate structure is formed over part of the fin structure. The dummy gate structure includes a dummy gate electrode layer and a dummy gate dielectric layer. An interlayer insulating layer is formed over the dummy gate structure. The dummy gate structure is removed so that a space is formed. A gate dielectric layer is formed in the space. A first metal layer is formed over the gate dielectric in the space. A second metal layer is formed over the first metal layer in the space. The first and second metal layers are partially removed, thereby reducing a height of the first and second metal layers. A third metal layer is formed over the partially removed first and second metal layers.

Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.

Abstract: One or more semiconductor devices are provided. The semiconductor device comprises a gate body, a conductive prelayer over the gate body, at least one inhibitor film over the conductive prelayer and a conductive layer over the at least one inhibitor film, where the conductive layer is tapered so as to have a top portion width that is greater than the bottom portion width. One or more methods of forming a semiconductor device are also provided, where an etching process is performed to form a tapered opening such that the tapered conductive layer is formed in the tapered opening.

Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.

Abstract: An N work function metal for a gate stack of a field effect transistor (FinFET) and method of forming the same are provided. An embodiment FinFET includes a fin supported by a semiconductor substrate, the fin extending between a source and a drain and having a channel region, and a gate stack formed over the channel region of the fin, the gate stack including an N work function metal layer comprising an oxidation layer on opposing sides of a tantalum aluminide carbide (TaAlC) layer.

Abstract: The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function meta layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode.

Abstract: A micro electro mechanical display module including a first substrate, a light source and a color filter layer is provided. The first substrate includes a first substrate body, a light-shielding pattern layer and light-shielding units. The light-shielding pattern layer has first openings. Each light-shielding unit includes a light-shielding shutter having one second opening. The shutter light-shielding shutter is movable relative to the light-shielding pattern layer. When one of the light-shielding units is enabled, the second opening is aligned with one of the first openings, so that the white light provided by the light source passes through the light-shielding pattern layer and the one of the light-shielding units and then passes through the color filter layer. When the one of the light-shielding units is not enabled, the second opening is not aligned with the one of the first openings, so that the white light is blocked by the light-shielding shutter.

Abstract: A fabricating method of a touch cover is provided. The method includes shaping a substrate so that the substrate has an inner plane and an inner side surface extending from the inner plane, wherein the inner plane and the inner side surface are not coplanar. A conductor layer is formed all over the inner plane and the inner side surface of the substrate. The conductor layer is patterned to form a sensing circuit on the inner plane and to form at least a portion of a grounding circuit on the inner side surface.

Abstract: An electronic device comprises a housing and a display panel installed in the housing. The display panel comprises a first substrate, a second substrate disposed opposite to the first substrate and a display medium disposed between the first substrate and the second substrate. The first substrate comprises a first substrate body, pixel units arranged in an array on the first substrate body, data lines disposed on the first substrate body and electrically connected to the pixel units, a first insulation layer and scan lines disposed on the first substrate body and electrically connected to the pixel units. Each of the scan lines has a first part and a second part connecting to the first part. The first parts of the scan lines are interlaced with the data lines. The second parts of the scan lines are substantially overlapped with the data lines with the first insulation layer disposed therebetween.

Abstract: A touch cover including a substrate, a sensing circuit and a grounding circuit is provided. The substrate has an inner plane and an inner side surface extending from the inner plane. The inner plane and the inner side surface are not coplanar. The sensing circuit is disposed on the inner plane. At least a portion of the grounding circuit is disposed on the inner side surface. An electronic apparatus with the touch cover and a fabricating method of the touch cover are also provided.

Abstract: A display panel includes a first substrate, a second substrate and a plurality of pixel units. The pixel units are disposed between the first substrate and the second substrate, and each of the pixel units includes a reflective electrode disposed on the first substrate, a plurality of colored charged particles located between the reflective electrode and the second substrate and a lateral electrode disposed on the first substrate and extended towards the second substrate. When a first voltage is applied to the reflective electrode, the charged particles are repelled to the second substrate to display the color of the charged particles due to the affection of a first electric field, when a second voltage is applied to the lateral electrode, the charged particles are attracted to the lateral electrode due to the affection of a second electric field. Further, a driving method of a display panel is also provided.

Abstract: A micro-electro-mechanical (MEM) display module including a MEM display panel and a light-emitting apparatus is provided. The MEM display panel includes a plurality of first light-shielding units, a plurality of second light-shielding units, a light-shielding pattern layer and a reflective pattern layer. Each first light-shielding unit includes a first movable light-shielding device having at least one first opening. Each second light-shielding unit includes a second movable light-shielding device having at least one second opening. The light-shielding pattern layer has a plurality of third openings. In a display mode, the first opening of at least one first movable light-shielding device overlaps at least one third opening, and each second movable light-shielding device covers the reflective pattern layer.

Abstract: A display panel includes a first substrate, a second substrate and a plurality of pixel units. The pixel units are disposed between the first substrate and the second substrate, and each of the pixel units includes a reflective electrode disposed on the first substrate, a plurality of colored charged particles located between the reflective electrode and the second substrate and a lateral electrode disposed on the first substrate and extended towards the second substrate. When a first voltage is applied to the reflective electrode, the charged particles are repelled to the second substrate to display the color of the charged particles due to the affection of a first electric field, when a second voltage is applied to the lateral electrode, the charged particles are attracted to the lateral electrode due to the affection of a second electric field. Further, a driving method of a display panel is also provided.

Abstract: A display apparatus and an image forming method are provided. The display apparatus includes a transparent display layer and a light modification layer. The transparent display layer includes a plurality of pixel units for displaying an image. The light modification layer disposed under the transparent display layer and includes a substrate body having a plurality of first apertures and a plurality of shutter units disposed above the substrate body. When at least one of the shutter units is moved to a first position, an incident light transmits through the shutter unit and is reflected by the substrate body. When at least one of the shutter units is moved to a second position, the incident light transmits through the shutter unit and the at least one of first apertures.