Patents by Inventor Wenliang Chen

Wenliang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10927051
    Abstract: Disclosed is a method for preparing aromatic hydrocarbons, particularly relates to the preparation of the aromatic hydrocarbons by passing methanol and carbon monoxide through a reactor loaded with an acidic ZSM-5 molecular sieve catalyst containing no metal additive under reaction conditions. Compared with the prior art, the method provided by the present invention can improve and stabilize the selectivity to aromatic hydrocarbons, particularly BTX, by adding carbon monoxide in methanol aromatization, and also prolongs the single-pass life of the catalyst. The performance of an inactivated catalyst is not significantly degraded after repeated regenerations. Furthermore, the catalyst preparation process omits the step of adding a metal additive, so that not only the process is simplified, but also costs are greatly reduced, and environmental protection is facilitated.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: February 23, 2021
    Assignee: Dalian Institute of Chemical Physics, Chinese Academy of Sciences
    Inventors: Youming Ni, Wenliang Zhu, Zhongmin Liu, Zhiyang Chen, Yong Liu, Hongchao Liu, Xiangang Ma, Shiping Liu
  • Publication number: 20210050410
    Abstract: A capacitor device includes: a substrate; an insulation film, disposed on the substrate; at least one capacitor unit cell, being covered by the insulation film on the substrate, the at least one capacitor unit cell having at least one first electrode and at least one second electrode disposed over the first electrode; an exposed conductive layer, disposed on the at least one capacitor unit cell and the insulation film, the exposed conductive layer having a first conductive pad formed on a first side of the exposed conductive layer and a second conductive pad formed on a second side different from the first side; wherein the first conductive pad and the second conductive pad are electrically connected to the at least one first electrodes and the at least one second electrodes of the at least one capacitor unit cell respectively.
    Type: Application
    Filed: October 30, 2020
    Publication date: February 18, 2021
    Applicants: AP Memory Technology Corp., AP Memory Technology (Hangzhou) Limited Co.
    Inventors: Masaru HARAGUCHI, Yoshitaka FUJIISHI, Wenliang CHEN
  • Patent number: 10919832
    Abstract: Provided is a method for preparing a lower unsaturated fatty acid ester, which comprises carrying out an aldol condensation reaction between dimethoxymethane (DMM) and a lower acid or ester with a molecular formula of R1—CH2—COO—R2 on an acidic molecular sieve catalyst in an inert atmosphere to obtain a lower unsaturated fatty acid or ester(CH2?C(R1)—COO—R2), wherein R1 and R2 are groups each independently selected from the group consisting of H— and C1-C4 saturated alkyl group.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: February 16, 2021
    Assignee: Dalian Institute of Chemical Physics, Chinese Academy of Sciences
    Inventors: Zhanling Ma, Wenliang Zhu, Xiangang Ma, Hongchao Liu, Yong Liu, Youming Ni, Shiping Liu, Qiwei Chen, Zhongmin Liu
  • Patent number: 10885980
    Abstract: In one embodiment, a device is described for using ferroelectric material in a memory cell. In another embodiment, a method of operating a ferroelectric memory cell is described. Other embodiments are likewise described.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: January 5, 2021
    Assignee: AP Memory Corp., USA
    Inventor: Wenliang Chen
  • Publication number: 20200411497
    Abstract: A method of assembling a microelectronic package includes the step of: stacking a processing device vertically with at least one memory device and electrically connecting the processing device to a plurality of conductive interconnects of one of the at least one memory device, wherein each of the at least one memory device includes: a substrate, presenting a front surface and a back surface; and a plurality of memory units formed on the front surface, each of which comprises a plurality of memory cells and the conductive interconnects electrically connected to the memory cells; and arranging the conductive interconnects to contribute to a plurality of signal channels each of which dedicated to transmit signals from the processing device to one of the memory units and vice versa.
    Type: Application
    Filed: September 13, 2020
    Publication date: December 31, 2020
    Inventors: Wenliang Chen, Lin Ma, Alessandro Minzoni
  • Patent number: 10879498
    Abstract: An organic light emitting diode (OLED) display device includes an OLED display panel, a first insulating layer disposed on the OLED display panel, a first metal layer disposed on the first insulating layer, a second insulating layer disposed on the first metal layer and the first insulating layer, a second metal layer disposed on the second insulating layer, a black matrix disposed on the second metal layer, a hard mask disposed on the black matrix, and color resists disposed on the OLED display panel. The OLED display panel includes sub-pixels. Openings extend through the second metal layer, the black matrix, and the hard mask and are positioned corresponding to the sub-pixels. Each color resist is disposed in the openings. The present invention can effectively eliminate reflective light under strong light, and provide a manufacturing process implemented with a small number of masks at a lower product cost.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: December 29, 2020
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Lei Wang, Wenxu Xianyu, Wenliang Gong, Xiaowen Huang, Zesheng Chen
  • Publication number: 20200402951
    Abstract: A method for manufacturing a semiconductor structures is provided. The method includes forming a first hybrid bonding layer over a first wafer having a logic structure, forming a second hybrid bonding layer over a second wafer having a first capacitor structure, bonding the first wafer and the second wafer through a hybrid bonding operation to connect the first hybrid bonding layer and the second hybrid bonding layer, thereby obtaining a first bonded wafer, and the first capacitor structure is electrically connected to the logic structure through the first hybrid bonding layer and the second hybrid bonding layer, and singulating the first bonded wafer to obtain a plurality of semiconductor structures.
    Type: Application
    Filed: September 1, 2020
    Publication date: December 24, 2020
    Inventors: WENLIANG CHEN, JUN GU, MASARU HARAGUCHI, TAKASHI KUBO, CHIEN AN YU, CHUN YI LIN
  • Publication number: 20200402903
    Abstract: A circuit assembly includes an integrated circuit (IC) die and a first capacitor die. The IC die provides an IC and includes a plurality of first conductive pads. The first capacitor die provides a plurality of capacitors, and includes a plurality of second conductive pads at the first side and a plurality of conductive vias at the second side. At least one of the second conductive pads electrically connects to the capacitors. The conductive vias is adapted to form a plurality of external signal connections of the IC die and the first capacitor die. The IC die is stacked with the first capacitor die in such a way that the first conductive pads electrically connect to the second conductive pads, and surfaces of the IC die and the first capacitor die attaching to each other are substantially of the same size.
    Type: Application
    Filed: September 2, 2020
    Publication date: December 24, 2020
    Applicant: AP Memory Technology Corp.
    Inventors: Wenliang CHEN, Jun GU, Masaru HARAGUCHI, Takashi KUBO, Chien-An YU, Chun Yi LIN
  • Publication number: 20200373842
    Abstract: This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.
    Type: Application
    Filed: May 21, 2020
    Publication date: November 26, 2020
    Inventors: WENLIANG CHEN, REZA SHARIFI, BYRON MITCHELL REED, JAIRO DANIEL OLIVARES, RYAN ERIK LIND
  • Publication number: 20200364547
    Abstract: The present disclosure relates to a neural network artificial intelligence chip and a method for forming the same. The neural network artificial intelligence chip includes: a storage circuit, that includes a plurality of storage blocks; and a calculation circuit, that includes a plurality of logic units, the logic units being correspondingly coupled one-to-one to the storage blocks, and the logic unit being configured to acquire data in the corresponding storage block and store data to the corresponding storage block.
    Type: Application
    Filed: April 17, 2020
    Publication date: November 19, 2020
    Applicants: ICLEAGUE Technology Co., Ltd., AP Memory Technology Corp.
    Inventors: Wenliang CHEN, Eugene Jinglun TAM, Lin MA, Joseph Zhifeng XIE, Alessandro MINZONI
  • Publication number: 20200365593
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first hybrid bonding structure, a memory structure, and a control circuit structure. The first hybrid bonding layer includes a first surface and a second surface. The memory structure is in contact with the first surface. The control circuit structure is configured to control the memory structure. The control circuit structure is in contact with the second surface. A system in package (SiP) structure and a method for manufacturing a plurality of semiconductor structures are also provided.
    Type: Application
    Filed: July 3, 2020
    Publication date: November 19, 2020
    Inventors: WENLIANG CHEN, LIN MA
  • Patent number: 10815162
    Abstract: A method for preparing aromatics from syngas, which includes a) contacting a raw material stream containing syngas with a catalyst in a reaction zone under reaction conditions sufficient to convert at least part of the raw material to obtain a reaction effluent; b) separating the reaction effluent to obtain at least a recycle stream containing gas-phase hydrocarbons having 1 to 4 carbon atoms and unconverted syngas and a liquid stream containing hydrocarbons having 5 or more carbon atoms; c) returning the recycle stream to the reaction zone; and d) separating aromatic products from the liquid stream, wherein the catalyst includes at least one of an inert carrier-confined highly dispersed metal oxide material, an acidic molecular sieve, and, optionally, graphite powder and a dispersant.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: October 27, 2020
    Assignee: DALIAN INSTITUTE OF CHEMICAL PHYSICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Youming Ni, Wenliang Zhu, Zhongmin Liu, Yong Liu, Zhiyang Chen, Hongchao Liu, Xiangang Ma, Shiping Liu
  • Patent number: 10811402
    Abstract: The invention provides a memory device and microelectronic package having the same. The microelectronic package comprises at least one memory device which is adapted to be stacked vertically with one another, and a processing device stacked vertically and adjacently with the at least one memory device and electrically connected to the conductive interconnects. Each of the memory devices comprises a substrate and a plurality of memory units. The substrate presents a front surface and a back surface. The memory units are formed on the front surface, each of which comprises a plurality of memory cells and a plurality of conductive interconnects electrically connected to the memory cells. In each of the memory units, the conductive interconnects contribute to a plurality of signal channels each of which is dedicated to transmit signals from the processing device to one of the memory units and vice versa.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: October 20, 2020
    Assignee: AP Memory Technology Corp.
    Inventors: Wenliang Chen, Lin Ma, Alessandro Minzoni
  • Publication number: 20200323850
    Abstract: The present invention relates to a kinase inhibitor, comprising a compound of Formula I or a pharmaceutically acceptable salt, solvate, ester, acid, metabolite or prodrug thereof. The present invention also relates to a pharmaceutical composition comprising the kinase inhibitor, and to uses and methods for using these compounds and compositions to inhibit the activity of wild-type FLT3, mutant FLT3-ITD, PDGFR? and/or PDGFR? kinase in a cell or a subject, as well as uses and methods of these compounds and compositions to preventing or treating kinase-associated conditions in a subject.
    Type: Application
    Filed: December 26, 2017
    Publication date: October 15, 2020
    Applicant: HEFEI INSTITUTES OF PHYSICAL SCIENCE, CHINESE ACADEMY OF SCIENCES
    Inventors: Qingsong LIU, Jing LIU, Xiaofei LIANG, Beilei WANG, Kailin YU, Zongru JIANG, Cheng CHEN, Chen HU, Wenchao WANG, Fengming ZOU, Qingwang LIU, Feng LI, Wenliang WANG, Li WANG
  • Publication number: 20200270188
    Abstract: A method for directly preparing p-xylene from synthetic gas and aromatic hydrocarbon. The method includes contacting the feedstock containing synthetic gas and aromatic hydrocarbon excluding p-xylene with the catalyst in the reaction zone under reaction conditions sufficient to convert at least part of the feedstock to obtain a reaction effluent containing p-xylene; and separating p-xylene from the reaction effluent, where the catalyst includes a highly dispersed metal oxide material confined by an inert carrier, an acidic molecular sieve, and optionally at least one of graphite powder and dispersant, where in the highly dispersed metal oxide material confined by the inert carrier, the inert carrier is at least one of silicon oxide and alumina, and the content of the metal oxide in terms of metal is less than or equal to 10% by mass calculated based on the weight of the highly dispersed metal oxide material confined by the inert carrier.
    Type: Application
    Filed: November 21, 2017
    Publication date: August 27, 2020
    Applicant: DALIAN INSTITUTE OF CHEMICAL PHYSICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Youming NI, Wenliang ZHU, Zhongmin LIU, Yong LIU, Zhiyang CHEN, Hongchao LIU, Xiangang MA, Shiping LIU
  • Publication number: 20200274106
    Abstract: An organic light emitting diode (OLED) display device includes an OLED display panel, a first insulating layer disposed on the OLED display panel, a first metal layer disposed on the first insulating layer, a second insulating layer disposed on the first metal layer and the first insulating layer, a second metal layer disposed on the second insulating layer, a black matrix disposed on the second metal layer, a hard mask disposed on the black matrix, and color resists disposed on the OLED display panel. The OLED display panel includes sub-pixels. Openings extend through the second metal layer, the black matrix, and the hard mask and are positioned corresponding to the sub-pixels. Each color resist is disposed in the openings. The present invention can effectively eliminate reflective light under strong light, and provide a manufacturing process implemented with a small number of masks at a lower product cost.
    Type: Application
    Filed: April 8, 2019
    Publication date: August 27, 2020
    Inventors: Lei WANG, Wenxu XIANYU, Wenliang GONG, Xiaowen HUANG, Zesheng CHEN
  • Publication number: 20200270187
    Abstract: A method for preparing aromatics from syngas, which includes a) contacting a raw material stream containing syngas with a catalyst in a reaction zone under reaction conditions sufficient to convert at least part of the raw material to obtain a reaction effluent; b) separating the reaction effluent to obtain at least a recycle stream containing gas-phase hydrocarbons having 1 to 4 carbon atoms and unconverted syngas and a liquid stream containing hydrocarbons having 5 or more carbon atoms; c) returning the recycle stream to the reaction zone; and d) separating aromatic products from the liquid stream, wherein the catalyst includes at least one of an inert carrier-confined highly dispersed metal oxide material, an acidic molecular sieve, and, optionally, graphite powder and a dispersant.
    Type: Application
    Filed: October 29, 2018
    Publication date: August 27, 2020
    Applicant: DALIAN INSTITUTE OF CHEMICAL PHYSICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Youming NI, Wenliang ZHU, Zhongmin LIU, Yong LIU, Zhiyang CHEN, Hongchao LIU, Xiangang MA, Shiping LIU
  • Publication number: 20200212027
    Abstract: The invention provides a memory device and microelectronic package having the same. The microelectronic package comprises at least one memory device which is adapted to be stacked vertically with one another, and a processing device stacked vertically and adjacently with the at least one memory device and electrically connected to the conductive interconnects. Each of the memory devices comprises a substrate and a plurality of memory units. The substrate presents a front surface and a back surface. The memory units are formed on the front surface, each of which comprises a plurality of memory cells and a plurality of conductive interconnects electrically connected to the memory cells. In each of the memory units, the conductive interconnects contribute to a plurality of signal channels each of which is dedicated to transmit signals from the processing device to one of the memory units and vice versa.
    Type: Application
    Filed: December 26, 2018
    Publication date: July 2, 2020
    Inventors: WENLIANG CHEN, LIN MA, ALESSANDRO MINZONI
  • Patent number: 10622070
    Abstract: In one embodiment, a device is described for using ferroelectric material in a memory cell without a selector device. In another embodiment, a method of operating a ferroelectric memory cell without a selector device is described. Other embodiments are likewise described.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: April 14, 2020
    Assignee: AP Memory Corp, USA
    Inventor: Wenliang Chen
  • Publication number: 20200062686
    Abstract: Provided is a method for preparing a lower unsaturated fatty acid ester, which comprises carrying out an aldol condensation reaction between dimethoxymethane (DMM) and a lower acid or ester with a molecular formula of R1—CH2—COO—R2 on an acidic molecular sieve catalyst in an inert atmosphere to obtain a lower unsaturated fatty acid or ester(CH2?C(R1)—COO—R2), wherein R1 and R2 are groups each independently selected from the group consisting of H- and C1-C4 saturated alkyl group.
    Type: Application
    Filed: November 25, 2016
    Publication date: February 27, 2020
    Applicant: Dalian Institute of Chemical Physics, Chinese Academy of Sciences
    Inventors: Zhanling MA, Wenliang ZHU, Xiangang MA, Hongchao LIU, Yong LIU, Youming NI, Shiping LIU, Qiwei CHEN, Zhongmin LIU