Patents by Inventor William H. Radke

William H. Radke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory and sense parameter determination methods
    Patent number: 8934306
    Abstract: Memory devices and methods for operating a memory include filtering a histogram of sensed data of the memory, and adjusting a parameter used to sense the memory using the filtered histogram. Filtering can be accomplished by averaging or summing, and may include weighting the sums or averages.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: January 13, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Zhenlei Shen, William H. Radke
  • Methods for controlling host memory access with memory devices and systems
    Patent number: 8918600
    Abstract: The present disclosure includes methods for controlling host memory access with a memory device, systems, host controllers and memory devices. One embodiment for controlling host memory access with a memory device includes receiving at least one command from a host and controlling execution of the at least one command with the memory device.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: December 23, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Neal A. Galbo, Peter Feeley, William H. Radke, Victor Y. Tsai, Robert N. Leibowitz
  • METHODS, DEVICES, AND SYSTEMS FOR ADJUSTING SENSING VOLTAGES IN DEVICES
    Publication number: 20140355355
    Abstract: The present disclosure includes methods, devices, and systems for adjusting sensing voltages in devices. One or more embodiments include memory cells, and a controller configured to perform a sense operation on the memory cells using a sensing voltage to determine a quantity of the memory cells having a threshold voltage (Vt) greater than the sensing voltage and adjust a sensing voltage used to determine a state of the memory cells based, at least partially, on the determined quantity of memory cells.
    Type: Application
    Filed: July 10, 2014
    Publication date: December 4, 2014
    Inventors: William H. Radke, Zhenlei Shen, Peter Feeley
  • Memory devices and configuration methods for a memory device
    Patent number: 8902653
    Abstract: Memory devices and methods of operating memory devices are disclosed. In one such method, different blocks of memory cells have different configurations of user data space and overhead data space. In at least one method, overhead data is distributed within more than one block of memory cells. In another method, blocks are reconfigurable responsive to particular operating modes and/or desired levels of reliability of user data stored in a memory device.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: December 2, 2014
    Assignee: Micron Technology, Inc.
    Inventors: William H. Radke, Tommaso Vali, Michele Incarnati
  • Dynamic program window determination in a memory device
    Patent number: 8902648
    Abstract: Methods for determining a program window and memory devices are disclosed. One such method for determining the program window measures an amount of program disturb experienced by a particular state and determines the program window responsive to the amount of program disturb.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: December 2, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Tommaso Vali, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
  • FAULT-TOLERANT NON-VOLATILE INTEGRATED CIRCUIT MEMORY
    Publication number: 20140331003
    Abstract: Apparatus and methods are disclosed, such as those that store data in a plurality of non-volatile integrated circuit memory devices, such as NAND flash, with convolutional encoding. A relatively high code rate for the convolutional code consumes relatively little extra memory space. In one embodiment, the convolutional code is spread over portions of a plurality of memory devices, rather than being concentrated within a page of a particular memory device. In one embodiment, a code rate of m/n is used, and the convolutional code is stored across n memory devices.
    Type: Application
    Filed: May 12, 2014
    Publication date: November 6, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: William H. Radke
  • ERROR RECOVERY STORAGE ALONG A MEMORY STRING
    Publication number: 20140325317
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Application
    Filed: April 28, 2014
    Publication date: October 30, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: William H. Radke
  • MULTIPLE ENGINE SEQUENCER
    Publication number: 20140316684
    Abstract: Multiple engine sequencers in memory interfaces are disclosed. Individual sequencer engines of multiple engine sequencers perform at least portions of their respective operations in parallel with other individual sequencer engine operations performed in the memory interface. In at least one embodiment, sequencer engine operations are performed at least partially concurrently with other sequencer engine operations in the memory interface.
    Type: Application
    Filed: April 17, 2013
    Publication date: October 23, 2014
    Applicant: Micron Technology, Inc.
    Inventors: William H. Radke, Laszlo Borbely, David Christopher Pruett
  • DATA CONDITIONING TO IMPROVE FLASH MEMORY RELIABILITY
    Publication number: 20140298088
    Abstract: Methods for managing data stored in a memory device facilitate managing utilization of memory of different densities. The methods include reading first data from a first number of pages or blocks of memory cells having a first density, performing a data handling operation on the read first data to generate second data, and writing the second data to a second number of pages or blocks of memory cells having a second density, wherein the second density is different than the first density, and wherein the second number is different than the first number.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 2, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: William H. Radke, Vishal Sarin, Jung-Sheng Hoei
  • Inferring threshold voltage distributions associated with memory cells via interpolation
    Patent number: 8848453
    Abstract: An apparatuses and methods for inferring threshold voltage distributions associated with memory cells via interpolation. A determining soft data for a group of memory cells each programmed to one of a number of data states, wherein the soft data comprises a number of different soft data values, determining a quantity of memory cells associated with each of the different soft data values, and inferring at least a portion of a threshold voltage distribution associated with the group of memory cells via an interpolation process using the determined quantities of memory cells associated with each of the different soft data values.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 30, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Zhenlei Shen, William H. Radke
  • Power consumption control
    Patent number: 8848478
    Abstract: The present disclosure includes apparatuses and methods for power consumption control. A number of embodiments include determining power consumption information for each phase in a combination of phases of a command, and authorizing execution of at least one of the phases in the combination based, at least partially, on the power consumption information determined for the at least one of the phases.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: September 30, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Krishnam R. Datla, William H. Radke, Robin Sarno, Laszlo Borbely-Bartis, Ken Kannampuzha
  • BOOT PARTITIONS IN MEMORY DEVICES AND SYSTEMS
    Publication number: 20140289505
    Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.
    Type: Application
    Filed: May 15, 2014
    Publication date: September 25, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Neal A. Galbo, Victor Y. Tsai, William H. Radke, Krishnam R. Datla
  • DATA MODULATION FOR GROUPS OF MEMORY CELLS
    Publication number: 20140286094
    Abstract: Methods, devices, and systems for data modulation for groups of memory cells. Data modulation for groups of memory cells can include modulating N units of data to a combination of programmed states. Each memory cell of a group of G number of memory cells can be programmed to one of M number of programmed states, where M is greater than a minimum number of programmed states needed to store N/G units of data in one memory cell, and where the programmed state of each memory cell of the group is one of the combination of programmed states.
    Type: Application
    Filed: March 25, 2014
    Publication date: September 25, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Zhenlei Shen, William H. Radke
  • OBJECT ORIENTED MEMORY IN SOLID STATE DEVICES
    Publication number: 20140281811
    Abstract: The present disclosure includes methods, devices, and systems for object oriented memory in solid state devices. One embodiment of a method for object oriented memory in solid state devices includes accessing a defined set of data as a single object in an atomic operation manner, where the accessing is from a source other than a host. The embodiment also includes storing the defined set of data as the single object in a number of solid state memory blocks as formatted by a control component of a solid state device that includes the number of solid state memory blocks.
    Type: Application
    Filed: May 5, 2014
    Publication date: September 18, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Peter Feeley, Neal A. Galbo, James Cooke, Victor Y. Tsai, Robert N. Leibowitz, William H. Radke
  • Methods, devices, and systems for dealing with threshold voltage change in memory devices
    Patent number: 8830762
    Abstract: The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: September 9, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Zhenlei Shen, William H. Radke, Peter Feeley
  • MEMORY CELL COUPLING COMPENSATION
    Publication number: 20140233314
    Abstract: Methods for memory cell coupling compensation and apparatuses configured to perform the same are described. One or more methods for memory cell coupling compensation includes determining a state of a memory cell using a voltage that is changed in accordance with a first memory cell coupling compensation voltage, performing an error check on the state of the memory cell, and determining the state of the memory cell using a voltage that is changed in accordance with a second memory cell coupling compensation voltage in response to the error check failing.
    Type: Application
    Filed: February 17, 2014
    Publication date: August 21, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Zhenlei Shen, William H. Radke, Peter Feeley
  • Methods, devices, and systems for adjusting sensing voltages in devices
    Patent number: 8797803
    Abstract: The present disclosure includes methods, devices, and systems for adjusting sensing voltages in devices. One or more embodiments include memory cells, and a controller configured to perform a sense operation on the memory cells using a sensing voltage to determine a quantity of the memory cells having a threshold voltage (Vt) greater than the sensing voltage and adjust a sensing voltage used to determine a state of the memory cells based, at least partially, on the determined quantity of memory cells.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: August 5, 2014
    Assignee: Micron Technology, Inc.
    Inventors: William H. Radke, Zhenlei Shen, Peter Feeley
  • APPLYING A VOLTAGE-DELAY CORRECTION TO A NON-DEFECTIVE MEMORY BLOCK THAT REPLACES A DEFECTIVE MEMORY BLOCK BASED ON THE ACTUAL LOCATION OF THE NON-DEFECTIVE MEMORY BLOCK
    Publication number: 20140204693
    Abstract: In an embodiment, a defective memory block is replaced with a non-defective memory block, and a voltage-delay correction is applied to the non-defective memory block that replaces the defective memory block based on the actual location of the non-defective memory block.
    Type: Application
    Filed: March 25, 2014
    Publication date: July 24, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Vishal Sarin, Dzung H. Nguyen, William H. Radke
  • Correcting data in a memory
    Patent number: 8782493
    Abstract: Methods of correcting data in a memory, and memories adapted to correct data, include prioritizing error correction of the read data in response to locations and likely states of known bad or questionable data positions of a segment of a memory array selected for reading.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: July 15, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Brady L. Keays, Shuba Swaminathan, William H. Radke
  • ERROR DETECTION AND CORRECTION SCHEME FOR A MEMORY DEVICE
    Publication number: 20140189475
    Abstract: An embodiment of a method of operating a memory device includes reading data from a memory array into a data buffer, checking the data using a first checker, checking the data using a second checker, and when an error is detected by the first checker and the error is not detected by the second checker returning the data to the memory array from the data buffer.
    Type: Application
    Filed: February 5, 2014
    Publication date: July 3, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: William H. Radke, Shuba Swaminathan, Brady L. Keays