Patents by Inventor William H. Radke

William H. Radke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Error recovery storage along a memory string
    Patent number: 8468415
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: June 18, 2013
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Determining and using soft data in memory devices and systems
    Patent number: 8451664
    Abstract: The present disclosure includes methods, devices, and systems for determining and using soft data in memory devices and systems. One or more embodiments include an array of memory cells and control circuitry coupled to the array. The control circuitry is configured to perform a number of sense operations on the memory cells using a number of sensing voltages to determine soft data associated with a target state of the memory cells, and adjust a sensing voltage used to determine the target state based, at least partially, on the determined soft data.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: May 28, 2013
    Assignee: Micron Technology, Inc.
    Inventors: William H. Radke, Zhenlei Shen, Peter Feeley
  • Replacing defective memory blocks in response to external addresses
    Patent number: 8446787
    Abstract: Electronic systems and methods of operating memory devices are provided. In one such embodiment, a memory device receives an external address that addresses a non-defective memory block of a sequence of memory blocks of the memory device in place of a defective memory block of the sequence of memory blocks such that the non-defective memory block replaces the defective memory block. The non-defective memory block is proximate non-defective memory block following the defective memory block in the sequence of memory blocks that is available to replace the defective memory block.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: May 21, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Vishal Sarin, Dzung H. Nguyen, William H. Radke
  • Boot partitions in memory devices and systems
    Patent number: 8429391
    Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Neal A. Galbo, Victor Y. Tsai, William H. Radke, Krishnam R. Datla
  • Device to device flow control within a chain of devices
    Patent number: 8402178
    Abstract: The present disclosure includes methods, devices, and systems for device to device flow control. In one or more embodiments, a system configured for device to device flow control includes a host and a chain of devices, including one or more memory device, coupled to each other and configured to communicate with the host device through a same host port. In one or more embodiments, at least one device in the chain is configured to regulate the flow of data by sending a token in downstream data packets, the token allowing devices downstream from the respective at least one device to send an upstream data packet to the respective at least one device.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: March 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Victor Y. Tsai, William H. Radke, Peter Feeley, Neal A. Galbo, Robert N. Leibowitz
  • MEMORY CELL COUPLING COMPENSATION
    Publication number: 20130051143
    Abstract: Methods for memory cell coupling compensation and apparatuses configured to perform the same are described. One or more methods for memory cell coupling compensation includes determining a state of a memory cell using a voltage that is changed in accordance with a first memory cell coupling compensation voltage, performing an error check on the state of the memory cell, and determining the state of the memory cell using a voltage that is changed in accordance with a second memory cell coupling compensation voltage in response to the error check failing.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Zhenlei Shen, William H. Radke, Peter Feeley
  • Variable sector-count ECC
    Patent number: 8381076
    Abstract: Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices by increasing the data area of user data being covered by the ECC code. This averages any possible bit errors over a larger data area and allows a greater number of errors to be corrected by a combining the ECC codes in the coverage area without substantially changing the overall size of ECC codes being stored over a single sector approach. In one embodiment of the present invention, the size of the data block utilized for ECC coverage is variable and can be selected such that differing areas of the memory array or data types can have a differing ECC data coverage sizes. It is also noted that the ECC algorithm, math base or encoding scheme can also be varied between these differing areas of the memory array.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: February 19, 2013
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • MEMORY DEVICES AND CONFIGURATION METHODS FOR A MEMORY DEVICE
    Publication number: 20130039129
    Abstract: Memory devices and methods of operating memory devices are disclosed. In one such method, different blocks of memory cells have different configurations of user data space and overhead data space. In at least one method, overhead data is distributed within more than one block of memory cells. In another method, blocks are reconfigurable responsive to particular operating modes and/or desired levels of reliability of user data stored in a memory device.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Inventors: William H. RADKE, Tommaso Vali, Michele Incarnati
  • DYNAMIC PROGRAM WINDOW DETERMINATION IN A MEMORY DEVICE
    Publication number: 20130028022
    Abstract: Methods for determining a program window and memory devices are disclosed. One such method for determining the program window measures an amount of program disturb experienced by a particular state and determines the program window responsive to the amount of program disturb.
    Type: Application
    Filed: July 26, 2011
    Publication date: January 31, 2013
    Inventors: Tommaso VALI, Giovanni Santin, Massimo Rossini, William H. Radke, Violante Moschiano
  • Methods, devices, and systems for adjusting sensing voltages in devices
    Patent number: 8358542
    Abstract: The present disclosure includes methods, devices, and systems for adjusting sensing voltages in devices. One or more embodiments include memory cells, and a controller configured to perform a sense operation on the memory cells using a sensing voltage to determine a quantity of the memory cells having a threshold voltage (Vt) greater than the sensing voltage and adjust a sensing voltage used to determine a state of the memory cells based, at least partially, on the determined quantity of memory cells.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: January 22, 2013
    Assignee: Micron Technology, Inc.
    Inventors: William H. Radke, Zhenlei Shen, Peter Feeley
  • STATE CHANGE IN SYSTEMS HAVING DEVICES COUPLED IN A CHAINED CONFIGURATION
    Publication number: 20130013816
    Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: William H. Radke, Victor Y. Tsai, James Cooke, Neal A. Galbo, Peter Feeley
  • PROGRAMMING METHODS AND MEMORIES
    Publication number: 20130010542
    Abstract: Methods of programming a memory and memories are disclosed. In at least one embodiment, a memory is programmed by determining a pretarget threshold voltage for a selected cell, wherein the pretarget threshold voltage is determined using pretarget threshold voltage values for at least one neighbor cell of the selected cell.
    Type: Application
    Filed: July 6, 2011
    Publication date: January 10, 2013
    Inventors: Vishal Sarin, William H. Radke, Frankie F. Roohparvar
  • HOST CONTROLLER
    Publication number: 20130013822
    Abstract: The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes storing device class dependent information and a command in one or more of host system memory and host controller memory, setting a pointer to the command in a register in a host controller, directing access to the one or more of host system memory and host controller memory with the memory device via the host controller; and executing the command with the memory device.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Peter Feeley, Robert N. Leibowitz, William H. Radke, Neal A. Galbo, Victor Y. Tsai
  • DATA CONDITIONING TO IMPROVE FLASH MEMORY RELIABILITY
    Publication number: 20130007355
    Abstract: Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data reliability during storage to higher density memory and methods for managing data across multiple memory arrays are also disclosed.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Inventors: William H. Radke, Vishal Sarin, Jung-Sheng Hoei
  • DATA MODULATION FOR GROUPS OF MEMORY CELLS
    Publication number: 20120307559
    Abstract: Methods, devices, and systems for data modulation for groups of memory cells. Data modulation for groups of memory cells can include modulating N units of data to a combination of programmed states. Each memory cell of a group of G number of memory cells can be programmed to one of M number of programmed states, where M is greater than a minimum number of programmed states needed to store N/G units of data in one memory cell, and where the programmed state of each memory cell of the group is one of the combination of programmed states.
    Type: Application
    Filed: June 3, 2011
    Publication date: December 6, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Zhenlei Shen, William H. Radke
  • Memory controller supporting rate-compatible punctured codes
    Patent number: 8327245
    Abstract: Apparatus and methods store data in a non-volatile solid state memory device according to a rate-compatible code, such as a rate-compatible convolutional code (RPCC). An example of such a memory device is a flash memory device. Data can initially be block encoded for error correction and detection. The block-coded data can be further convolutionally encoded. Convolutional-coded data can be punctured and stored in the memory device. The puncturing decreases the amount of memory used to store the data. Depending on conditions, the amount of puncturing can vary from no puncturing to a relatively high amount of puncturing to vary the amount of additional error correction provided and memory used. The punctured data can be decoded when data is to be read from the memory device.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: December 4, 2012
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Host controller
    Patent number: 8327040
    Abstract: The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes storing device class dependent information and a command in one or more of host system memory and host controller memory, setting a pointer to the command in a register in a host controller, directing access to the one or more of host system memory and host controller memory with the memory device via the host controller; and executing the command with the memory device.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: December 4, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Peter Feeley, Robert N. Leibowitz, William H. Radke, Neal A. Galbo, Victor Y. Tsai
  • ERROR RECOVERY STORAGE ALONG A MEMORY STRING
    Publication number: 20120304038
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Application
    Filed: August 8, 2012
    Publication date: November 29, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: William H. Radke
  • BOOTING IN SYSTEMS HAVING DEVICES COUPLED IN A CHAINED CONFIGURATION
    Publication number: 20120290826
    Abstract: The present disclosure includes methods, devices, and systems for booting in systems having devices coupled in a chained configuration. One or more embodiments include a host and a number of devices coupled to the host in a chained configuration, wherein at least one of the number of devices is a bootable device and the at least one bootable device is not directly coupled to the host.
    Type: Application
    Filed: July 26, 2012
    Publication date: November 15, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: William H. Radke, Victor Y. Tsai, Peter Feeley, Neal A. Galbo, Robert N. Leibowitz
  • FAULT-TOLERANT NON-VOLATILE INTEGRATED CIRCUIT MEMORY
    Publication number: 20120290902
    Abstract: Apparatus and methods are disclosed, such as those that store data in a plurality of non-volatile integrated circuit memory devices, such as NAND flash, with convolutional encoding. A relatively high code rate for the convolutional code consumes relatively little extra memory space. In one embodiment, the convolutional code is spread over portions of a plurality of memory devices, rather than being concentrated within a page of a particular memory device. In one embodiment, a code rate of m/n is used, and the convolutional code is stored across n memory devices.
    Type: Application
    Filed: July 24, 2012
    Publication date: November 15, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: William H. Radke