Abstract: The present disclosure relates to an integrated antenna structure. The integrated antenna structure includes a radiator and a ground plane disposed between a semiconductor substrate and the radiator. A conductive structure is separated from the ground plane by the semiconductor substrate. The conductive structure is electrically coupled to the ground plane. The semiconductor substrate has a thickness of less than approximately 100 microns.

Abstract: A circuit includes a transmitter, a transmission channel communicatively coupled with the transmitter, and a receiver communicatively coupled with the transmission channel. The circuit further includes a combiner on a transmitter-side of the transmission channel, a decoupler on a receiver-side of the transmission channel, and a channel loss compensation circuit communicatively coupled between the transmitter and the receiver. The combiner is coupled between the transmitter and the transmission channel. The decoupler is coupled between the receiver and the transmission channel.

Abstract: An integrated circuit includes a first through fourth devices positioned over a substrate, the first device including first through third transceivers, the second device including a fourth transceiver, the third device including a fifth transceiver, and the fourth device including a sixth transceiver. A first radio frequency interconnect (RFI) includes the first transceiver coupled to the fourth transceiver through a first guided transmission medium, a second RFI includes the second transceiver coupled to the fifth transceiver through a second guided transmission medium, and a third RFI includes the third transceiver coupled to the sixth transceiver by the second guided transmission medium.

Abstract: The present disclosure, in some embodiments, relates to an integrated antenna structure. The structure includes an excitable element and a first ground plane. The first ground plane is disposed between a first surface of a semiconductor substrate and the excitable element. A first line that is normal to the first surface of the semiconductor substrate extends through both the first ground plane and the excitable element. A second ground plane is separated from the first ground plane by the semiconductor substrate. The second ground plane is electrically coupled to the first ground plane.

Abstract: An integrated circuit includes a first radio frequency interconnect (RFI) transceiver, a second RFI transceiver, a third RFI transceiver, a fourth RFI transceiver and a guided transmission medium. The first RFI transceiver is configured to transmit or receive a first data signal. The second RFI transceiver is configured to transmit or receive a second data signal. The third RFI transceiver is configured to transmit or receive the first data signal. The fourth RFI transceiver is configured to transmit or receive the second data signal. The guided transmission medium is configured to carry the first data signal and the second data signal. The first RFI transceiver and the second RFI transceiver are connected to the third RFI transceiver and the fourth RFI transceiver by the guided transmission medium.

Abstract: A communication system includes a modulator configured to generate a modulated signal responsive to at least a data signal, and a demodulator configured to demodulate the modulated signal responsive to a first carrier signal. The demodulator includes a filter configured to generate a filtered first signal based on a first signal, and a gain adjusting circuit coupled to the filter. The first signal is based on the first carrier signal and modulated signal. The filter has a gain controlled by a set of control signals. The gain adjusting circuit is configured to adjust the gain of the filter, and to generate the set of control signals based on a voltage of the filtered first signal and a voltage of the first signal. The gain adjusting circuit includes a first peak detector coupled to the filter, and configured to detect a peak value of the voltage of the filtered first signal.

Abstract: A receiver circuit includes a plurality of receivers, each of the receivers being associated with a carrier of a plurality of carriers, and a decoupler configured to receive a transmission signal from a transmission channel and output a plurality of divided transmission signals to the plurality of receivers. An equalizer is configured to modify either the transmission signal or one of the divided transmission signals.

Abstract: A transceiver disposed on a first die in a bidirectional differential die-to-die communication system is disclosed. The transceiver includes a transmission section configured to modulate a first data onto a carrier signal having a first frequency for transmission via a bidirectional differential transmission line; and a reception section configured to receive signals from the bidirectional differential transmission line, the reception section including a filter configured to pass frequencies within a first passband that includes a second frequency, the first frequency being outside of the first passband. According to some embodiments, the reception section is configured to receive, via the bidirectional differential transmission line, modulated data at the second frequency at a same time that the transmission section transmits the modulated data at the first frequency.

Abstract: A communication system includes a demodulator configured to demodulate an amplified modulated signal responsive to a first carrier signal. The demodulator includes a filter and a gain adjusting circuit. The filter is configured to generate a filtered first signal based on a first signal. The first signal is based on the first carrier signal and the amplified modulated signal. The filter has a gain adjusted based on a set of control signals. The gain adjusting circuit is coupled to the filter, and configured to generate the set of control signals based on at least a voltage of the filtered first signal or a voltage of a second signal. The gain adjusting circuit includes a first peak detector configured to output a peak value of the voltage of the second signal. The voltage of the second signal includes a voltage of the first signal or a voltage of a reference signal.

Abstract: A memory circuit includes a first memory circuit formed of a first die or a set of stacked dies. The memory circuit further includes a second memory circuit formed of a second die, the second memory circuit comprising one or more sets of memory cells of a second type and each set of the memory cells of the second type comprising multiple cache sections. The first die or the set of stacked dies are stacked over the second die, wherein the second die further includes a first plurality of I/O terminals and a second plurality of I/O terminals, the first plurality of I/O terminals being electrically coupled to the first memory circuit, and the second plurality of I/O terminals being electrically isolated from the first memory circuit.

Abstract: Systems and methods for die-to-die communication are provided. A first transceiver disposed on a first die includes a transmission section configured to modulate first data onto a carrier signal having a first frequency. The first transceiver includes a reception section configured to receive signals from a transmission line. The reception section includes a filter configured to pass frequencies within a first passband that includes a second frequency. The first frequency is outside of the first passband. A second transceiver is disposed on a second die and is configured to communicate with the first transceiver via the transmission line. The second transceiver includes a transmission section configured to modulate second data onto a carrier signal having the second frequency. The second transceiver includes a reception section including a filter configured to pass frequencies within a second passband that includes the first frequency. The second frequency is outside of the second passband.

Abstract: A method of operating a memory circuit is disclosed. The memory circuit comprises a primary memory and a cache memory. The primary memory has P access channels of Q bits of channel bandwidth, and the cache memory has P subsets of Q*N memory cells, wherein P and Q are integers greater than 1, and N is a positive integer. The method includes determining, in response to a command for reading first and second data accessible through first and second access channels respectively, if a valid duplication of the first and second data is stored in the cache memory. If yes, the method further includes storing a duplication of Q*n bits of consecutively addressed data from each of the first and second access channels to the cache memory, n being an integer from 1 to N. Otherwise, the method further includes outputting the first and second data from the cache memory.

Abstract: A receiver circuit includes a plurality of receivers, each of the receivers being associated with a carrier of a plurality of carriers, and a decoupler configured to receive a transmission signal from a transmission channel and output a plurality of divided transmission signals to the plurality of receivers. An equalizer is configured to modify either the transmission signal or one of the divided transmission signals.

Abstract: A device, a circuit and a method are disclosed herein. The device includes a data receiving circuit and an oscillating signal generator. The data receiving circuit is configured to output a first output signal, a second output signal, and a phase error signal according to an oscillating signal and a modulated signal, in which the phase error signal indicates a phase difference between the oscillating signal and the modulated signal. The oscillating signal generator is configured to delay a phase of a first reference signal according to the phase error signal, to generate the oscillating signal.

Abstract: A circuit includes a transmitter associated with a carrier of a radio frequency interconnect, a transmission channel communicatively coupled with the transmitter, and a receiver communicatively coupled with the transmission channel, the receiver also being associated with the carrier of the radio frequency interconnect. A combiner on a transmitter-side of the transmission channel is coupled between the transmitter and the transmission channel, and a decoupler on a receiver-side of the transmission channel is coupled between the receiver and the transmission channel. A channel loss compensation circuit is communicatively coupled between the transmitter and the receiver.

Abstract: A communication system includes a first amplifier configured to output an amplified modulated signal, and a demodulator coupled to the first amplifier. The demodulator is configured to demodulate the amplified modulated signal responsive to a first carrier signal. The demodulator includes a filter and a bandwidth adjusting circuit. The filter is configured to generate a filtered first signal based on a first signal and a set of control signals. The filter has a bandwidth adjusted based on the set of control signals. The bandwidth adjusting circuit is coupled to the filter, and is configured to generate the set of control signals based on a frequency of the filtered first signal and a frequency of the first signal. The bandwidth adjusting circuit includes a frequency detector configured to generate a second signal based on the frequency of the filtered first signal and the frequency of the first signal.

Abstract: A radio frequency interconnect (RFI) includes a transmitter side connected to a first end of a channel, a receiver side connected to a second end of the channel opposite the first end and a calibration system. The receiver side includes at least one of the following configurations: (a) at least one gain control amplifier (GCA) or at least one analog to digital converter (ADC). The calibration system is configured to transmit a predetermined data set through the channel, receive an output from the at least one ADC or the at least one GCA, and calibrate the at least one ADC or the at least one GCA based on a measured data set. The output includes the measured data set based on the predetermined data set transmitted through channel.

Abstract: The present disclosure, in some embodiments, relates to an integrated antenna structure. The structure includes an excitable element and a first ground plane. The first ground plane is disposed between a first surface of a semiconductor substrate and the excitable element. A first line that is normal to the first surface of the semiconductor substrate extends through both the first ground plane and the excitable element. A second ground plane is separated from the first ground plane by the semiconductor substrate. The second ground plane is electrically coupled to the first ground plane.

Abstract: Some embodiments relate to a semiconductor module having an integrated antenna structure. The semiconductor module has an excitable element and a first ground plane disposed between a substrate and the excitable element. A second ground plane is separated from the first ground plane by the substrate. The second ground plane is coupled to the first ground plane by one or more through-substrate vias (TSVs) that extend through the substrate.

Abstract: A communication system includes a demodulator configured to demodulate an amplified modulated signal responsive to a first carrier signal. The demodulator includes a filter and a gain adjusting circuit. The filter is configured to generate a filtered first signal based on a first signal. The first signal is based on the first carrier signal and the amplified modulated signal. The filter has a gain adjusted based on a set of control signals. The gain adjusting circuit is coupled to the filter, and configured to generate the set of control signals based on at least a voltage of the filtered first signal or a voltage of a second signal. The gain adjusting circuit includes a first peak detector configured to output a peak value of the voltage of the second signal. The voltage of the second signal includes a voltage of the first signal or a voltage of a reference signal.