Patents by Inventor Won-kyoung Choi

Won-kyoung Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200399117
    Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die.
    Type: Application
    Filed: March 20, 2020
    Publication date: December 24, 2020
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Won Kyoung Choi, Kang Chen, Ivan Micallef
  • Patent number: 10662056
    Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: May 26, 2020
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Won Kyoung Choi, Kang Chen, Ivan Micallef
  • Patent number: 10566808
    Abstract: A system for diagnosing a battery connection status includes: a DC-DC converter that converts and outputs a level of an input voltage; a battery connected to an output terminal of the DC-DC converter; and a controller that generates a control value for compensating for an error between a voltage command or a current command of the battery and a detection voltage or a detection current of the battery, controls the output of the DC-DC converter by applying the control value, and diagnoses a connection status between the DC-DC converter and the battery based on a change in error between the detection voltage or the detection current of the battery and the voltage command or the current command of the battery.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: February 18, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Won Kyoung Choi, Na Lae Kwon, Jee Heon Kim, Dong Jun Lee, Ho Joong Lee
  • Publication number: 20200006215
    Abstract: A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Il Kwon Shim, Pandi C. Marimuthu, Won Kyoung Choi, Sze Ping Goh, Jose A. Caparas
  • Patent number: 10513199
    Abstract: A voltage drop compensation control system and method of a power supply device are provided. The voltage drop compensation control system of the power supply device, for compensating for a voltage drop generated in an electric connection line between a direct current (DC)-DC converter and a battery includes a controller that generates a compensation voltage command that is obtained by compensating for an output voltage command of the DC-DC converter by applying a first control value for compensating for the voltage drop to the output voltage command. The controller also determines the first control value, based on an error between the compensation voltage command or an output voltage detection value of the DC-DC converter and a voltage of the battery.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: December 24, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Gi Bong Son, Ho Joong Lee, Dong Gyun Woo, Won Kyoung Choi, Hyun Wook Seong
  • Patent number: 10510632
    Abstract: A semiconductor device has a carrier and a semiconductor die disposed over the carrier. A dummy die is disposed over the carrier as well. A first encapsulant is deposited over the semiconductor die and dummy die. The dummy die and a first portion of the first encapsulant is backgrinded while a second portion of the first encapsulant remains covering the semiconductor die. Backgrinding the dummy die fully removes the dummy die while the second portion of the first encapsulant remains covering the semiconductor die. A second encapsulant is optionally deposited over the dummy die prior to disposing the dummy die over the carrier. A conductive pillar is optionally formed over the dummy die prior to depositing the second encapsulant. The carrier is removed to expose an active surface of the semiconductor die. A build-up interconnect structure is formed over the active surface after removing the carrier.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: December 17, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Won Kyoung Choi, Pandi Chelvam Marimuthu
  • Patent number: 10453785
    Abstract: A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: October 22, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Il Kwon Shim, Pandi C. Marimuthu, Won Kyoung Choi, Sze Ping Goh, Jose A. Caparas
  • Patent number: 10446479
    Abstract: A semiconductor device has a substrate. A plurality of conductive vias is formed through the substrate. A conductive layer is formed over the substrate. An insulating layer is formed over conductive layer. A portion of the substrate is removed to expose the conductive vias. A plurality of vertical interconnect structures is formed over the substrate. A first semiconductor die is disposed over the substrate. A height of the vertical interconnect structures is less than a height of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and the vertical interconnect structures. A first portion of the encapsulant is removed from over the first semiconductor die while leaving a second portion of the encapsulant over the vertical interconnect structures. The second portion of the encapsulant is removed to expose the vertical interconnect structures. A second semiconductor die is disposed over the first semiconductor die.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: October 15, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Pandi C. Marimuthu, Yaojian Lin, Kang Chen, Yu Gu, Won Kyoung Choi
  • Publication number: 20190287873
    Abstract: A semiconductor device has a carrier and a semiconductor die disposed over the carrier. A dummy die is disposed over the carrier as well. A first encapsulant is deposited over the semiconductor die and dummy die. The dummy die and a first portion of the first encapsulant is backgrinded while a second portion of the first encapsulant remains covering the semiconductor die. Backgrinding the dummy die fully removes the dummy die while the second portion of the first encapsulant remains covering the semiconductor die. A second encapsulant is optionally deposited over the dummy die prior to disposing the dummy die over the carrier. A conductive pillar is optionally formed over the dummy die prior to depositing the second encapsulant. The carrier is removed to expose an active surface of the semiconductor die. A build-up interconnect structure is formed over the active surface after removing the carrier.
    Type: Application
    Filed: March 13, 2018
    Publication date: September 19, 2019
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Won Kyoung Choi, Pandi Chelvam Marimuthu
  • Patent number: 10399453
    Abstract: A method and system for controlling a vehicular direct current converter are provided. In particular, zero-current control is performed during control for maintaining an SOC of an auxiliary battery. Accordingly, energy loss due to charging and discharging of the auxiliary battery is minimized and the fuel efficiency of a vehicle is improved.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: September 3, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Ho Joong Lee, Dong Jun Shin, Won Kyoung Choi, Jun Yeon Park, Na Lae Kwon, Hyun Wook Seong, Jee Heon Kim, Chang Ryeol Yoo, Dong Jun Lee
  • Patent number: 10388612
    Abstract: A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: August 20, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Byung Joon Han, Rajendra D. Pendse, Il Kwon Shim, Pandi C. Marimuthu, Won Kyoung Choi, Linda Pei Ee Chua
  • Patent number: 10377237
    Abstract: An apparatus and a method are provided for controlling a low DC-DC converter (LDC) in an electric vehicle by prioritizing respective controllers, connecting the controllers in series in ascending order according to priority, and determining a command voltage of the LDC on the basis of output voltages of the respective controllers. Accordingly, even when a controller with a highest priority is operating, controllers of lower priority continue operating. Thus, electrical load performance degradation caused by instantaneous overcurrent generated in state transitions is prevented.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: August 13, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Ho Joong Lee, Dong Jun Shin, Won Kyoung Choi, Jun Yeon Park, Gi Bong Son, Hyun Wook Seong, Jee Heon Kim, Chang Ryeol Yoo, Hui Sung Jang
  • Publication number: 20190084437
    Abstract: A voltage drop compensation control system and method of a power supply device are provided. The voltage drop compensation control system of the power supply device, for compensating for a voltage drop generated in an electric connection line between a direct current (DC)-DC converter and a battery includes a controller that generates a compensation voltage command that is obtained by compensating for an output voltage command of the DC-DC converter by applying a first control value for compensating for the voltage drop to the output voltage command. The controller also determines the first control value, based on an error between the compensation voltage command or an output voltage detection value of the DC-DC converter and a voltage of the battery.
    Type: Application
    Filed: December 4, 2017
    Publication date: March 21, 2019
    Inventors: Gi Bong Son, Ho Joong Lee, Dong Gyun Woo, Won Kyoung Choi, Hyun Wook Seong
  • Patent number: 10220721
    Abstract: A method for controlling a relay of an auxiliary battery by a controller includes deciding whether or not a low direct current (DC) to DC converter (LDC) supplies power required in an electronic load in a state of charge (SOC) maintaining mode of the auxiliary battery. As a result of the decision, a turn-on state of the relay in which power of the auxiliary battery is supplied to the electronic load is maintained when the LDC does not supply the power required in the electronic load. As a result of the decision, the relay is turned off so that power of the auxiliary battery is not supplied to the electronic load when the LDC supplies the power required in the electronic load.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: March 5, 2019
    Assignee: Hyundai Motor Company
    Inventors: Ho Joong Lee, Dong Jun Lee, Na Lae Kwon, Jee Heon Kim, Won Kyoung Choi
  • Publication number: 20190047845
    Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die.
    Type: Application
    Filed: October 24, 2018
    Publication date: February 14, 2019
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Won Kyoung Choi, Kang Chen, Ivan Micallef
  • Patent number: 10189702
    Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: January 29, 2019
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Won Kyoung Choi, Kang Chen, Ivan Micallef
  • Patent number: 10160325
    Abstract: A vehicle power control method for jump-start uses a vehicle control system that includes a low voltage DC/DC converter for converting a voltage of a high voltage battery to a low voltage to be output and a junction box for connecting the low voltage DC/DC converter to an auxiliary battery and load. The vehicle power control method includes a jump-start preparation step in which when the auxiliary battery is in a discharge condition, a first relay, which connects or disconnects the junction box to or from the auxiliary battery, is turned off and a second relay, which connects or disconnects the junction box to or from a jump-start power supply connection terminal, is turned on; and a jump-start completion step in which, after a vehicle starts by a power inputted through the jump-start power supply connection terminal, the second relay is turned off, and the first relay is turned on.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: December 25, 2018
    Assignee: Hyundai Motor Company
    Inventors: Ho Joong Lee, Jee Heon Kim, Hee Tae Yang, Won Kyoung Choi
  • Patent number: 10160337
    Abstract: A low voltage DC-DC converter of an eco-friendly vehicle is provided. The converter includes an output current limit map applier that is configured to output an output current limit value using an output current limit map. A power controller is configured to amplify the output limit value output from the output current limit map applier to a predefined gain. Furthermore, an output limiter is configured to output the output limit value output from the power controller, and filter and output the output limit value after a predefined time lapses.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: December 25, 2018
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Jee Heon Kim, Dong Jun Lee, Gi Bong Son, Won Kyoung Choi, Hyun Wook Seong
  • Publication number: 20180354386
    Abstract: A method and system for controlling a vehicular direct current converter are provided. In particular, zero-current control is performed during control for maintaining an SOC of an auxiliary battery. Accordingly, energy loss due to charging and discharging of the auxiliary battery is minimized and the fuel efficiency of a vehicle is improved.
    Type: Application
    Filed: November 8, 2017
    Publication date: December 13, 2018
    Inventors: Ho Joong Lee, Dong Jun Shin, Won Kyoung Choi, Jun Yeon Park, Na Lae Kwon, Hyun Wook Seong, Jee Heon Kim, Chang Ryeol Yoo, Dong Jun Lee
  • Publication number: 20180358825
    Abstract: A system for diagnosing a battery connection status includes: a DC-DC converter that converts and outputs a level of an input voltage; a battery connected to an output terminal of the DC-DC converter; and a controller that generates a control value for compensating for an error between a voltage command or a current command of the battery and a detection voltage or a detection current of the battery, controls the output of the DC-DC converter by applying the control value, and diagnoses a connection status between the DC-DC converter and the battery based on a change in error between the detection voltage or the detection current of the battery and the voltage command or the current command of the battery.
    Type: Application
    Filed: November 10, 2017
    Publication date: December 13, 2018
    Inventors: Won Kyoung Choi, Na Lae Kwon, Jee Heon Kim, Dong Jun Lee, Ho Joong Lee