Abstract: A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the second interconnect structure with the first interconnect structure. The first interconnect structure includes a plurality of interconnection units disposed around first and second adjacent sides of the semiconductor die to form an L-shape border of the interconnection units around the semiconductor die. A third interconnect structure is formed over the semiconductor die perpendicular to the first interconnect structure. An insulating layer is formed over the semiconductor die and first interconnect structure.

Abstract: A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure.

Abstract: A fail-safe method and apparatus for high voltage parts in a hybrid vehicle is provided. In the fail-safe method, it is determined whether or not a high voltage main relay is turned off. Here, when the high voltage main relay is turned off, a voltage is charged into a direct current (DC) link using a counter electromotive force generated in a motor generator linked with a revolution of an engine. Voltage control is performed such that the voltage of the DC link is uniformly maintained using an inverter for the motor generator.

Abstract: A semiconductor device has a first conductive layer including a plurality of conductive traces. The first conductive layer is formed over a substrate. The conductive traces are formed with a narrow pitch. A first semiconductor die and second semiconductor die are disposed over the first conductive layer. A first encapsulant is deposited over the first and second semiconductor die. The substrate is removed. A second encapsulant is deposited over the first encapsulant. A build-up interconnect structure is formed over the first conductive layer and second encapsulant. The build-up interconnect structure includes a second conductive layer. A first passive device is disposed in the first encapsulant. A second passive device is disposed in the second encapsulant. A vertical interconnect unit is disposed in the second encapsulant. A third conductive layer is formed over second encapsulant and electrically connected to the build-up interconnect structure via the vertical interconnect unit.

Abstract: A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the second interconnect structure with the first interconnect structure. The first interconnect structure includes a plurality of interconnection units disposed around first and second adjacent sides of the semiconductor die to form an L-shape border of the interconnection units around the semiconductor die. A third interconnect structure is formed over the semiconductor die perpendicular to the first interconnect structure. An insulating layer is formed over the semiconductor die and first interconnect structure.

Abstract: A vehicle power control method for jump-start uses a vehicle control system that includes a low voltage DC/DC converter for converting a voltage of a high voltage battery to a low voltage to be output and a junction box for connecting the low voltage DC/DC converter to an auxiliary battery and load. The vehicle power control method includes a jump-start preparation step in which when the auxiliary battery is in a discharge condition, a first relay, which connects or disconnects the junction box to or from the auxiliary battery, is turned off and a second relay, which connects or disconnects the junction box to or from a jump-start power supply connection terminal, is turned on; and a jump-start completion step in which, after a vehicle starts by a power inputted through the jump-start power supply connection terminal, the second relay is turned off, and the first relay is turned on.

Abstract: A system and a method for controlling a low voltage DC/DC converter (LDC) of a hybrid vehicle is provided in which a fuel efficiency mode for artificially turning off pulse width modulation (PWM) control of the LDC is added, thereby improving fuel efficiency. Accordingly, the fuel efficiency mode for artificially turning off the PWM control of the LDC is added, so that when the fuel efficiency mode is performed, power of an auxiliary battery is temporarily supplied to an electric field load, thereby reducing power consumption of a main battery and improving fuel efficiency. Further, when the auxiliary battery is separated, power of the main battery is temporarily supplied to the electric field load by performing the PWM control of the LDC, to prevent a phenomenon that power is not supplied to the electric field load when the auxiliary battery is separated.

Abstract: a control method for charging a high voltage battery of a vehicle includes charging, by a vehicle controller, the high voltage battery using a low voltage DC-DC converter The state information. of the low voltage DC-DC converter, which includes the current and the temperature of the low voltage DC-DC converter, is sensed by the vehicle controller while charging the high voltage battery. The charging current of the high voltage battery is derated by the vehicle controller when the sensed state information of the low voltage DC-DC converter satisfies a converter derating condition.

Abstract: A method and system of controlling a converter is provided. The method includes sensing, by a controller, an on and off state of a secondary side switch of the converter and deriving, by the controller, a current command of the converter. The current command is then compared with preset current reference values each provided based on the on and off state of the secondary side switch. As the result of the comparison of the current command with the current reference value, the on and off state of the secondary side switch is either changed or maintained.

Abstract: A method of compensating for a current sensor offset of an inverter includes: calculating a current sensor offset based on an output value of a current sensor, which detects an output current of the inverter, after a vehicle has started and before a current control of the inverter is performed; actuating the inverter to perform the current control according to the calculated current sensor offset; determining whether the inverter enters a burst mode while performing the current control; and re-calculating the current sensor offset based on the output value of the current sensor when the inverter is determined to enter the burst mode.

Abstract: A low voltage DC-DC converter of an eco-friendly vehicle is provided. The converter includes an output current limit map applier that is configured to output an output current limit value using an output current limit map. A power controller is configured to amplify the output limit value output from the output current limit map applier to a predefined gain. Furthermore, an output limiter is configured to output the output limit value output from the power controller, and filter and output the output limit value after a predefined time lapses.

Abstract: A system for protecting the output terminal of the on-board-charger (OBC) includes: the OBC configured to apply an output voltage equal to a voltage of a battery to the battery to perform charging of the battery, an output terminal protection apparatus configured to compare a voltage difference between the output voltage of the OBC and the voltage of the battery with a threshold, and an OBC relay configured to connect the OBC to the battery when the voltage difference is less than the threshold. The OBC performs the charging of the battery after the OBC is connected to the battery.

Abstract: A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.

Abstract: A semiconductor device has a plurality of conductive vias formed through the semiconductor die with a first insulating layer around the conductive vias. A recess is formed in the first insulating layer around the conductive vias by LDA. A portion of the semiconductor wafer is removed by LDA after forming the recess in the first insulating layer so that the conductive vias extend above a surface of the semiconductor wafer. The first insulating layer extends to the surface of the semiconductor wafer or above the surface of the semiconductor wafer. A second insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the second insulating layer is removed by LDA, while leaving a second portion of the second insulating layer over the surface of the semiconductor wafer around the conductive vias. An electroless plated bump is formed over the conductive vias.

Abstract: A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.

Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die.

Abstract: A system and a method for controlling a low voltage DC/DC converter (LDC) of a hybrid vehicle is provided in which a fuel efficiency mode for artificially turning off pulse width modulation (PWM) control of the LDC is added, thereby improving fuel efficiency. Accordingly, the fuel efficiency mode for artificially turning off the PWM control of the LDC is added, so that when the fuel efficiency mode is performed, power of an auxiliary battery is temporarily supplied to an electric field load, thereby reducing power consumption of a main battery and improving fuel efficiency. Further, when the auxiliary battery is separated, power of the main battery is temporarily supplied to the electric field load by performing the PWM control of the LDC, to prevent a phenomenon that power is not supplied to the electric field load when the auxiliary battery is separated.

Abstract: The present disclosure provides a fault diagnosis method for a resolver including: receiving output signals for detecting an absolute angular position of a rotor of a motor, inputted from the resolver when the motor rotates in a state in which excitation signals are applied to the resolver; periodically sampling and reading voltage values for fault diagnosis from the received output signals inputted as voltage signals from the resolver; calculating a difference between voltage values of two output signals of the received output signals generating an angle detection signal for detecting the absolute angular position of the rotor; and determining a short circuit between an excitation signal and an output signal of the resolver by comparing the difference between the voltage values with a preset setting voltage.

Abstract: A system and method of manufacture of an integrated circuit system includes: a die having a via, the die having a top side and a bottom side; a top interconnect mounted to the via at the top side; an interconnect pillar mounted to the via at the bottom side; a device interconnect mounted to the interconnect pillar; and a base adhesive covering the interconnect pillar and the device interconnect.

Abstract: A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.