Patents by Inventor Woo-Geun Lee

Woo-Geun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961849
    Abstract: A display device includes a base layer; a first pattern disposed on the base layer; an insulating layer disposed on the first pattern and including layers; and a second pattern disposed on the insulating layer. At least two of the layers of the insulating layer include a same material.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Keum Hee Lee, Dong Hoon Shin, June Whan Choi, Seung Sok Son, Woo Geun Lee
  • Publication number: 20240120342
    Abstract: A transistor array substrate includes a substrate, an active layer disposed on the substrate and including a channel region, a source region and a drain region, a gate insulating layer disposed on a part of the active layer, a gate electrode overlapping the channel region of the active layer and included in an electrode conductive layer which is disposed on the gate insulating layer, a source electrode included in the electrode conductive layer and in contact with a part of the source region of the active layer, and a drain electrode included in the electrode conductive layer and in contact with a part of the drain region of the active layer. The active layer includes an oxide semiconductor including crystals and is disposed as an island shape excluding a hole in a plan view.
    Type: Application
    Filed: June 10, 2023
    Publication date: April 11, 2024
    Inventors: Sung Gwon MOON, Dong Han KANG, Jee Hoon KIM, Seung Sok SON, Shin Hyuk YANG, Woo Geun LEE
  • Publication number: 20240122006
    Abstract: A display device includes a data conductive layer including a first power line, a passivation layer with a first opening exposing the first power line, a via layer with a second opening partially overlapping the first opening, a pixel electrode on the via layer, a connection electrode in the first and second openings, a pixel-defining film with an opening overlapping the second opening, a light-emitting layer on the pixel-defining film, the pixel electrode and the connection electrode, and a common electrode connected to the first power line. The data conductive layer includes a data base layer, a data main metal layer, and a data capping layer, the first power line includes a wire connection structure, in which the data main metal layer is recessed from sides of the data capping layer, and the common electrode is connected to the data main metal layer in the wire connection structure.
    Type: Application
    Filed: August 28, 2023
    Publication date: April 11, 2024
    Inventors: Shin Hyuk YANG, Dong Han KANG, Jee Hoon KIM, Sung Gwon MOON, Seung Sok SON, Woo Geun LEE
  • Patent number: 11943976
    Abstract: A display device includes a substrate, a first conductive layer on the substrate, the first conductive layer including a data signal line, a first insulating layer on the first conductive layer, a semiconductor layer on the first insulating layer, the semiconductor layer including a first semiconductor pattern, a second insulating layer on the semiconductor layer, and a second conductive layer on the second insulating layer, the second conductive layer including a gate electrode disposed to overlap the first semiconductor pattern, a transistor first electrode disposed to overlap a part of the first semiconductor pattern, wherein the transistor first electrode is electrically connected to the data signal line through a contact hole that penetrates the first and second insulating layers, and a transistor second electrode disposed to overlap another part of the first semiconductor pattern.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung Sok Son, Woo Geun Lee, Seul Ki Kim, Kap Soo Yoon, Hyun Woong Baek, Jae Hyun Lee, Su Jung Jung, Jung Kyoung Cho, Seung Ha Choi, June Whan Choi
  • Patent number: 11932618
    Abstract: Disclosed are novel compounds of Chemical Formula 1, optical isomers of the compounds, and pharmaceutically acceptable salts of the compounds or the optical isomers. The compounds, isomers, and salts exhibit excellent activity as GLP-1 receptor agonists. In particular, they, as GLP-1 receptor agonists, exhibit excellent glucose tolerance, thus having a great potential to be used as therapeutic agents for metabolic diseases. Moreover, they exhibit excellent pharmacological safety for cardiovascular systems.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 19, 2024
    Assignee: ILDONG PHARMACEUTICAL CO., LTD.
    Inventors: Hong Chul Yoon, Kyung Mi An, Myong Jae Lee, Jin Hee Lee, Jeong-geun Kim, A-rang Im, Woo Jin Jeon, Jin Ah Jeong, Jaeho Heo, Changhee Hong, Kyeojin Kim, Jung-Eun Park, Te-ik Sohn, Changmok Oh, Da Hae Hong, Sung Wook Kwon, Jung Ho Kim, Jae Eui Shin, Yeongran Yoo, Min Whan Chang, Eun Hye Jang, In-gyu Je, Ji Hye Choi, Gunhee Kim, Yearin Jun
  • Publication number: 20240016011
    Abstract: A display device includes a first base portion, a first conductive layer comprising a lower light blocking layer on the first base portion, and a lower wiring spaced apart from the lower light blocking layer, a buffer layer disposed on the first conductive layer, a semiconductor layer disposed on the first buffer layer and comprising a first area, a second area on one side of the first area, and a third area on the other side of the first area, a gate insulating layer on the semiconductor layer, and a second conductive layer comprising a gate electrode overlapping the first area on the gate insulating layer, wherein conductivity of each of the first area and the second area is higher than conductivity of the first area, the third area is electrically connected to the lower wiring, and the second area is directly connected to the lower light blocking layer.
    Type: Application
    Filed: March 8, 2023
    Publication date: January 11, 2024
    Inventors: Kwang Soo LEE, Sho Yeon KIM, Hyun KIM, Kap Soo YOON, Woo Geun LEE, Seung Ha CHOI
  • Patent number: 11869896
    Abstract: A display device includes a substrate and a transistor disposed on the substrate and including a semiconductor layer, wherein the semiconductor layer includes a mesh structure, and wherein a plurality of openings are formed in the semiconductor layer.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: January 9, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Woo Bin Lee, Seok Hwan Bang, Seung Sok Son, Woo Geun Lee, Soo Jung Chae
  • Patent number: 11804495
    Abstract: A substrate including a first signal line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a second signal line intersecting the first signal line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer pattern and spaced apart from the second electrode, and an insulator comprising a first portion disposed between the first signal line and the second signal line, and at least partially overlapping with both of the first signal line and the second signal line.
    Type: Grant
    Filed: August 12, 2022
    Date of Patent: October 31, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Publication number: 20230245612
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Application
    Filed: April 10, 2023
    Publication date: August 3, 2023
    Inventors: Kang Nam KIM, Sung Hoon LIM, Woo Geun LEE, Kyu Sik CHO, Jae Beom CHOI
  • Patent number: 11626060
    Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: April 11, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kang Nam Kim, Sung Hoon Lim, Woo Geun Lee, Kyu Sik Cho, Jae Beom Choi
  • Patent number: 11574970
    Abstract: A display device includes a substrate having a display area and a pad area. A gate conductive layer disposed on the substrate includes a gate conductive metal layer and a gate capping layer. The gate conductive layer forms a gate electrode in the display area and a wire pad in the pad area that is exposed by a pad opening. An interlayer insulating film disposed on the gate conductive layer covers the gate electrode. A data conductive layer disposed on the interlayer insulating film in the display area includes source and drain electrodes. A passivation layer disposed on the data conductive layer covers the source and drain electrodes. A via layer is disposed on the passivation layer. A pixel electrode is disposed on the via layer. The pixel electrode is connected to the source electrode through a contact hole penetrating the via layer and the passivation layer.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seul Ki Kim, Seung Sok Son, Kap Soo Yoon, Woo Geun Lee, Su Jung Jung, Seung Ha Choi
  • Patent number: 11521570
    Abstract: A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: December 6, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Hoon Lim, Kang Nam Kim, Seok Hwan Bang, Sung Hwan Won, Woo Geun Lee, Kyu Sik Cho, Soo Jung Chae
  • Publication number: 20220384491
    Abstract: A substrate including a first signal line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a second signal line intersecting the first signal line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer pattern and spaced apart from the second electrode, and an insulator comprising a first portion disposed between the first signal line and the second signal line, and at least partially overlapping with both of the first signal line and the second signal line.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 1, 2022
    Inventors: Young-Wook LEE, Woo-Geun LEE, Ki-Won KIM, Hyun-Jung LEE, Ji-Soo OH
  • Publication number: 20220336669
    Abstract: A display device according to an embodiment includes: a substrate; a first conductive layer positioned on the substrate; a semiconductor layer positioned on the first conductive layer; a second conductive layer positioned on the semiconductor layer; an oxygen supply layer positioned under the second conductive layer, in contact with the second conductive layer, and having the same planar shape as the second conductive layer; and a light-emitting element connected to the second conductive layer, wherein the oxygen supply layer includes a metal oxide that includes one or more of indium, zinc, tin, or gallium, or alloys thereof.
    Type: Application
    Filed: January 4, 2022
    Publication date: October 20, 2022
    Inventors: SEOK HWAN BANG, Hyun Seong Kang, Jong-in Kim, Joon Geol Kim, Seung Sok Son, Woo Geun Lee, Young Jae Jeon
  • Patent number: 11437412
    Abstract: A substrate including a gate line and a first electrode disposed on the substrate, an oxide semiconductor layer pattern overlapping the first electrode, an insulating layer disposed between the first electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a second electrode electrically connected to the oxide semiconductor layer pattern, a third electrode electrically connected to the oxide semiconductor layer, the third electrode spaced apart from the second electrode, and an insulating pattern including a first portion which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: September 6, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Publication number: 20220199742
    Abstract: A display device includes a semiconductor layer of a driving transistor; a semiconductor layer of a switching transistor; a semiconductor layer of an initialization transistor; a gate electrode of the driving transistor overlapping a semiconductor layer of the driving transistor; a lower storage electrode connected to the semiconductor layer of the switching transistor; an upper storage electrode connected to the semiconductor layer of the driving transistor, a light blocking pattern, and the semiconductor layer of the initialization transistor, and overlapping the lower storage electrode; a semiconductor layer of a first auxiliary transistor adjacent the semiconductor layer of the switching transistor and/or the semiconductor layer of the initialization transistor; a first electrode of the first auxiliary transistor connected to the semiconductor layer of the first auxiliary transistor; and a second electrode of the first auxiliary transistor connected to the semiconductor layer of the first auxiliary transi
    Type: Application
    Filed: August 20, 2021
    Publication date: June 23, 2022
    Applicant: Samsung Display Co., LTD.
    Inventors: Young Jae JEON, Woo Geun LEE, Jae Beom CHOI, Jong-In KIM, Jin-Won LEE
  • Publication number: 20220157915
    Abstract: A display device including a substrate; a signal line disposed on the substrate and to which a predetermined voltage signal is applied; a power auxiliary line to which a first source voltage is applied; a first driving voltage line to which a first driving voltage higher than the first source voltage is applied; and a first transistor disposed between the signal line and the first driving voltage line. The first transistor includes a first lower gate electrode connected to the power auxiliary line and a first upper gate electrode connected to the signal line.
    Type: Application
    Filed: September 2, 2021
    Publication date: May 19, 2022
    Inventors: Woo Geun LEE, Young Jae Jeon, Woo Bin Lee, Jin Won Lee
  • Publication number: 20220140059
    Abstract: A display device includes a pixel electrode disposed on a first surface of a substrate, a light emitting layer disposed on the pixel electrode, a common electrode disposed on the light emitting layer, a supply voltage line disposed on the first surface of the substrate and applying a voltage to the common electrode, a first auxiliary conductive layer disposed on a second surface of the substrate, and a first connection conductive layer at least partially disposed on a side surface of the substrate and electrically connecting the first auxiliary conductive layer to the supply voltage line.
    Type: Application
    Filed: September 15, 2021
    Publication date: May 5, 2022
    Applicant: Samsung Display Co., LTD.
    Inventors: Jong In KIM, Hyun Seong KANG, Joon Geol KIM, Seung Sok SON, Woo Geun LEE, Young Jae JEON, Soo Jung CHAE, Ji Yun HONG
  • Publication number: 20220139965
    Abstract: A display device includes a substrate and a transistor disposed on the substrate and including a semiconductor layer, wherein the semiconductor layer includes a mesh structure, and wherein a plurality of openings are formed in the semiconductor layer.
    Type: Application
    Filed: July 6, 2021
    Publication date: May 5, 2022
    Inventors: Woo Bin LEE, Seok Hwan BANG, Seung Sok SON, Woo Geun LEE, Soo Jung CHAE
  • Publication number: 20220102390
    Abstract: A display device includes a base layer; a first pattern disposed on the base layer; an insulating layer disposed on the first pattern and including layers; and a second pattern disposed on the insulating layer. At least two of the layers of the insulating layer include a same material.
    Type: Application
    Filed: June 8, 2021
    Publication date: March 31, 2022
    Applicant: Samsung Display Co., LTD.
    Inventors: Keum Hee LEE, Dong Hoon SHIN, June Whan CHOI, Seung Sok SON, Woo Geun LEE