Abstract: A stacked-type chip package structure in which stacked chips and stacked flexible circuit boards are disposed on a substrate. A plurality of spacer layers is respectively sandwiched between two adjacent chips and stacked on top of each other. In addition, conductive bumps are disposed on the substrate and between the stacked flexible circuit boards, such that the stacked flexible circuit boards are electrically connected to the substrate. Besides, conductive wires are electrically connected between the flexible circuit boards and the chips, so as to form a package structure with multi-layer chips on the substrate. Thereby, electrical performance and reliability of the chips are improved.

Abstract: A multi-chip stack package comprising a first wiring substrate, a first chip, a second wiring substrate, and a second chip is provided. The first wiring substrate is with a front side and a rear side. The first chip is disposed on the front side of the first wiring substrate and electrically connected to the first wiring substrate and the first chip has a first active surface. The second wiring substrate is disposed on the first active surface of the first chip and electrically connected to the first wiring substrate. The second chip is disposed on the second wiring substrate and electrically connected to the second wiring layer. The second active surface of the second chip faces the first active surface of the first chip.

Abstract: A multi-chip stack package comprising a first wiring substrate, a first chip, a second wiring substrate, and a second chip is provided. The first wiring substrate is with a front side and a rear side. The first chip is disposed on the front side of the first wiring substrate and electrically connected to the first wiring substrate and the first chip has a first active surface. The second wiring substrate is disposed on the first active surface of the first chip and electrically connected to the first wiring substrate. The second chip is disposed on the second wiring substrate and electrically connected to the second wiring layer. The second active surface of the second chip faces the first active surface of the first chip.

Abstract: A stacked-type chip package structure in which stacked chips and stacked flexible circuit boards are disposed on a substrate. A plurality of spacer layers is respectively sandwiched between two adjacent chips and stacked on top of each other. In addition, conductive bumps are disposed on the substrate and between the stacked flexible circuit boards, such that the stacked flexible circuit boards are electrically connected to the substrate. Besides, conductive wires are electrically connected between the flexible circuit boards and the chips, so as to form a package structure with multi-layer chips on the substrate. Thereby, electrical performance and reliability of the chips are improved.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a plurality of dielectric layers and a plurality of conductive plugs. The novel fuse structure includes a plurality of fuse units, and a new layout of the fuse units to increase the pitch between the fuse units, preventing the fuse structure from failing when misalignment of the laser beam and thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, thus increasing reliability and yield.

Abstract: The present invention relates to a package device including a first substrate, a plurality of first chips positioned on the first substrate, a second substrate positioned on the first substrate, a second chip positioned on the second substrate, an adhesive layer positioned on the second chip, and a heat spreader positioned above the first substrate, the first chips, the second substrate, and the adhesive layer, wherein the heat spreader has a plurality of openings for cold air to flow into the package device and generate convection with hot air inside the package device in order to cool down the package device.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a plurality of dielectric layers and a plurality of conductive plugs. The novel fuse structure includes a plurality of fuse units, and a new layout of the fuse units to increase the pitch between the fuse units, preventing the fuse structure from failing when misalignment of the laser beam and thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, thus increasing reliability and yield.

Abstract: A chip socket scale package. The package presents combined compatibility with two different chip scale package types with solder balls in same position, thereby using only one chip socket scale package.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a plurality of dielectric layers and a plurality of conductive plugs. The novel fuse structure includes a plurality of fuse units, and a new layout of the fuse units to increase the pitch between the fuse units, preventing the fuse structure from failing when misalignment of the laser beam and thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, thus increasing reliability and yield.

Abstract: A double capacity stacked memory device. In the present invention, two memory chips each have a plurality of control terminals and address terminals, and two data input/output terminals. The control terminals and address terminals of the first memory chip are electrically coupled to those of the second memory chip correspondingly to serve as control terminals and address terminals of the stacked memory respectively, and the data input/output terminals of the two memory chips construct four data input/output terminals of the stacked memory, such that the stacked memory accesses data in the first and second memory chip simultaneously according to an access command, and is thus suitable for double capacity memory devices in a standard package.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a plurality of dielectric layers and a plurality of conductive plugs. The novel fuse structure includes a plurality of fuse units, and a new layout of the fuse units to increase the pitch between the fuse units, preventing the fuse structure from failing when misalignment of the laser beam and thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, thus increasing reliability and yield.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a dielectric layer and a plurality of conductive plugs. The fuse structure includes a plurality of fuse units, with increased the pitch between the fuse units. This structure prevents the fuse structure from failing when both misalignment of the laser beam or thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, which raises reliability and yield.

Abstract: A method of determining word line failure types in a memory device. In the method of the present invention, a relational table of electric characteristic and defective word line failure types is formed. A defective word line is then activated. Next, a first voltage is applied to the defective word line and the electric characteristic of the defective word line is measured. Finally, the defective word line failure type is determined according to the measured electric characteristic of the defective word line and the relational table.

Abstract: A double capacity stacked memory device. In the present invention, two memory chips each have a plurality of control terminals and address terminals, and two data input/output terminals. The control terminals and address terminals of the first memory chip are electrically coupled to those of the second memory chip correspondingly to serve as control terminals and address terminals of the stacked memory respectively, and the data input/output terminals of the two memory chips construct four data input/output terminals of the stacked memory, such that the stacked memory accesses data in the first and second memory chip simultaneously according to an access command, and is thus suitable for double capacity memory devices in a standard package.

Abstract: A fuse structure. A first dielectric layer is formed on a substrate, a first conductive layer is formed on part of the first dielectric layer, a second dielectric layer is formed on part of the first dielectric layer and part of the first conductive layer, and a second conductive layer is formed on part of the second dielectric layer. A third dielectric layer is formed on part of the second conductive layer and part of the second dielectric layer, with an opening to expose part of the second conductive layer, to be defined as the laser spot position. A third conductive layer is formed on the third dielectric layer, with at least one conductive plug penetrating the second dielectric layer, to electrically connect the first conductive layer and the second conductive layer, to function as a fuse. Thus, in the present invention, the fuse structure of the third conductive layer can avoid damage to the adjacent fuse structure from the laser blow process.

Abstract: A fuse structure. A first dielectric layer is formed on a substrate, a first conductive layer is formed on part of the first dielectric layer, a second dielectric layer is formed on part of the first dielectric layer and part of the first conductive layer, and a second conductive layer is formed on part of the second dielectric layer. A third dielectric layer is formed on part of the second conductive layer and part of the second dielectric layer, with an opening to expose part of the second conductive layer, to be defined as the laser spot position. A third conductive layer is formed on the third dielectric layer, with at least one conductive plug penetrating the second dielectric layer, to electrically connect the first conductive layer and the second conductive layer, to function as a fuse. Thus, in the present invention, the fuse structure of the third conductive layer can avoid damage to the adjacent fuse structure from the laser blow process.

Abstract: A chip socket scale package. The package presents combined compatibility with two different chip scale package types with solder balls in same position, thereby using only one chip socket scale package.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a dielectric layer and a plurality of conductive plugs. The fuse structure includes a plurality of fuse units, with increased the pitch between the fuse units. This structure prevents the fuse structure from failing when both misalignment of the laser beam or thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, which raises reliability and yield.

Abstract: The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a plurality of dielectric layers and a plurality of conductive plugs. The novel fuse structure includes a plurality of fuse units, and a new layout of the fuse units to increase the pitch between the fuse units, preventing the fuse structure from failing when misalignment of the laser beam and thermal scattering of the laser beam damage the second layer of the fuse structure in the laser blow process, thus increasing reliability and yield.

Abstract: A novel fuse structure. An optimal position of laser spot is defined above a substrate. A first conductive layer is formed on part of the substrate. A first dielectric layer is formed on the substrate and the first conductive layer. A second conductive layer as formed on the first dielectric layer. A second dielectric layer is formed on the first dielectric layer and the second conductive layer. A third conductive layer comprising the position of laser spot is formed on part of the second dielectric layer. A plurality of first conductive plugs penetrate the first dielectric layer, to electrically connect the first conductive layer and the second conductive layer. At least one second conductive plug penetrates the second dielectric layer, to electrically connect the second conductive layer and the third conductive layer. Thus, the first conductive layer serves as a backup conductive layer when the second conductive layer is broken.