Abstract: Disclosed is a Reference Signal Receiving Quality (RSRQ) reporting method and device. In the method, RSRQ measurement is performed, and an adopted RSRQ measurement type for the RSRQ measurement is recorded; and the adopted RSRQ measurement type and an RSRQ measurement result under the RSRQ measurement type are reported.

Abstract: In accordance with some embodiments of the present invention, a branch prediction unit for an embedded controller may be placed in association with the instruction fetch unit instead of the decode stage. In addition, the branch prediction unit may include no branch predictor. Also, the return address stack may be associated with the instruction decode stage and is structurally separate from the branch prediction unit. In some cases, this arrangement reduces the area of the branch prediction unit, as well as power consumption.

Abstract: This invention discloses a door-window sensor which can be integrated with the associated fittings of the door and window. The sensor cannot be seen from appearance of the door and window, thus making the door and window beautiful and elegant on the whole. It can be installed easily without the limitation of door and window in the external dimension; it is used to determine whether the door and window is locked or closed; its cost is at a lower level. For the sensor, the door and window consists of frame and leaf. The leaf is driven by the motor to rotate around the connected axis and locked to the frame by means of lock. It gets close to inner side of the frame when closed and away from inner side of the frame when opened. The sensor consists of induction generating components, inductive device and data processing unit.

Abstract: A buffer status reporting method, device, terminal, and eNB are provided. The buffer status reporting method is implemented by a wireless communications terminal capable of operating in a dual-connection wireless communications network including a master eNB and a secondary eNB. The processing method includes: determining target upload data; determining, in the target upload data, first data transmitted via either the master eNB or the secondary eNB, and second data transmitted via both of the master eNB and the secondary eNB; sending to the target eNB the total value of the first data buffer size and the second data buffer size, the first data buffer size being the size of the first data, and the second data buffer size being smaller than or equal to the size of the second data.

Abstract: Disclosed herein are techniques for sensing multiple reference levels in non-volatile storage elements without changing the voltage on the selected word line. One aspect includes determining a first condition of a selected non-volatile storage element with respect to a first reference level based on whether a sensing transistor conducts in response to a sense voltage on a sense node. Then, a voltage on the source terminal of the sensing transistor is modified after determining the first condition with respect to the first reference level. A second condition of the selected non-volatile storage element is then determined with respect to a second reference level based on whether the sensing transistor conducts in response to the sense voltage on the sense node. This allows two different reference levels to be efficiently sensed. Dynamic power is saved due low capacitance of the sensing transistor relative to the sense node.

Abstract: The present disclosure provides a method for accessing a cell and a device for accessing a cell. The method for accessing a cell includes: receiving, by a terminal device, system information sent by a serving cell where the terminal device resides, wherein the system information comprises a cell resident risk identifier and measurement information; determining, based on the cell resident risk identifier, that the serving cell has a risk to be subjected to a lakeside effect, and detecting signal quality of the serving cell based on the measurement information; and determining whether the terminal device is subjected to the lakeside effect based on the detected signal quality, and accessing the serving cell when it is determined that the terminal device is not subjected to the lakeside effect.

Abstract: The present disclosure provides QoS management methods, QoS management devices and a QoS management system. According to the present disclosure, with respect to a terminal in a dual-connectivity scenario, QoS parameter thresholds corresponding to a QoS parameter may be re-allocated to an MeNB and an SeNB for the terminal in accordance with an initial value corresponding to the QoS parameter of the terminal, so as to ensure that a QoS parameter value finally acquired by the terminal and corresponding to the QoS parameter does not exceed a numerical range defined by the initial value of the QoS parameter. As a result, it is able to match services provided to the terminal with the QoS that should have been possessed thereby in the case that the terminal is served by the MeNB and the SeNB, thereby to control the QoS of the terminal.

Abstract: An instruction pipeline implemented on a semiconductor chip is described. The semiconductor chip includes an execution unit having the following to execute an interrupt handling instruction. Storage circuitry to hold different sets of micro-ops where each set of micro-ops is to handle a different interrupt. First logic circuitry to execute a set of said sets of micro-ops to handle an interrupt that said set is designed for. Second logic circuitry to return program flow to an invoking program upon said first logic circuitry having handled said interrupt.

Abstract: An apparatus is described that contains a processing core comprising a CPU core and at least one accelerator coupled to the CPU core. The CPU core comprises a pipeline having a translation look aside buffer. The CPU core comprising logic circuitry to set a lock bit in attribute data of an entry within the translation look-aside buffer entry to lock a page of memory reserved for the accelerator.

Abstract: In accordance with some embodiments of the present invention, a branch prediction unit for an embedded controller may be placed in association with the instruction fetch unit instead of the decode stage. In addition, the branch prediction unit may include no branch predictor. Also, the return address stack may be associated with the instruction decode stage and is structurally separate from the branch prediction unit. In some cases, this arrangement reduces the area of the branch prediction unit, as well as power consumption.

Abstract: Described are a security check method and system, a terminal, and a verification server.

Abstract: Methods for precharging bit lines using closed-loop feedback are described. In one embodiment, a sense amplifier may include a bit line precharge circuit for setting a bit line to a read voltage prior to sensing a memory cell connected to the bit line. The bit line precharge circuit may include a first transistor in a source-follower configuration with a first gate and a first source node electrically coupled to the bit line. By applying local feedback from the first source node to the first gate, the bit line settling time may be reduced. In some cases, a first voltage applied to the first gate may be determined based on a first current drawn from the first bit line. Thus, the first voltage applied to the first gate may vary over time depending on the conductivity of a selected memory cell connected to the bit line.

Abstract: The present disclosure provides mobile terminal communication control methods, devices and related equipment. An MBS receives from a mobile terminal a RLF message indicative of a RLF occurring at the mobile terminal for an SBS, and transmits to the mobile terminal a first deactivation instruction message for instructing the mobile terminal to be deactivated for the SBS. According to the present disclosure, it is able to effectively control the communication of the mobile terminal in a dual-connection mode when the RLF occurs at the mobile terminal for the SBS.

Abstract: In accordance with some embodiments of the present invention, a branch prediction unit for an embedded controller may be placed in association with the instruction fetch unit instead of the decode stage. In addition, the branch prediction unit may include no branch predictor. Also, the return address stack may be associated with the instruction decode stage and is structurally separate from the branch prediction unit. In some cases, this arrangement reduces the area of the branch prediction unit, as well as power consumption.

Abstract: Methods for precharging bit lines using closed-loop feedback are described. In one embodiment, a sense amplifier may include a bit line precharge circuit for setting a bit line to a read voltage prior to sensing a memory cell connected to the bit line. The bit line precharge circuit may include a first transistor in a source-follower configuration with a first gate and a first source node electrically coupled to the bit line. By applying local feedback from the first source node to the first gate, the bit line settling time may be reduced. In some cases, a first voltage applied to the first gate may be determined based on a first current drawn from the first bit line. Thus, the first voltage applied to the first gate may vary over time depending on the conductivity of a selected memory cell connected to the bit line.

Abstract: An instruction pipeline implemented on a semiconductor chip is described. The semiconductor chip includes an execution unit having the following to execute an interrupt handling instruction. Storage circuitry to hold different sets of micro-ops where each set of micro-ops is to handle a different interrupt. First logic circuitry to execute a set of said sets of micro-ops to handle an interrupt that said set is designed for. Second logic circuitry to return program flow to an invoking program upon said first logic circuitry having handled said interrupt.

Abstract: Disclosed herein are techniques for sensing multiple reference levels in non-volatile storage elements without changing the voltage on the selected word line. One aspect includes determining a first condition of a selected non-volatile storage element with respect to a first reference level based on whether a sensing transistor conducts in response to a sense voltage on a sense node. Then, a voltage on the source terminal of the sensing transistor is modified after determining the first condition with respect to the first reference level. A second condition of the selected non-volatile storage element is then determined with respect to a second reference level based on whether the sensing transistor conducts in response to the sense voltage on the sense node. This allows two different reference levels to be efficiently sensed. Dynamic power is saved due low capacitance of the sensing transistor relative to the sense node.

Abstract: Systems and methods of operating a memory controller may provide for receiving a write request from a motion compensation module, wherein the write request includes video data. A compression of the video data may be conducted to obtain compressed data, wherein the compression of the video data is transparent to the motion compensation module. In addition, the compressed data can be stored to one or more memory chips. Moreover, a read request may be received, wherein stored data is retrieved from at least one of the one or more memory chips in response to the request. Additionally, a decompression of the stored data may be conducted to obtain decompressed data.

Abstract: A thin film transistor (TFT), a method for fabricating the same, an array substrate and a display device are provided. The TFT includes a source electrode and a drain electrode, a semiconductor active layer, a gate insulating layer and a gate electrode. The TFT further includes a light-shielding layer between the source electrode and the drain electrode. The light-shielding layer separates the source electrode and the drain electrode, and the light-shielding layer is disposed on a light incident side of the semiconductor active layer and is used to prevent the incident light from irradiating on the semiconductor active layer.

Abstract: A bottom electrode and a method of manufacturing the same are disclosed. The present invention relates to the field of dry etching, and has solved problems of separately fabrication of the ceramic points and ceramic layer of the conventional bottom electrode, low adhesion strength between the ceramic points and ceramic layer, incidental dropping off the ceramic layer. The bottom electrode includes: a metal substrate and an insulating layer disposed on the metal substrate, wherein the metal substrate comprises: a base substrate and a plurality of protrusion parts disposed on the base substrate, the insulating layer is disposed on surface of the base substrate and the protrusion parts on surface of the base substrate. Insulating protrusion points are formed at the protrusion parts.