Patents by Inventor Xiaoyan Zhang
Xiaoyan Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11979225Abstract: Embodiments of this application provide a downlink control information transmission method in which after receiving one piece of downlink control information (DCI), the terminal device learns whether blind detection of DCI needs to be continued. The method includes: A terminal device receives first DCI, where the first DCI includes first indication information, and the first indication information is used to indicate a first antenna port. The terminal device determines, based on the first antenna port and antenna port configuration information, whether second DCI exists. The configuration information may include an index of a CDM group to which each of a plurality of antenna ports belongs and a maximum quantity of CDM groups that is supported by the terminal device. Alternatively the configuration information may include one or more antenna port groups, and each of the one or more antenna port groups includes one or more antenna ports.Type: GrantFiled: September 28, 2021Date of Patent: May 7, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Liuliu Ji, Hongzhe Shi, Haicun Hang, Min Zhang, Xiaohan Wang, Xiaoyan Bi
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Patent number: 11967497Abstract: A method for cleaning semiconductor substrate without damaging patterned structure on the semiconductor substrate using ultra/mega sonic device comprises applying liquid into a space between a substrate and an ultra/mega sonic device; setting an ultra/mega sonic power supply at frequency f1 and power P1 to drive the ultra/mega sonic device; before bubble cavitation in the liquid damaging patterned structure on the substrate, setting the ultra/mega sonic power supply at zero output; after temperature inside bubble cooling down to a set temperature, setting the ultra/mega sonic power supply at frequency f1 and power P1 again; detecting power on time at power P1 and frequency f1 and power off time separately or detecting amplitude of each waveform output by the ultra/mega sonic power supply; comparing the detected power on time with a preset time ?1, or comparing the detected power off time with a preset time ?2, or comparing detected amplitude of each waveform with a preset value, if the detected power on timeType: GrantFiled: January 13, 2022Date of Patent: April 23, 2024Assignee: ACM Research (Shanghai) Inc.Inventors: Jun Wang, Hui Wang, Fufa Chen, Fuping Chen, Jian Wang, Xi Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Liangzhi Xie, Xuejun Li
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Publication number: 20240124035Abstract: In one embodiment, a method includes identifying, by an image detection tool, a tank within an image of a railway environment and identifying, by the image detection tool, a railroad track within the image of the railway environment. The method also includes determining, by the image detection tool, a distance between the tank and the railroad track and comparing, by the image detection tool, the distance between the tank and the railroad track to a predetermined threshold distance. The method further includes determining, by the image detection tool, that the tank presents a hazard to the railway environment in response to comparing the distance between the tank and the railroad track to the predetermined threshold distance.Type: ApplicationFiled: December 21, 2023Publication date: April 18, 2024Applicant: BNSF Railway CompanyInventors: Andrea Leticia Arias Llorenty, Sandra N. Green, Rucha D. Jani, David Matthew King, Doug McReynolds, Seyed Mohammad Nourbakhsh, Stephanie Ortiz Watkins, Nathaniel Richmond, Xiaoyan Si, Je Sang Sung, Anpeng Zhang
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Patent number: 11961442Abstract: A shift register unit, a driving method, a drive circuit, and a display apparatus are disclosed. The shift register unit includes: a control circuit, which is configured to adjust signals of a first node and a second node according to an input signal end, a first control signal end, a second control signal end and a first reference signal end; a cascade circuit, which is configured to provide, according to the signal of the first node, a signal of a first cascade clock signal end to a cascade output end; and an output circuit, which is configured to provide, according to the signal of the first node, a signal of a control clock signal end to a drive output end, and provide, according to the signal of the second node, a signal of a second reference signal end to the drive output end.Type: GrantFiled: October 21, 2020Date of Patent: April 16, 2024Assignee: BOE Technology Group Co., Ltd.Inventors: Wei Yan, Wenwen Qin, Yue Shan, Deshuai Wang, Jiguo Wang, Zhen Wang, Xiaoyan Yang, Han Zhang, Jian Zhang, Yadong Zhang, Jian Sun
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Publication number: 20240119073Abstract: Embodiments of the present disclosure provide an information processing method and apparatus, a device, an electronic device, a computer-readable storage medium, a computer program product, and a computer program. The method includes: acquiring comment data corresponding to at least one target media content, where the target media content is media content that has an association with a preset object; acquiring at least one question-and-answer content related to the preset object in the comment data, where the question-and-answer content includes question content and at least one answer content for the question content; aggregating and displaying the at least one question-and-answer content on an interface associated with the preset object.Type: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Inventors: Xiaoyan ZHANG, Haotian CAO
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Patent number: 11946092Abstract: A method for producing 2-keto-3-deoxygluconate (KDG) from 2-(acetylamino)-2-deoxy-D-gluconic acid (GlcNAc1A) by two enzymes; GlcNAc1A is converted to KDG by incubating GlcNAc1A with a deacetylase OngB at 25° C. for 4-12 h and then with a deaminase OngC at 25° C. for another 10-15 h; it constructs two engineered E. coli/pET22b-ongB (carrying the ongB gene) and E. coli/pET22b-ongC (carrying the ongC gene) strains to prepare recombinant proteins OngB and OngC, respectively; at the action of these two enzymes, OngB and OngC, GlcNAc1A is converted to KDG, which solves the bottleneck of GlcNAc1A utilization during the bioconversion of chitin; the KDG is an important metabolic intermediate to synthesize furan derivatives, herbicides, food additives and other industrially important chemical compounds, having wide industrial applications.Type: GrantFiled: October 31, 2022Date of Patent: April 2, 2024Assignee: SHANDONG UNIVERSITYInventors: Yuzhong Zhang, Pingyi Li, Wenxin Jiang, Xiulan Chen, Yishuo Zhang, Xiaoyan Song
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Publication number: 20240102025Abstract: The present disclosure provides a gene combination for expressing and producing terrequinone A in Escherichia coli and use thereof. The gene combination includes a tdiAS gene, a tdiBS gene, a tdiCS gene, a tdiDS gene, a tdiES gene, an sfpS gene, an ScCKS gene, and an AtIPKS gene with nucleotide sequences set forth in SEQ ID NOS:1 to 8. In the present disclosure, a recombinant engineered strain capable of producing terrequinone A having anti-cancer activity is obtained by separately constructing recombinant plasmids pC02 and pU03 through the eight genes and transforming the two recombinant plasmids into E. coli. The content of terrequinone A in a fermentation broth thereof is 106.3 mg/L, which has potential application value in the biopharmaceutical field.Type: ApplicationFiled: May 24, 2023Publication date: March 28, 2024Inventors: Yongsheng TIAN, Lijuan WANG, Yongdong DENG, Quanhong YAO, Rihe PENG, Jianjie GAO, Zhenjun LI, Wenhui ZHANG, Bo WANG, Jing XU, Yu WANG, Xiaoyan FU, Hongjuan HAN
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Publication number: 20240096878Abstract: The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Applicant: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.Inventors: Danfeng MAO, King Yuen WONG, Jinhan ZHANG, Xiaoyan ZHANG, Wei WANG, Jianjian SHENG
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Publication number: 20240081332Abstract: The present disclosure provides a herbicide composition and a preparation method and an application method thereof, and relates to the technical field of herbicides. The herbicide composition includes pinoxaden and a cyclic lactone compound. The cyclic lactone compound is five-membered cyclic lactone and/or six-membered cyclic lactone. The herbicide composition solves the technical problems of poor chemical stability and precipitation due to crystallization at low temperature of existing pinoxaden emulsifiable concentrate formulations. In the herbicide composition, the cyclic lactone compound is used in combination with the pinoxaden, such that not only the solubility of the pinoxaden is improved, but also a chemical stabilization effect of the pinoxaden is effectively improved, and the problems of precipitation due to crystallization at low temperature and chemical stability of the pinoxaden emulsifiable concentrate formulations are solved.Type: ApplicationFiled: November 24, 2023Publication date: March 14, 2024Inventors: Xianbo XU, Furong WANG, Bangchi CHEN, Jin HAN, Xiaoyan XU, Zhen ZHANG, Haiping MU
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Patent number: 11929274Abstract: A poling apparatus for poling a polymer thin film formed on a workpiece carried by a workpiece carrier. The workpiece has grounding electrodes and grounding pads located at edges, and a thin film covering the grounding electrodes but exposing the grounding pads. The workpiece carrier has carrier electrodes located around the workpiece and inside grounding ports at the bottom. The poling apparatus includes, in a poling chamber, a poling source generating a plasma, a Z-elevator to raise the workpiece carrier toward the poling source using the grounding ports, and grounding mechanisms including downwardly biased electrical contacts which, when the workpiece carrier is raised by the Z-elevator, connect the grounding pads of the workpiece with the carrier electrodes, to ground the workpiece. The poling apparatus additionally includes preparation platform and transfer platform with conveyer systems with rollers and Z-elevators to move the workpiece carrier in and out of the poling chamber.Type: GrantFiled: July 9, 2023Date of Patent: March 12, 2024Assignee: Creesense Microsystems Inc.Inventors: Hongwei Lu, Daliang Wang, Albert Ting, Efrain Velazquez, Xiaoyan Zhang, Kai-An Wang
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Publication number: 20240080276Abstract: Examples described herein relate to a network interface device comprising a multi-stage programmable packet processing pipeline circuitry to determine a path to transmit a packet based on relative network traffic transmitted via multiple paths. In some examples, determine a path to transmit a packet is based on Deficit Round Robin (DRR). In some examples, the programmable packet processing pipeline circuitry includes: a first stage to manage two or more paths, wherein a path of the two or more paths of the first stage is associated with two or more child nodes, a second stage to manage two or more paths, wherein a path of the two or more paths of the second stage is associated with two or more child nodes, and at least one child node is associated with the determined path.Type: ApplicationFiled: November 7, 2023Publication date: March 7, 2024Applicant: Intel CorporationInventors: Anurag AGRAWAL, John Andrew FINGERHUT, Xiaoyan DING, Song ZHANG
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Publication number: 20240076706Abstract: MLX1034 is from Polaribacter sp. Q13, and has the amino acid sequence of the 1,3/1,4-xylanase MLX1034 is listed in SEQ ID NO.1; a nucleotide sequence of the gene is listed in SEQ ID NO.2; the 1,3/1,4-xylanase MLX1034 in the invention is capable of efficiently and specifically degrading 1,3/1,4-xylan and producing xylooligosaccharides with DP values above one; in addition, the physical and chemical properties of the 1,3/1,4-xylanase MLX1034 are stable enough to hydrolyze 1,3/1,4-xylan at room temperature; the 1,3/1,4-xylanase MLX1034 is suitable for the industrial production of red algal xylooligosaccharides at low energy costs.Type: ApplicationFiled: December 7, 2021Publication date: March 7, 2024Applicant: SHAN DONG UNIVERSITYInventors: Yuzhong ZHANG, Fang ZHAO, Xiulan CHEN, Haining SUN, Xiaoyan SONG, Pingyi LI
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Patent number: 11922335Abstract: The present disclosure relates to a method and system for evaluating the macro resilience of offshore oil well control equipment. The method for evaluating the macro resilience of offshore oil well control equipment comprises six steps: determining the type and strength of external disaster; calculating the failure rate of components; calculating the recovery rate of the components; modeling the BN for a degradation process; modeling the BN for a maintenance process; and calculating the resilience of the offshore oil well control equipment. A system for evaluating the macro resilience of offshore oil well control equipment comprises an external disaster evaluation module, a component failure rate calculation subsystem, a reliability degradation process simulation module, a fault identification module, a component recovery rate calculation module, a reliability recovery process simulation module, a reliability change curve derivation unit and an resilience calculation unit.Type: GrantFiled: December 5, 2019Date of Patent: March 5, 2024Assignee: China University of Petroleum (East China)Inventors: Baoping Cai, Yonghong Liu, Yanping Zhang, Chuntan Gao, Xiaoyan Shao, Hongqi Xu, Xincheng Li, Yandong Chen, Renjie Ji, Zengkai Liu, Libing Liu, Rikui Zhang, Yuqian Yang, Shitang Liu, Xin Wei
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Publication number: 20240067646Abstract: Provided herein are compounds of Formula (I): and forms thereof, including compositions thereof and uses therewith for treating spinal muscular atrophy.Type: ApplicationFiled: July 26, 2023Publication date: February 29, 2024Inventors: Hongyan QI, Soongyu CHOI, Amal DAKKA, Gary Mitchell KARP, Jana NARASIMHAN, Nikolai NARYSHKIN, Anthony A. TURPOFF, Marla L. WEETALL, Ellen WELCH, Matthew G. WOLL, Tianle YANG, Nanjing ZHANG, Xiaoyan ZHANG, Xin ZHAO, Luke GREEN, Emmanuel PINARD, Hasane RATNI
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Patent number: 11911807Abstract: The present invention provides a method for cleaning substrates comprising the steps of: placing a substrate on a substrate holder; implementing a bubble less or bubble-free pre-wetting process for the substrate; and implementing an ultra/mega sonic cleaning process for cleaning the substrate.Type: GrantFiled: February 7, 2018Date of Patent: February 27, 2024Assignee: ACM RESEARCH (SHANGHAI), INC.Inventors: Hui Wang, Xi Wang, Fuping Chen, Xiaoyan Zhang, Fufa Chen
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Patent number: 11911808Abstract: A system for controlling damages in cleaning a semiconductor wafer comprising features of patterned structures, the system comprising: a wafer holder for temporary restraining a semiconductor wafer during a cleaning process; an inlet for delivering a cleaning liquid over a surface of the semiconductor wafer; a sonic generator configured to alternately operate at a first frequency and a first power level for a first predetermined period of time and at a second frequency and a second power level for a second predetermined period of time, to impart sonic energy to the cleaning liquid, the first predetermined period of time and the second predetermined period of time consecutively following one another; and a controller programmed to provide the cleaning parameters, wherein at least one of the cleaning parameters is determined such that a percentage of damaged features as a result of the imparting sonic energy is lower than a predetermined threshold.Type: GrantFiled: March 9, 2023Date of Patent: February 27, 2024Assignee: ACM Research (Shanghai) Inc.Inventors: Hui Wang, Fufa Chen, Fuping Chen, Jian Wang, Xi Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Liangzhi Xie, Jun Wang, Xuejun Li
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Publication number: 20240063095Abstract: A semiconductor device includes a nitride-based transistor, a first metal layer, a second metal layer, a third metal layer, a source pad, and a drain pad. The first metal layer is disposed over the nitride-based transistor. The second metal layer is disposed over the first metal layer. The third metal layer is disposed over the second metal layer and includes a first pattern and a second pattern which are spaced apart from each other. The source pad is immediately above the first metal layer, the second metal layer, and the first pattern of the third metal layer and is electrically coupled with the nitride-based transistor. The drain pad is immediately above the first metal layer, the second metal layer, and the second pattern of the third metal layer and is electrically coupled with the nitride-based transistor.Type: ApplicationFiled: November 12, 2021Publication date: February 22, 2024Inventors: Xiaoyan ZHANG, Jiawei WEN, Yulong ZHANG, Jinhan ZHANG, Ronghui HAO, Xingjun LI, King Yuen WONG
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Patent number: 11876005Abstract: An apparatus for cleaning flip chip assemblies is provided. The apparatus comprises: a chuck assembly; a motor coupled to the chuck assembly by a spindle; at least one carrier for holding flip chips; at least one spray nozzle for directing DIW, a cleaning solution, a gas or a vapor. Embodiments of the invention further provide methods for cleaning flip chip assemblies. The method comprises: loading at least one flip chip to the flip chip carriers; rotating the chuck assembly at a rotation speed; flowing DIW for rinsing the flip chips; flowing a cleaning solution for removing the contaminants; applying ultrasonic/megasonic energy to the flip chips; blowing a gas or a vapor via the spray nozzles for drying the flip chips; bringing the flip chips out of the flip chip carriers.Type: GrantFiled: April 19, 2019Date of Patent: January 16, 2024Assignee: ACM RESEARCH (SHANGHAI), INC.Inventors: Xiaoyan Zhang, Fuping Chen, Hui Wang
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Patent number: 11869887Abstract: The present disclosure relates to a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor; and a capacitor having a first conductive layer and a second conductive layer and disposed on a second region of the second nitride semiconductor layer. Wherein the first conductive layer of the capacitor and the first source electrode have a first material, and the second conductive layer of the capacitor and the first field plate have a second material.Type: GrantFiled: December 25, 2020Date of Patent: January 9, 2024Inventors: Danfeng Mao, King Yuen Wong, Jinhan Zhang, Xiaoyan Zhang, Wei Wang, Jianjian Sheng
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Publication number: 20230404194Abstract: Disclosed is an artificial eyelash, comprising an artificial eyelash body. A cross section of the artificial eyelash body along a length direction is a polygon. The polygon comprises a triangle. The artificial eyelash body comprises an end portion close to an eyelid and a tip portion far away from the eyelid. The artificial eyelash body is converged to one point of the tip portion along a taper from the end portion to the tip portion. The polygonal artificial eyelash can better reflect light, so that the artificial eyelash has better luster under light, thus providing better eye decoration for a user.Type: ApplicationFiled: June 28, 2022Publication date: December 21, 2023Inventor: Xiaoyan ZHANG