Patents by Inventor Xile Yang

Xile Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210304441
    Abstract: There is provided a computer-implemented method and a decompression unit for decompressing a compressed block of data in accordance with a multi-level difference table. The compressed block of data represents a block of image data comprising a plurality of image element values, wherein each level of the multi-level difference table comprises a plurality of entries. An origin value for the block of image data is determined using data representing the origin value from the compressed block of data. A level within the multi-level difference table for the block of image data is identified using an indication of the level from the compressed block of data.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 30, 2021
    Inventor: Xile Yang
  • Publication number: 20210304446
    Abstract: A computer-implemented method and a compression unit for performing lossy compression on a block of image data in accordance with a multi-level difference table. The block of image data comprises a plurality of image element values, wherein each level of the multi-level difference table comprises a plurality of entries. An origin value for the block of image data is determined. A level within the multi-level difference table for the block of image data is determined. For each image element value in the block of image data, one of the entries at the determined level within the multi-level difference table is selected. A compressed block of data for the block of image data is formed, wherein the compressed block of data comprises: (i) data representing the determined origin value, (ii) an indication of the determined level, and (iii) for each image element value in the block of image data, an indication of the selected entry for that image element value.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 30, 2021
    Inventor: Xile Yang
  • Publication number: 20210295582
    Abstract: A method and apparatus are provided for compressing vertex parameter data in a 3D computer graphic system, where the vertex parameter data is a data block relating to a plurality of vertices used for rendering an image. The data relating to each vertex includes multiple byte data relating to at least one parameter. The parameters include X, Y and Z coordinates and further coordinates for texturing and shading. The multiple byte data is divided into individual bytes and bytes with corresponding byte positions relating to each vertex are grouped together to form a plurality of byte blocks.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventor: Xile Yang
  • Patent number: 11127196
    Abstract: A cache for use in a tile-based rendering graphics processing system for storing transformed primitive blocks, the graphics processing system having a rendering space sub-divided into a plurality of tiles to which primitives can be associated, the graphics processing system comprising rasterization logic that rasterizes primitives on a per tile basis in a plurality of stages, the cache comprising: memory configured to store a plurality of transformed primitive blocks in the cache, each transformed primitive block comprising transformed geometry data for one or more primitives; control logic configured to: maintain a counter for each of the plurality of transformed primitive blocks stored in the cache that indicates a number of tiles of the plurality of tiles that are currently being processed by the rasterization logic and require access to that transformed primitive block, the counter being updated when any stage of the rasterization logic indicates a tile no longer requires access to the transformed primiti
    Type: Grant
    Filed: December 21, 2019
    Date of Patent: September 21, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Robert Brigg, John W Howson, Xile Yang
  • Publication number: 20210279833
    Abstract: Methods and tiling engines for storing tiling primitives in a graphics processing system.
    Type: Application
    Filed: February 16, 2021
    Publication date: September 9, 2021
    Inventor: Xile Yang
  • Publication number: 20210279954
    Abstract: Methods and graphics processing systems render items of geometry using a rendering space which is subdivided into a plurality of first regions. Each of the first regions is sub-divided into a plurality of second regions. Each of a plurality of items of geometry is processed by identifying which of the first regions the item of geometry is present within, and for each identified first region determining an indication of the spatial coverage, within the identified first region, of the item of geometry, and using the determined indication of the spatial coverage within the identified first region to determine whether to add the item of geometry to a first control list for the identified first region or to add the item of geometry to one or more second control lists for a respective one or more of the second regions within the identified first region.
    Type: Application
    Filed: February 8, 2021
    Publication date: September 9, 2021
    Inventors: Xile Yang, Robert Brigg
  • Publication number: 20210279936
    Abstract: Methods and graphics processing systems render primitives using a rendering space which is subdivided into a plurality of regions. Geometry processing logic performs a geometry processing phase which determines, for each of a plurality of primitives which are present in a region, whether the primitive totally covers the region; and stores data for the primitives which are present in the region, wherein the stored data comprises, for each of the primitives which are determined to totally cover the region, data to indicate total coverage of the region. Rendering logic performs a rendering phase for rendering primitives within the region.
    Type: Application
    Filed: February 8, 2021
    Publication date: September 9, 2021
    Inventors: Xile Yang, Robert Brigg
  • Publication number: 20210256756
    Abstract: Data structures, methods and primitive block generators for storing primitives in a graphics processing system.
    Type: Application
    Filed: February 16, 2021
    Publication date: August 19, 2021
    Inventor: Xile Yang
  • Publication number: 20210256746
    Abstract: Methods and tiling engines for tiling primitives in a tile based graphics processing system in which a rendering space is divided into a plurality of tiles. The method includes generating a multi-level hierarchy of tile groups, each level of the multi-level hierarchy comprising one or more tile groups comprising one or more of the plurality of tiles; receiving a plurality of primitive blocks, each primitive block comprising geometry data for one or more primitives; associating each of the plurality of primitive blocks with one or more of the tile groups up to a maximum number of tile groups such that if at least one primitive of a primitive block falls, at least partially, within the bounds of a tile, the primitive block is associated with at least one tile group that includes that tile; and generating a control stream for each tile group based on the associations, wherein each control stream comprises a primitive block entry for each primitive block associated with the corresponding tile group.
    Type: Application
    Filed: February 6, 2021
    Publication date: August 19, 2021
    Inventors: Diego Jesus, John W. Howson, Panagiotis Velentzas, Robert Brigg, Xile Yang
  • Publication number: 20210248805
    Abstract: Methods and control stream generators for generating a control stream for a tile group comprising at least two tiles, the control stream identifying primitive blocks that are relevant to rendering at least one tile in the tile group.
    Type: Application
    Filed: February 8, 2021
    Publication date: August 12, 2021
    Inventors: Diego Jesus, John W. Howson, Panagiotis Velentzas, Robert Brigg, Xile Yang
  • Publication number: 20210248806
    Abstract: Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 12, 2021
    Inventors: Xile Yang, Robert Brigg
  • Patent number: 11043016
    Abstract: A method and apparatus are provided for compressing vertex parameter data in a 3D computer graphic system, where the vertex parameter data is a data block relating to a plurality of vertices used for rendering an image. The data relating to each vertex includes multiple byte data relating to at least one parameter. The parameters include X, Y and Z coordinates and further coordinates for texturing and shading. The multiple byte data is divided into individual bytes and bytes with corresponding byte positions relating to each vertex are grouped together to form a plurality of byte blocks.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: June 22, 2021
    Assignee: Imagination Technologies Limited
    Inventor: Xile Yang
  • Patent number: 10957097
    Abstract: An application sends primitives to a graphics processing system so that an image of a 3D scene can be rendered. The primitives are placed into primitive blocks for storage and retrieval from a parameter memory. Rather than simply placing the first primitives into a primitive block until the primitive block is full and then placing further primitives into the next primitive block, multiple primitive blocks can be “open” such that a primitive block allocation module can allocate primitives to one of the open primitive blocks to thereby sort the primitives into primitive blocks according to their spatial positions. By grouping primitives together into primitive blocks in accordance with their spatial positions, the performance of a rasterization module can be improved. For example, in a tile-based rendering system this may mean that fewer primitive blocks need to be fetched by a hidden surface removal module in order to process a tile.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: March 23, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Xile Yang, John W. Howson, Jonathan Redshaw
  • Publication number: 20210074028
    Abstract: Methods and compression units for compressing a block of image data, the block of image data comprising a plurality of image element values, the image element values being divisible into at least a first value and a second value such that the block of image data comprises a two-dimensional block of first values, the method comprising: compressing a first data set comprising all or a portion of the two-dimensional block of first values in accordance with a first fixed-length compression algorithm to generate a first compressed block by: identifying common base information for the first data set; and identifying a fixed-length parameter for each first value in the first data set, the fixed-length parameter being zero, one or more than one bits in length; and forming a compressed block for the block of image data based on the first compressed block.
    Type: Application
    Filed: August 24, 2020
    Publication date: March 11, 2021
    Inventor: Xile Yang
  • Publication number: 20210056731
    Abstract: Methods and decompression units for decompressing data from a compressed block of image data, the compressed block of image data representing a block of image data comprising a plurality of image element values, the image element values being divisible into at least a first value and a second value such that the block of image data comprises a two-dimensional block of first values.
    Type: Application
    Filed: August 24, 2020
    Publication date: February 25, 2021
    Inventor: Xile Yang
  • Publication number: 20210027519
    Abstract: An application sends primitives to a graphics processing system so that an image of a 3D scene can be rendered. The primitives are placed into primitive blocks for storage and retrieval from a parameter memory. Rather than simply placing the first primitives into a primitive block until the primitive block is full and then placing further primitives into the next primitive block, multiple primitive blocks can be “open” such that a primitive block allocation module can allocate primitives to one of the open primitive blocks to thereby sort the primitives into primitive blocks according to their spatial positions. By grouping primitives together into primitive blocks in accordance with their spatial positions, the performance of a rasterization module can be improved. For example, in a tile-based rendering system this may mean that fewer primitive blocks need to be fetched by a hidden surface removal module in order to process a tile.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 28, 2021
    Inventors: Xile Yang, John W. Howson, Jonathan Redshaw
  • Publication number: 20210012453
    Abstract: A cache system in a graphics processing system stores graphics data items for use in rendering primitives. It is determined whether graphics data items relating to primitives to be rendered are present in the cache, and if not then computation instances for generating the graphics data items are created. Computation instances are allocated to tasks using a task assembly unit which stores task entries for respective tasks. The task entries indicate which computation instances have been allocated to the respective tasks. The task entries are associated with characteristics of computation instances which can be allocated to the respective tasks. A computation instance to be executed is allocated to a task based on the characteristics of the computation instance. SIMD processing logic executes computation instances of a task outputted from the task assembly unit to thereby determine graphics data items, which can be used to render the primitives.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Inventors: Andrea Sansottera, Xile Yang, John Howson, Jonathan Redshaw
  • Publication number: 20200342565
    Abstract: In tile-based graphics processing systems, a tiling unit determines which tiles of a rendering space a primitive is in, such that the primitives in a tile can be rendered. Rather than performing tiling calculations for each tile in a bounding box for a primitive, tiling tests can be performed for a subset of the tiles. Then the results of the tiling tests for the subset of tiles can be used to determine whether the primitive is in other tiles which are located within a region bounded by two or more of the tiles of the subset. In this way the tiling process can be implemented without performing tiling calculations for all of the tiles in the bounding box for a primitive. Reducing the number of tiling calculations can help to improve the efficiency of the graphics processing system (in terms of speed and power consumption) for rendering a primitive.
    Type: Application
    Filed: July 15, 2020
    Publication date: October 29, 2020
    Inventor: Xile Yang
  • Publication number: 20200342666
    Abstract: A method of processing primitives within a tiling unit of a graphics processing system is described. The method comprises determining whether a primitive falls within a tile based on positions of samples within each pixel. If it is determined that the primitive does fall within a tile based on the positions of samples within pixels in a tile, an association between the tile and the primitive is stored to indicate that the primitive is present in the tile. For example, an identifier for the primitive may be added to a control stream for the tile to indicate that the primitive is present in the tile. Various different methods are described to make the determination and these may be used separately or in any combination.
    Type: Application
    Filed: July 15, 2020
    Publication date: October 29, 2020
    Inventors: Xile Yang, Lorenzo Belli, Richard Broadhurst
  • Patent number: 10817973
    Abstract: A cache system in a graphics processing system stores graphics data items for use in rendering primitives. It is determined whether graphics data items relating to primitives to be rendered are present in the cache, and if not then computation instances for generating the graphics data items are created. Computation instances are allocated to tasks using a task assembly unit which stores task entries for respective tasks. The task entries indicate which computation instances have been allocated to the respective tasks. The task entries are associated with characteristics of computation instances which can be allocated to the respective tasks. A computation instance to be executed is allocated to a task based on the characteristics of the computation instance. SIMD processing logic executes computation instances of a task outputted from the task assembly unit to thereby determine graphics data items, which can be used to render the primitives.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: October 27, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Andrea Sansottera, Xile Yang, John Howson, Jonathan Redshaw