Patents by Inventor Xin Yi
Xin Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11740283Abstract: The present invention relates to a multistory electronic device testing apparatus, which mainly comprises a feeding and binning device, a multi-axis transfer device, a chip-testing device and a main controller. The feeding and binning device includes an upper module and a lower module. The chip-testing device includes a plurality of testing units arranged vertically. The main controller not only controls the feeding, binning and testing operations, but also controls the multi-axis transfer device to transfer an electronic device to be tested or a tested electronic device between the feeding and binning device and the chip-testing device. Accordingly, the three-dimensional arrangement of the feeding and binning module and the testing device is realized, and the accommodating capacity and the testing capacity for the electronic devices to be tested and the tested electronic devices can be increased.Type: GrantFiled: June 7, 2022Date of Patent: August 29, 2023Assignee: CHROMA ATE INC.Inventors: Chin-Yi Ouyang, Chien-Ming Chen, Wei-Cheng Kuo, Xin-Yi Wu, Iching Tsai
-
Patent number: 11720734Abstract: Systems, apparatuses, and methods for placing cells in an integrated circuit are described. In various embodiments, an integrated circuit is divided into many partitions. In a first set of partitions susceptible to transistor latch-up, the many transistor gate stripes are connected to one of the power rails rather than left floating. The lengths of the transistor gate stripes are shortened for well tap cells in the first partition, but increased in a second partition susceptible for poor signal integrity. One or more implant layers are formed underneath the transistor gate stripes in each of the first and second partitions to adjust an amount of protection against transistor latch-up and poor signal integrity. An electrostatic discharge transistor is included with at least one source region of multiple source regions formed in a well with a same doping polarity as the at least one source region.Type: GrantFiled: July 3, 2020Date of Patent: August 8, 2023Assignee: Apple Inc.Inventors: Farzan Farbiz, Thomas Hoffmann, Xin Yi Zhang
-
Publication number: 20230223325Abstract: The disclosure provides a semiconductor package substrate made from non-metallic material having a first top surface, a second bottom surface opposite from the first surface, and at least one side surface, the substrate includes at least two pads positioned on the first surface and suitable for receiving an electronic element, an encapsulant material layer covering the first surface, at least two terminals positioned on the second surface and electrically connected to the pads, and a portion of at least one of the two terminals is exposed at the at least one side surface and structured as a wettable flank.Type: ApplicationFiled: January 12, 2023Publication date: July 13, 2023Applicant: NEXPERIA B.V.Inventors: Yu Jun Zhao, Jin Xin Yi, Yuan Li, Frank Burmeister, Edward Tena
-
Publication number: 20230089004Abstract: A display device and a driving method therefor and a manufacturing method thereof. The display device includes: a liquid crystal cell (1); a first polarizer (2) positioned at a light incident side of the liquid crystal cell (1); and a reflective polarization structure (3) positioned at one side of the liquid crystal cell (1) away from the first polarizer (2). The reflective polarization structure (3) is configured to absorb light having a polarization direction parallel to a transmission axis direction of the first polarizer (2), and to reflect light having a polarization direction perpendicular to the transmission axis direction of the first polarizer (2).Type: ApplicationFiled: May 12, 2021Publication date: March 23, 2023Inventors: Yanni LIU, Hui WANG, Shengguang WANG, Huijuan YU, Jinming ZHU, Xin YI
-
Publication number: 20230022501Abstract: The present invention relates to a multistory electronic device testing apparatus, which mainly comprises a feeding and binning device, a multi-axis transfer device, a chip-testing device and a main controller. The feeding and binning device includes an upper module and a lower module. The chip-testing device includes a plurality of testing units arranged vertically. The main controller not only controls the feeding, binning and testing operations, but also controls the multi-axis transfer device to transfer an electronic device to be tested or a tested electronic device between the feeding and binning device and the chip-testing device. Accordingly, the three-dimensional arrangement of the feeding and binning module and the testing device is realized, and the accommodating capacity and the testing capacity for the electronic devices to be tested and the tested electronic devices can be increased.Type: ApplicationFiled: June 7, 2022Publication date: January 26, 2023Inventors: Chin-Yi OUYANG, Chien-Ming CHEN, Wei-Cheng KUO, Xin-Yi WU, Iching TSAI
-
Publication number: 20230023844Abstract: A position calibration system and method are disclosed, in which a control unit is provided to control a positioner sensing module to scan a circular positioner provided on a positioning substrate in a first direction and a second direction so as to acquire midpoints of two scanned line segments and acquire an intersection of lines extending from the two center points in a direction perpendicular to the first and the second directions as a calibration reference point, which correspond to a centroid (a center) of the circular positioner. The calibration reference point functions as a reference point for positioning the positioning substrate with respect to the positioner sensing module and is stored in a memory unit. The calibration reference point can be used as a positioning point during installation of a machine and can also be used for calibration of a position of the machine.Type: ApplicationFiled: January 21, 2022Publication date: January 26, 2023Inventors: Chin-Yi Ouyang, Wei-Cheng Kuo, Chien-Ming Chen, Xin-Yi Wu
-
Patent number: 11332717Abstract: Early vascular cells (EVCs), including endothelial cells and pericytes, are generated from hiPSCs. Unlike the isolated endothelial progenitor cells, the differentiated ECs mature and are functional. When encapsulated in synthetic hydrogel, EVCs respond to matrix cues and self-assembled to form three-dimensional EVCs. Moreover, these EVCs respond to hypoxic microenvironment and undergo vasculogenesis to form complex 3D networks.Type: GrantFiled: July 21, 2016Date of Patent: May 17, 2022Assignee: The Johns Hopkins UniversityInventors: Sharon Gerecht, Xin Yi Chan, Quinton Smith, Yu-I Shen
-
Patent number: 11216116Abstract: A control method is provided, including: obtaining input information, where the input information includes a capacitance signal and report point coordinates generated when a user performs an operation on a terminal screen; using report point coordinates in a previous frame as report point coordinates in a current frame if it is determined that a capacitance signal in the current frame and a capacitance signal in the previous frame that are in the input information meet a preset condition; or using report point coordinates in a previous frame as report point coordinates in a current frame if it is determined that the report point coordinates in the current frame and report point coordinates in a first frame that are in the input information meet a preset condition.Type: GrantFiled: October 15, 2018Date of Patent: January 4, 2022Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Yuanchun Shi, Chun Yu, Lihang Pan, Xin Yi, Weigang Cai, Siju Wu, Xuan Zhou, Jie Xu
-
Patent number: 11061067Abstract: An apparatus and a method provide a high temperature test and a low temperature test. The apparatus mainly includes a depressing head and a test base, wherein the depressing head includes a cooling module, a heating module, and a heat dissipation module therein, the heat dissipation module includes a finned heat sink and a heat conduction member, and the heat conduction member is thermally coupled to the heating module and the finned heat sink. When the low temperature test is performed, an electronic component is cooled by filling liquid nitrogen into the cooling module of the depressing head. When the high temperature test is performed, the electronic component is heated by the heating module. If the temperature of the electronic device is higher than a predetermined high temperature, the electronic device is cooled by the heat dissipation module.Type: GrantFiled: July 12, 2019Date of Patent: July 13, 2021Assignee: CHROMA ATE INC.Inventor: Xin-Yi Wu
-
Patent number: 11035948Abstract: The disclosure discloses a virtual reality feedback device, and a positioning method, a feedback method, and a positioning system thereof. The method for positioning a virtual reality feedback device includes: obtaining first time point information of a first microwave signal, wherein the first time point information includes a reception time point and a transmission time point of the first microwave signal; obtaining a second time point information of a second microwave signal, wherein the second time point information includes a reception time point and a transmission time point of the second microwave signal; and determining a position of the virtual reality feedback device according to a transmission speed of the first microwave signal, a transmission speed of the second microwave signal, the first time point information, and the second time point information.Type: GrantFiled: October 12, 2018Date of Patent: June 15, 2021Assignees: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Co., Ltd.Inventors: Hui Luo, Hui Wang, Xin Yi, Yanni Liu
-
Publication number: 20210138710Abstract: A wood-plastic/lumber composite co-extrusion feeder includes a frame, wherein at least one group of toothed conveying units, a tooth mark milling unit for milling tooth marks on an outer surface of a lumber, and a lumber co-extrusion mold are arranged on the frame in sequence, each toothed conveying unit includes a lower toothed pressure roller installed on a first fixed bearing seat and an upper toothed pressure roller installed on a first movable bearing seat, and after the first fixed bearing seat and the first movable bearing seat are connected by an adjustment unit, a first conveying channel having an adjustable height is formed between the upper toothed pressure roller and the lower-toothed pressure roller.Type: ApplicationFiled: December 27, 2019Publication date: May 13, 2021Inventors: Rongxian Ou, Qingwen WANG, Xin YI, Wei TANG, Lichao SUN, Junjie XU
-
Patent number: 11003800Abstract: Provided are a data integrity protection method and device for protecting key data in control components of an industrial control system. The method includes establishing a correlation among a plurality of control components in the industrial control system; and determining a summary indicating the integrity of data to be protected in a first control component based on identity features and data features of other control components correlated to the first control component among the plurality of control components. The data features are used for identifying the data to be protected in the control components, and the first control component is any one of the plurality of control components. Since the security of the data in any control component is established over other correlated control components, the key data in the control components can be effectively protected.Type: GrantFiled: November 15, 2018Date of Patent: May 11, 2021Assignee: SIEMENS AKTIENGESELLSCHAFTInventor: Xin Yi Wang
-
Patent number: 11001837Abstract: The present invention provides a low-frequency mutation enrichment sequencing method for free target DNA in plasma, comprising plasma DNA extraction and library construction, general library TT COLD PCR amplification enrichment, probe enrichment capture, PCR and sequencing of captured products, and positive and negatice double-strand error-correction low-frequency information analysis.Type: GrantFiled: February 18, 2016Date of Patent: May 11, 2021Assignee: Geneplus—BeijingInventors: Xiaoxing Lv, Xin Yi, Meiru Zhao, Yanfang Guan, Tao Liu, Ling Yang
-
Publication number: 20210092115Abstract: Systems and methods are disclosed herein for enforcing digital signature on a token useable by a network-addressable device to invoke service calls on services of a service provider. A device platform service of the service provider may receive service calls from the network-addressable device and cause one or more operations to be performed by other services of the service provider in response to receiving a notification that the request is authentic. An authentication service analyses a fingerprint associated with a request submitted by the device and determines whether it is a match to a fingerprint generated from cryptographic authentication information provided by the user in connection with registering the network-addressable device.Type: ApplicationFiled: December 7, 2020Publication date: March 25, 2021Inventors: Ramkishore Bhattacharyya, Rameez Loladia, William Alexander Stevenson, Ashutosh Thakur, Rodrigo Diaz Martin, Andrew John Kiggins, Xin Yi Liu
-
Publication number: 20200401752Abstract: Systems, apparatuses, and methods for placing cells in an integrated circuit are described. In various embodiments, an integrated circuit is divided into many partitions. In a first set of partitions susceptible to transistor latch-up, the many transistor gate stripes are connected to one of the power rails rather than left floating. The lengths of the transistor gate stripes are shortened for well tap cells in the first partition, but increased in a second partition susceptible for poor signal integrity. One or more implant layers are formed underneath the transistor gate stripes in each of the first and second partitions to adjust an amount of protection against transistor latch-up and poor signal integrity. An electrostatic discharge transistor is included with at least one source region of multiple source regions formed in a well with a same doping polarity as the at least one source region.Type: ApplicationFiled: July 3, 2020Publication date: December 24, 2020Inventors: Farzan Farbiz, Thomas Hoffmann, Xin Yi Zhang
-
Patent number: 10862883Abstract: Systems and methods are disclosed herein for enforcing digital signature on a token useable by a network-addressable device to invoke service calls on services of a service provider. A device platform service of the service provider may receive service calls from the network-addressable device and cause one or more operations to be performed by other services of the service provider in response to receiving a notification that the request is authentic. An authentication service analyses a fingerprint associated with a request submitted by the device and determines whether it is a match to a fingerprint generated from cryptographic authentication information provided by the user in connection with registering the network-addressable device.Type: GrantFiled: October 9, 2017Date of Patent: December 8, 2020Assignee: Amazon Technologies, Inc.Inventors: Ramkishore Bhattacharyya, Rameez Loladia, William Alexander Stevenson, Ashutosh Thakur, Rodrigo Diaz Martin, Andrew John Kiggins, Xin Yi Liu
-
Publication number: 20200371662Abstract: A report point output control method and apparatus includes performing feature detection on a capacitance hot spot to determine an eigenvalue of the capacitance hot spot, determining, based on the eigenvalue of the capacitance hot spot, whether a report point matching the capacitance hot spot is from an odd-form touch, and skipping outputting the report point when the report point is the report point generated by the odd-form touch. The eigenvalue includes at least one of a horizontal span, a longitudinal span, an eccentricity, a barycenter coordinate, a maximum capacitance value, an average shadow length, an upper left shadow area, or a lower right shadow area.Type: ApplicationFiled: October 15, 2018Publication date: November 26, 2020Inventors: Yuanchun Shi, Chun Yu, Weijie Xu, Xin Yi, Siju Wu, Xuan Zhou, Jie Xu, Jingjin Xu
-
Publication number: 20200301560Abstract: A control method is provided, including: obtaining input information, where the input information includes a capacitance signal and report point coordinates generated when a user performs an operation on a terminal screen; using report point coordinates in a previous frame as report point coordinates in a current frame if it is determined that a capacitance signal in the current frame and a capacitance signal in the previous frame that are in the input information meet a preset condition; or using report point coordinates in a previous frame as report point coordinates in a current frame if it is determined that the report point coordinates in the current frame and report point coordinates in a first frame that are in the input information meet a preset condition.Type: ApplicationFiled: October 15, 2018Publication date: September 24, 2020Inventors: Yuanchun SHI, Chun YU, Lihang PAN, Xin YI, Weigang CAI, Siju WU, Xuan ZHOU, Jie XU
-
Patent number: 10740527Abstract: Systems, apparatuses, and methods for placing cells in an integrated circuit are described. In various embodiments, an integrated circuit is divided into many partitions. In a first set of partitions susceptible to transistor latch-up, the many transistor gate stripes are connected to one of the power rails rather than left floating. The lengths of the transistor gate stripes are shortened for well tap cells in the first partition, but increased in a second partition susceptible for poor signal integrity. One or more implant layers are formed underneath the transistor gate stripes in each of the first and second partitions to adjust an amount of protection against transistor latch-up and poor signal integrity. An electrostatic discharge transistor is included with at least one source region of multiple source regions formed in a well with a same doping polarity as the at least one source region.Type: GrantFiled: September 6, 2017Date of Patent: August 11, 2020Assignee: Apple Inc.Inventors: Farzan Farbiz, Thomas Hoffmann, Xin Yi Zhang
-
Patent number: 10718443Abstract: A water level controller for a hydroponic system includes a float shifting upward and downward with the culture solution, a first magnetic attraction element and an inlet valve for feeding in the culture solution. The float includes a seal and a second magnetic attraction element. The seal closes the inlet valve to stop feeding in water when the float ascends to a high water level, and moves way from the inlet valve to start feeding in water at a low water level. The second magnetic attraction element attracts the first magnetic attraction element to keep the seal closing the inlet valve at the high water level and to keep the seal moving away from the inlet valve at the low water level, until the buoyancy of the float is larger than the magnetic attraction between the second and the first magnetic attraction element thereby causing escape from each other.Type: GrantFiled: May 17, 2018Date of Patent: July 21, 2020Inventor: Xin-Yi Hong