Patents by Inventor Xing Wei

Xing Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250132935
    Abstract: Disclosed are a consensus method and device, and a blockchain system. A primary node directly broadcasts a transaction hash list including a hash value of at least one unverified transaction in the system, so that a backup node and the primary node simultaneously verify the at least one unverified transaction, and the backup node stores a first verification result obtained by verification and a first hash value of the at least one unverified transaction. The primary node broadcasts an obtained second verification result and a second hash value of the at least one unverified transaction in a pre-preparation message after completing the verification, so that the backup node searches for the first verification result based on the second hash value, and broadcast a preparation message when the second verification result is the same as the searched first verification result, to enter a subsequent consensus stage, and complete the consensus processing.
    Type: Application
    Filed: June 6, 2022
    Publication date: April 24, 2025
    Applicant: CHINA ACADEMY OF INFORMATION AND COMMUNICATIONS TECHNOLOGY
    Inventors: Jian JIN, Jiagui XIE, Xufeng MA, Jian GUO, Bo ZHANG, Xing WEI
  • Publication number: 20250133057
    Abstract: An example method of uniform resource locator (URL) redirection between a client device and a remote system executing a remote desktop accessed by the client device is described. The method includes intercepting, by an extension of a first web browser, a URL selected to be opened on the first web browser, the first web browser and the extension executing on a first system in communication with a second system, the first system and the second system being the client device and the remote system respectively or vice versa; forwarding, by the extension, the URL to a native process executing on the first system; determining, by the native process, an internet protocol (IP) address of the URL; forwarding the URL and the IP address to the second system; and opening, by the second system, the URL on a second web browser executing in the second system.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 24, 2025
    Inventors: Huanhuan ZHANG, Zhaohan REN, Haiwei ZHAO, Yue SUN, Xing WEI
  • Patent number: 12210794
    Abstract: A system is described for redirecting multimedia in a collaborative session on a virtual desktop. The virtual desktop session can be established, and collaborator virtual desktop clients can be connected in a collaborative session where each collaborator can view the desktop GUI in their respective virtual desktop client. A request can be received to play media in a media player in the virtual desktop. The media stream can be intercepted in the virtual desktop before it is rendered in the media player and conveyed to each collaborator's client over a separate virtual channel established between the virtual desktop and each collaborator. The data stream can then be rendered in a client media player by each collaborator's client.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: January 28, 2025
    Assignee: Omnissa, LLC
    Inventors: Xing Wei, Bo Liu, Dongyu Zhao, Huanhuan Zhang, Hongsheng Li
  • Publication number: 20240387171
    Abstract: The present application provides a structure of HR-SOI embedded with a charge capture layer and manufacture thereof. The process for manufacturing a structure of HR-SOI embedded with a charge capture layer comprises: providing a first substrate, wherein the first substrate has a first surface to be subjected to a roughness treatment to form an uneven morphology on the first surface; forming a surface treatment layer, wherein the surface treatment layer has an uneven surface morphology; and forming a polysilicon layer on the surface treatment layer. By the roughness treatment to the first substrate, the first surface and the surface treatment layer both have uneven surface morphology, such that the formed polysilicon layer has stable orientation evolution and grain size, and an increased grain boundary density. Thereby a highly efficient charge trapping polysilicon film can be obtained.
    Type: Application
    Filed: May 10, 2024
    Publication date: November 21, 2024
    Applicants: Zing Semiconductor Corporation, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xing WEI, Rongwang DAI, Hongtao XU, Ziwen WANG, Meng CHEN, Minghao LI, Wei LI
  • Publication number: 20240387241
    Abstract: The present application provides a structure of HR-SOI embedded with a charge capture layer and manufacture thereof. The process for manufacturing a structure of HR-SOI embedded with a charge capture layer comprises: providing a first substrate, wherein the first substrate has a first surface, and a pinning layer is formed on the first surface by a deposition process, and homogenizing the pinning layer surface by dry etching to adjust a thickness uniformity of the pinning layer. Accordingly, the thickness uniformity of the obtained polysilicon film is able to reach a good state.
    Type: Application
    Filed: May 10, 2024
    Publication date: November 21, 2024
    Applicants: Zing Semiconductor Corporation, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xing WEI, Rongwang DAI, Hongtao XU, Meng CHEN, Ziwen WANG, Minghao LI, Wei LI
  • Publication number: 20240384265
    Abstract: The present invention provides a method for single-cell analysis, comprising dividing a cell and a bead attached with multiple barcoded oligonucleotides into a partition. Each of the multiple barcoded oligonucleotides may contain a cell barcode and a unique molecular identifier (UMI), and binds to a poly A sequence of mRNA by means of a polyT sequence at the end of the oligonucleotide to complete the capture of mRNA. First-strand and second-strand synthesis of mRNA are completed by reverse transcription and PCR amplification, respectively. One part of cDNA is used to construct a transcriptome sequencing library, and the other part of cDNA is circularized to form circular double-stranded cDNA, which is used as a template to specifically enrich a target gene.
    Type: Application
    Filed: September 2, 2022
    Publication date: November 21, 2024
    Inventors: Wenqi ZHU, Xing WEI
  • Patent number: 12130792
    Abstract: A computer implemented method for managing datasets for a histogram. The method uses a number of processor units to determine a first span for first bins containing first datapoints in a first dataset in the datasets. The first span is determined based a distribution of the first datapoints in the first dataset and a desired number of bins. The number of processor units adjusts a second span for second bins containing second datapoints in a second dataset in the datasets to form an adjusted span that matches the first span for the first bins. The number of processor units merges the first datapoints in the first bins having the first span with the second datapoints in the second bins having the adjusted span to form a merged dataset for the histogram.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: October 29, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xing Wei, Xiao Bin Sun, Zhe Shao, Dong Hai Yu, Liu Zhen Duo, Chun Lei Xu
  • Publication number: 20240339251
    Abstract: The invention discloses a neodymium-iron-boron magnet and a preparation method thereof. The neodymium-iron-boron magnet comprises a main phase crystal grain, a shell layer of the main phase crystal grain and a Nd-rich phase adjacent to the main phase crystal grain, wherein the main phase crystal grain comprises Nd2Fe14B; or the main phase crystal grain comprises Nd2Fe14B and Pr2Fe14B; the shell layer comprises (Nd/Dy)2Fe14B and/or (Nd/Tb)2Fe14B; the shell layer has a thickness of 0.1-6 ?m; the Nd-rich phase comprises a R6Fe13B phase, wherein the R is one or more selected from the group consisting of Nd, Pr, Dy and Tb. The method of the invention effectively reduces the diffusion amount of the heavy rare earth elements into the main phase, forms a thinner heavy rare earth shell layer, and can further optimize and improve the high temperature performance of the magnet.
    Type: Application
    Filed: January 17, 2022
    Publication date: October 10, 2024
    Inventors: ZHIHUI TANG, JIAYING HUANG, XING WEI, ZHIGANG LI, DEQIN XU, DAKUN CHEN
  • Patent number: 12092588
    Abstract: The present application provides a method for characterizing defects in silicon crystal comprising the following steps: etching a surface of the silicon crystal to remove a predicted thickness of the silicon crystal; conducting a LLS scanning to a surface of the etched silicon crystal to obtain a LLS map of the surface, a LSE size of defects, and defect bulk density; based on at least one of the LLS map of the surface, the LSE size of defects and the defect bulk density, determining a type of defect existing in the silicon crystal and/or a defect zone of each type of defect on the surface. By applying the method, the characterizing period and the characterizing cost can be reduced, plural defects such as vacancy, oxygen precipitate and dislocation can be characterized simultaneously, the characterizing accuracy can be enhanced, and the defect type and the defect zone can be determined with high reliability.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: September 17, 2024
    Assignees: Zing Semiconductor Corporation, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xing Wei, Yun Liu, Zhongying Xue
  • Patent number: 12085600
    Abstract: Disclosed is a non-invasive online monitoring circuit for an on-state saturation voltage of a power semiconductor, including one or more basic units; each basic unit includes a normally-ON switching device, a diode, and a clamping voltage supply; a gate of the normally-ON switching device is connected to a positive electrode of the clamping voltage supply; the positive electrode of the diode is connected to a source of the normally-ON switching device, and a negative electrode of the diode is connected to the gate of the normally-ON switching device; the drain of the normally-ON switching device and the negative electrode of the clamping voltage supply serve as input terminals of the monitoring circuit for accessing the power semiconductor under test; and the source of the normally-ON switching device and the negative electrode of the clamping voltage supply serve as output terminals of the monitoring circuit.
    Type: Grant
    Filed: May 6, 2024
    Date of Patent: September 10, 2024
    Assignee: Hunan Lanhai Electrical Engineering Co., Ltd.
    Inventors: Xing Wei, Kehua Lyu, Yanwei Lyu
  • Publication number: 20240269127
    Abstract: This patent document provides a sustained-release formulation comprising 1-40 parts of a quinoline compound, 100-300 parts of a filler, 50-200 parts of a sustained-release material and optionally 0.5-4 parts of a lubricant. Also provided are methods of treating diseases with the sustained-release formulation.
    Type: Application
    Filed: March 18, 2024
    Publication date: August 15, 2024
    Applicant: Hinova Pharmaceuticals Inc.
    Inventors: Xing Wei, Tongtao Kuang, Jiang Chen, Chaowu Ai, Xinghai Li
  • Publication number: 20240218564
    Abstract: The present invention provides a crystal growing method, an apparatus and a RF-SOI substrate for growing a crystal. The crystal growing method may comprise: controlling a first superconducting coil to generate a first current, and controlling a second superconducting coil to generate a second current, wherein a value of the first current is not equal to a value of the second current, the first superconducting coil and the second superconducting coil are superconducting coils positioned oppositely outside a crucible to generate a magnetic field in the crucible; and pulling upwards to grow a monocrystalline in an asymmetric magnetic field generated by the first current and the second current in the crucible.
    Type: Application
    Filed: December 12, 2023
    Publication date: July 4, 2024
    Applicants: Zing Semiconductor Corporation, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xing WEI, Wenkai LIU, Zhongying XUE, Yun LIU, Rongwang DAI, Minghao LI, Yuehui YU
  • Publication number: 20240183797
    Abstract: The present invention provides a method for determining the type of defects in a monocrystalline silicon wafer, which includes the steps of: using LST to measure particles in an as-grown silicon wafer and thereby obtaining a first measurement, and determining a V-rich region based on the first measurement and a first preset density value; and subjecting the silicon wafer to a thermal treatment, again using LST to measure particles in the silicon wafer and thereby obtaining a second measurement, and determining a Pv region, an I-rich region and a Pi region based on the second measurement, a second preset density value and a third preset density value. As a result, a particle density can be utilized as a basis for accurately and efficiently determining a region of interest of a monocrystalline silicon wafer as one of a V-rich region, a Pv region, a Pi region and an I-rich region.
    Type: Application
    Filed: December 4, 2023
    Publication date: June 6, 2024
    Inventors: Xing WEI, Hao WANG, Minghao LI, Yuehui YU
  • Patent number: 11989560
    Abstract: The present disclosure provides an instruction execution method, device, and electronic equipment. In the instruction execution method described above, after obtaining an exceptional signal generated by a neural network processor during an operation, the electronic equipment determines an exception processing instruction corresponding to the exceptional signal according to the exceptional signal, then it determines a first instruction queue needed to be executed by the neural network processor, and then it generates a second instruction queue based on the exception processing instruction and the first instruction queue, and finally it controls the neural network processor to execute the second instruction queue, so that errors encountered by the neural network processor can be timely processed, thereby shortening the error processing delay and improving the data processing efficiency of the hardware system in the electronic equipment.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: May 21, 2024
    Assignee: BEIJING HORIZON ROBOTICS TECHNOLOGY RESEARCH AND DEVELOPMENT CO., LTD.
    Inventors: Yitong Zhao, Xing Wei
  • Publication number: 20240153764
    Abstract: In a method for preparing silicon-on-insulator, the first etching stop layer, the second etching stop layer, and the device layer are formed bottom-up on the p-type monocrystalline silicon epitaxial substrate, where the first etching stop layer is made of intrinsic silicon, the second etching stop layer is made of germanium-silicon alloy, and the device layer is made of silicon. After oxidation, bonding, reinforcement, and grinding treatment, selective etching is performed. Through a first selective etching to p+/intrinsic silicon, the thickness deviation of the first etching stop layer on the second etching layer is controlled within 100 nm, and then through the second etching and the third etching, the thickness deviation and the surface roughness of the finally prepared silicon-on-insulator film can be optimized to less than 5 nm and less than 4 ?, respectively, so as to realize the flatness of the silicon-on-insulator film.
    Type: Application
    Filed: April 24, 2023
    Publication date: May 9, 2024
    Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCES
    Inventors: Xing WEI, Ziwen WANG, Rongwang DAI
  • Publication number: 20240145137
    Abstract: A main and auxiliary alloy-based neodymium-iron-boron magnet material and the preparation method thereof. The raw material composition for the main and auxiliary alloy-based neodymium-iron-boron magnet material includes a main alloy raw material and an auxiliary alloy raw material, wherein the mass percentage of the auxiliary alloy raw material in the raw material composition for the main and auxiliary alloy-based neodymium-iron-boron magnet material is 1.0-15.0 mass %. For the main and auxiliary alloy-based neodymium-iron-boron magnet material prepared by using the raw material composition, the coercivity is increased while high remanence is ensured, and the preparation method therefor can be suitable for engineering applications.
    Type: Application
    Filed: January 17, 2022
    Publication date: May 2, 2024
    Applicant: Fujian Changting Golden Dragon Rare-Earth Co., Ltd
    Inventors: Xing WEI, Jiaying HUANG, Zhihui TANG, Qingfang HUANG, Zhipeng JIANG, Deqin XU, Dakun CHEN, Gang FU
  • Publication number: 20240141547
    Abstract: The present invention relates to a preparation method of a P-type high-resistance and ultra-high-resistance Czochralski monocrystalline silicon substrate. According to the present invention, an oxygen concentration in a silicon wafer is controlled to match with a resistivity, so as to realize that a conductive type of the silicon substrate does not change after a device is manufactured, and that the silicon substrate has a high resistivity. The oxygen concentration and the resistivity in silicon crystal can be adjusted separately or together; and operation is flexible, and a yield of a high-resistance silicon crystal is greatly improved.
    Type: Application
    Filed: March 2, 2023
    Publication date: May 2, 2024
    Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY CHINESE ACADEMY OF SCIENCES
    Inventors: Xing Wei, Ming Hao Li, Rong Wang Dai, Zi Wen Wang, Zhong Ying Xue
  • Publication number: 20240096645
    Abstract: A SOI wafer is disclosed. The SOI wafer may be characterized by surface roughness of a top silicon layer of the SOI wafer is less than 4 ?, thickness uniformity of the top silicon layer is within ±1%, and a total number of particles on a surface of the top silicon layer of the SOI wafer, measured with setting of 37 nm of SPx detection threshold, is less than 100.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 21, 2024
    Applicants: Zing Semiconductor Corporation, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xing WEI, Rongwang DAI, Ziwen WANG, Minghao LI, Hongtao XU, Meng CHEN
  • Publication number: 20240020081
    Abstract: A system is described for redirecting multimedia in a collaborative session on a virtual desktop. The virtual desktop session can be established, and collaborator virtual desktop clients can be connected in a collaborative session where each collaborator can view the desktop GUI in their respective virtual desktop client. A request can be received to play media in a media player in the virtual desktop. The media stream can be intercepted in the virtual desktop before it is rendered in the media player and conveyed to each collaborator's client over a separate virtual channel established between the virtual desktop and each collaborator. The data stream can then be rendered in a client media player by each collaborator's client.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 18, 2024
    Inventors: Xing Wei, Bo Liu, Dongyu Zhao, Huanhuan Zhang, Hongsheng Li
  • Publication number: 20230359941
    Abstract: A computer-implemented system, platform, programing product, and/or method for improving transformation selection in an ensemble machine learning (ML) model that includes: providing all base ML models of the ensemble ML model; identifying all of a plurality of Derived Fields in all the base ML models; performing a Derived Field run prediction analysis for all the Derived Fields; computing the Derived Field Importance Weight for Field (DFIW4F) and the Derived Field Importance Weight for Model (DFIW4M) for all the Derived Fields; clustering all the Derived Fields into a plurality of Derived Field clusters, wherein each Derived Field cluster is based upon the DFIW4M and the DFIW4F for the Derived Field; sorting all the Derived Field clusters by best cluster based upon DFIW4M and DFIW4F; and running the base ML models based upon the Derived Fields in the best Derived Field cluster until sufficient base ML models have been run.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventors: Dong Hai Yu, Jun Wang, Bo Song, Yao Dong Liu, Jiang Bo Kang, Lei Tian, XING WEI