Abstract: The present application provides a process of surface treatment of a silicon-on-insulator (SOI) wafer comprising: providing a SOI wafer comprising a back substrate, a top silicon layer and an insulating buried layer, wherein the insulating buried layer is located between the back substrate and the top silicon layer, and the top silicon layer has a surface roughness of larger than 10 ?; conducting a first planarization to a surface of the top silicon layer by conducting a batch annealing process at a first target temperature, and conducting a second planarization to a surface of the top silicon layer by conducting a rapid thermal annealing process at a second target temperature. The present application combines the batch annealing process and the rapid thermal annealing process to optimize the SOI wafer, especially the surface roughness of the SOI wafer. The SOI wafer planarized by the two thermal annealing processes has a good surface roughness of the top silicon layer which satisfies process requirements.

Abstract: The present disclosure relates to a method for improving the surface roughness of a SOI wafer. By controlling the gas composition at each stage of the rapid thermal treatment process and corresponding heating and annealing processes, the final wafer is enabled to have a surface roughness of less than 5? and has good application prospects.

Abstract: The invention provides a measuring method of resistivity of a wafer, comprising: choosing a wafer to be measured, conducting a thermal treatment for the wafer to remove a thermal doner in the wafer, conducting an oxidation process for the wafer to form an oxidized surface on the wafer, and measuring resistivity of the wafer. In the method, firstly, the wafer is oxidized to get the oxidized surface, so as to restrict surface variation when placing the wafer in a later process. Therefore, the resistivity measurement of the wafer surface only slightly varies.

Abstract: The present application provides a method for verification of conductivity type of a silicon wafer. The method comprises measuring the resistivity of the silicon wafer to obtain a first resistivity, placing the silicon wafer under atmosphere of air for a predicted time period, measuring the resistivity of the silicon wafer to obtain a second resistivity, and determining conductivity type of the silicon wafer by comparing the first resistivity and the second resistivity. The method can be applied to a silicon wafer having a high resistivity such as higher than 500 ohm-cm to rapidly and accurately determine conductivity type of the silicon wafer. Advantages of the method of the present application include accurate test results, easy operation, simple device requirement, and reduced cost.

Abstract: One-part condensation curable silyl-modified polymer (SMP) based sealant compositions in particular one-part condensation curable SMP based sealant compositions containing a catalyst comprising (i) a titanate and/or zirconate and (ii) a metal carboxylate salt which compositions upon cure provide elastomeric sealants having low modulus and a high elastic recovery.

Abstract: Embodiments relate to a system, computer program product, and method for determining missing values in respective data records with an explanatory analysis to provide a context of the determined values. Such method includes receiving a dataset including incomplete data records that are missing predictors and complete data records. A model is trained with the complete data records and candidate predictors for the missing predictors are generated. A predictor importance value is generated for each candidate predictor and the candidate predictors that have a predictor importance value in excess of a first threshold value are promoted. Respective promoted candidate predictors are inserted into the respective incomplete data records, thereby creating tentative data records. The tentative data records are injected into the model, a fit value is determined for each of the tentative data records, and a tentative data record with a fit value exceeding a second threshold value is selected.

Abstract: The invention provides a method of detecting crystallographic defects, comprising: sampling wafer of an ingot in complying with a predetermined wafer sampling frequency; identifying crystallographic defects of the wafer to show the crystallographic defects of the wafer; characterizing observation of the crystallographic defects of the wafer and extracting a value characterizing the crystallographic defects; through a result of characterizing the crystallographic defects, obtaining a radial distribution of density of the wafer and categorizing the crystallographic defects; and obtaining an isogram of the crystallographic defects of the wafer to show a crystallographic defect distribution of the whole ingot according to the value characterizing the crystallographic defects and categories of the crystallographic defects.

Abstract: The present application provides a method for characterizing defects in silicon crystal comprising the following steps: etching a surface of the silicon crystal to remove a predicted thickness of the silicon crystal; conducting a LLS scanning to a surface of the etched silicon crystal to obtain a LLS map of the surface, a LSE size of defects, and defect bulk density; based on at least one of the LLS map of the surface, the LSE size of defects and the defect bulk density, determining a type of defect existing in the silicon crystal and/or a defect zone of each type of defect on the surface. By applying the method, the characterizing period and the characterizing cost can be reduced, plural defects such as vacancy, oxygen precipitate and dislocation can be characterized simultaneously, the characterizing accuracy can be enhanced, and the defect type and the defect zone can be determined with high reliability.

Abstract: A method of making a silicon on insulator structure comprises: providing a bonded structure, the bonded structure comprises the first substrate, the second substrate and the insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a first film; at a first temperature, performing a first etching to etch the first film to remove a first thickness of the first film; at a second temperature, performing a second etching to etch the first film to planarize the first film and remove a second thickness of the first film, the first temperature being lower than the second temperature, the first thickness being greater than the second thickness, and a sum of the first thickness and the second thickness being a total etching thickness of the first film.

Abstract: A method to transform the function of a programmable circuit (e.g. FPGA) for removing functional bugs or Hardware Trojans is provided.

Abstract: The present disclosure provides a bonding method for a semiconductor substrate, which may improve flatness of a bonded substrate. The present disclosure further provides a bonded semiconductor substrate. The semiconductor substrate is thermally treated prior to bonding, and oxygen precipitates in the semiconductor substrate are partially or totally converted to interstitial oxygen atoms in the thermal treatment.

Abstract: The present invention provides a method of making a silicon on insulator (SOI) structure, comprising steps of: providing a bonded structure, the bonded structure comprises a first substrate, a second substrate and an insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a SOI structure; and processing the SOI structure with isothermal annealing technology at a pressure which is lower than atmospheric pressure.

Abstract: The present invention provides a method of making a silicon on insulator (SOI) structure, comprising steps of: providing a bonded structure, the bonded structure comprises a first substrate, a second substrate and an insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a SOI structure; and processing the SOI structure with isothermal annealing technology at a pressure which is lower than atmospheric pressure.

Abstract: A method of making a silicon on insulator structure comprises: providing a bonded structure, the bonded structure comprises the first substrate, the second substrate and the insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a first film; at a first temperature, performing a first etching to etch the first film to remove a first thickness of the first film; at a second temperature, performing a second etching to etch the first film to planarize the first film and remove a second thickness of the first film, the first temperature being lower than the second temperature, the first thickness being greater than the second thickness, and a sum of the first thickness and the second thickness being a total etching thickness of the first film.

Abstract: Disclosed a heat shield structure for a single crystal production furnace, which is provided above a melt crucible of a single crystal production furnace and comprises an outer housing and a heat insulation plate disposed within the outer housing. A bottom outer surface of the outer housing faces an interior of the melt crucible, and an angle formed between a plane in which the heat insulation plate is located and a plane in which a bottom of the outer housing is located is an acute angle and faces an outer surface of single crystal silicon. The heat shield design is changed, a heat absorbing plate is additionally provided for transferring heat absorbed to the single crystal silicon, a heat channel is formed in the heat shield, so that a pulling rate is controlled, which improves radial mass uniformity of the single crystal silicon.

Abstract: In an approach to improve video searching embodiments execute heuristic video searching based on importance of semantic features. Embodiments perform hierarchical aggregation of a parsed video into one or more clusters of video excerpts based on a plurality of video features, and display a word cloud to a user to guide feedback. Embodiments traverse the one or more clusters based on a data structure of the hierarchical aggregation and the feedback. Additionally, responsive to reaching selected leaf nodes of the data structure, embodiments generate one or more snapshots of the video excerpts associated with the leaf nodes, wherein the leaf nodes are selected based on the feedback. Further, embodiments display the one or more generated snapshots of the video excerpts to the user.

Abstract: Embodiments relate to a system, computer program product, and method for determining missing values in respective data records with an explanatory analysis to provide a context of the determined values. Such method includes receiving a dataset including incomplete data records that are missing predictors and complete data records. A model is trained with the complete data records and candidate predictors for the missing predictors are generated. A predictor importance value is generated for each candidate predictor and the candidate predictors that have a predictor importance value in excess of a first threshold value are promoted. Respective promoted candidate predictors are inserted into the respective incomplete data records, thereby creating tentative data records. The tentative data records are injected into the model, a fit value is determined for each of the tentative data records, and a tentative data record with a fit value exceeding a second threshold value is selected.

Abstract: Embodiments of the present invention relate to a method, system and computer program product for histogram generation. In an embodiment, a first set of bins are acquired for a histogram based on the plurality of data points. In response to receiving a data point, a bin closest to the data point is determined from the first set of bins. In response to a distance between the data point and the bin not exceeding a threshold, the data point is merged into a target bin of the first set of bins, where the width of the target bin after merging the data point is closest to an average width of the first set of bins before the merging. In other embodiments, a system and a computer program product are disclosed.

Abstract: Disclosed a heat shield and a monocrystalline silicon growth furnace using the same. The heat shield is arranged in an upper portion of a melt crucible in the monocrystalline silicon growth furnace, and comprises a shield wall and a shield bottom provided with a window for pulling melt through. The shield bottom comprises a top layer, a bottom layer and a side wall. The side wall is connected between the top and bottom layers and encloses the window. The bottom layer faces towards a liquid level of the melt, and is designed as a serrated structure. With the serrated structure of the bottom layer of the shield bottom, the external thermal energy can be prevented from being absorbed by the monocrystalline silicon crystal, thereby avoiding excessive thermal compensation on a crystal surface, effectively optimizing longitudinal temperature gradient of the crystal, and improving the radial quality uniformity of a silicon wafer.

Abstract: Disclosed is a composite heat insulation structure for a monocrystalline silicon growth furnace, comprising a supporting layer and a laminated structure on the supporting layer. The laminated structure comprises one or more first refractive layers and one or more second refractive layers which have different refractivity and are disposed alternately. Also disclosed is a monocrystalline silicon growth furnace in which the composite heat insulation structure is disposed on a heat shield. When disposed on a heat shield to be applied to the monocrystalline silicon growth furnace, the composite heat insulation structure can improve ability of the heat shield to reflect heat energy, reduce heat dissipation of silicon melt, and play a role of heat insulation on a heat field, thereby improving the quality of the heat field to improve the quality and yield of monocrystalline silicon.