Patents by Inventor Ya Yu

Ya Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190258159
    Abstract: Embodiments of the present disclosure provide a photosensitive composition for forming a color resist, a method for manufacturing a color filter substrate, and a color filter substrate. The photosensitive composition includes at least two color resist precursors, and at least two photoinitiators, each of the at least two photoinitiators being used to initiate polymerization of a corresponding one color resist precursor, of the at least two color resist precursors, to form the color resist.
    Type: Application
    Filed: August 7, 2018
    Publication date: August 22, 2019
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guoqiang ZHONG, Anxin DONG, Rui YIN, Ya YU, Wenhao TANG
  • Patent number: 10361295
    Abstract: A nitride semiconductor epitaxial stack structure including: a Silicon substrate; an aluminum-including nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-including nucleation layer and sequentially including: a first superlattice epitaxial structure, a first GaN based thick layer disposed on the first superlattice epitaxial structure, a second superlattice epitaxial structure disposed on the first GaN based thick layer, and a second GaN based thick layer disposed on the second superlattice epitaxial structure; a channel layer disposed on the buffer structure; a barrier layer disposed on the channel layer; and a two dimensional electron gas layer disposed near an interface between the channel layer and the barrier layer, wherein the total thickness of the first GaN based thick layer and the second GaN based thick layer is more than 2 micrometers.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: July 23, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Shang Ju Tu, Ya Yu Yang, Chia Cheng Liu, Tsung Cheng Chang
  • Publication number: 20190214323
    Abstract: A semiconductor package includes a filler composition, wherein the filler composition includes particles each including both carbon and silica, wherein the filler composition is substantially devoid of alumina or silicon carbide, and the filler composition has a weight ratio of carbon to silica of at least greater than 1.0.
    Type: Application
    Filed: March 14, 2019
    Publication date: July 11, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya-Yu HSIEH, Hong-Ping LIN, Dao-Long CHEN, Ping-Feng YANG, Meng-Kai SHIH
  • Patent number: 10290730
    Abstract: A semiconductor power device includes an engineered aluminum-nitride substrate structure, and method of fabricating the same are described. The engineered substrate structure is effectively integrated with a transition layer of AlN/AlGaN disposed thereon, a buffer layer disposed on the transition layer having a C—(Al)GaN/u-GaN multiple stacking layered structure, a channel layer, a barrier layer, and an optional SiNx interlayer together, to form a GaN-based semiconductor power device. The GaN buffer layer is capable of achieving sufficient thickness for higher performance. The engineered substrate structure has a core region made of an aluminum nitride (AlN) substrate, a single crystal silicon layer as top material layer thereof, and bonded together with an encapsulated multi-layered structure containing adhesive layers, thin film layers and the AlN substrate.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: May 14, 2019
    Assignee: Epistar Corporation
    Inventors: Ya-Yu Yang, Yu-Jiun Shen, Chia-Cheng Liu
  • Publication number: 20190103482
    Abstract: A semiconductor power device includes a substrate, a buffer structure formed on the substrate, a barrier structure formed on the buffer structure, a channel layer formed on the barrier structure, and a barrier layer formed on the channel layer. The barrier structure includes a first functional layer on the buffer structure, a first back-barrier layer on the first functional layer, and an interlayer between the first back-barrier layer and the first functional layer. A material of the first back-barrier layer comprises Alx1Ga1-x1N, a material of the first functional layer comprises Alx2Ga1-x2N, 0<x1?1, 0?x2?1, and x1?x2. The interlayer includes a carbon doped or an iron doped material.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Ya-Yu YANG, Shang-Ju TU, Tsung-Cheng CHANG, Chia-Cheng LIU
  • Patent number: 10204998
    Abstract: A heterostructure device includes a channel layer, a barrier layer disposed on the channel layer, and a first electrode and a second electrode disposed on the barrier layer, respectively. The second electrode includes a p-type semiconductor structure and a raised section disposed on the p-type semiconductor structure, the second electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface of the p-type semiconductor structure and a first bottom surface of the raised section, the ohmic contact is formed between a second bottom surface of the raised section and the barrier layer.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: February 12, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Ya-Yu Yang, Ping-Hao Lin
  • Publication number: 20190006501
    Abstract: A semiconductor device, including: a channel layer formed on a substrate; a top barrier layer formed on the channel layer, wherein a first heterojunction is formed between the channel layer and the top barrier layer so that a first two-dimensional electron gas is generated in the channel layer; a buffer structure formed between the substrate and the channel layer; a back barrier layer formed between the buffer structure and the channel layer, wherein a second heterojunction is formed between the buffer structure and the back barrier layer so that a second two-dimensional electron gas is generated in the buffer structure; and a source electrode, a drain electrode, and a gate electrode formed on the top barrier layer, respectively; wherein a sheet carrier density of the second two-dimensional electron gas is less than 8E+10 cm?2.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 3, 2019
    Inventors: Ya-Yu Yang, Chia-Cheng Lui, Shang-Ju Tu
  • Publication number: 20180292749
    Abstract: A blue color-resist for a liquid crystal display. The blue color-resist contains a blue pigment and a green pigment. A wavelength of a blue light after being transmitted through the blue color-resist is shifted toward infrared region.
    Type: Application
    Filed: May 3, 2017
    Publication date: October 11, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD .
    Inventors: Huifang Yuan, Sang Man Yuk, Tao Zhu, Wenhao Tang, Haibin Yin, Anxin Dong, Guoqiang Zhong, Qun Fang, Jian Chen, Ya Yu, Rui Yin
  • Publication number: 20180275453
    Abstract: The present disclosure relates to a method for manufacturing a color filter substrate, a color substrate and a display panel in the field of display technology. The method includes: forming a color resistance layer on a basal substrate; forming a conversion layer on the basal substrate with the color resistance layer, wherein the thickness of the conversion layer is greater than the thickness of the color resistance layer and the conversion layer is convertible in color under the irradiation of preset light rays; and irradiating the conversion layer with the preset light rays so that the conversion layer is converted to a two-layer structure consisting of a black matrix (BM) pattern and a transparent over cover, wherein the BM pattern is disposed at the side of the conversion layer close to the basal substrate.
    Type: Application
    Filed: December 12, 2017
    Publication date: September 27, 2018
    Inventors: Rui Yin, Sang Man Yuk, Jian MA, Ya Yu, Guoqiang Zhong
  • Publication number: 20180240901
    Abstract: A nitride semiconductor epitaxial stack structure including: a Silicon substrate; an aluminum-including nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-including nucleation layer and sequentially including: a first superlattice epitaxial structure, a first GaN based thick layer disposed on the first superlattice epitaxial structure, a second superlattice epitaxial structure disposed on the first GaN based thick layer, and a second GaN based thick layer disposed on the second superlattice epitaxial structure; a channel layer disposed on the buffer structure; a barrier layer disposed on the channel layer; and a two dimensional electron gas layer disposed near an interface between the channel layer and the barrier layer, wherein the total thickness of the first GaN based thick layer and the second GaN based thick layer is more than 2 micrometers.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 23, 2018
    Inventors: SHANG JU TU, YA YU YANG, CHIA CHENG LIU, TSUNG CHENG CHANG
  • Publication number: 20180116028
    Abstract: An illuminant module includes a first illuminant unit, a second illuminant unit, a first phosphor layer, and a second phosphor layer. The first illuminant unit includes one or more first LED dice and a current regulator electrically connected to the LED dice in series. The second illuminant unit includes one or more second LED dice. The first phosphor layer at least covers the first LED dice, wherein first phosphor layer and the first LED dice collectively provide an emission having a first color temperature. The second phosphor layer at least covers the second LED dice, wherein second phosphor layer and the second LED dice collectively provide an emission having a second color temperature, the current regulator is configured to adjust currents flowing to the first illuminant unit and the second illuminant unit for changing luminous flux of emissions emitted from the first illuminant unit and the second illuminant unit.
    Type: Application
    Filed: June 7, 2017
    Publication date: April 26, 2018
    Inventors: Chen-Lun HSING CHEN, Jung-Hao HUNG, Ya-Yu HUNG, Cheng-Tsan TANG
  • Publication number: 20180003359
    Abstract: A three dimensional (3D) glass structure for decorating a workpiece includes a 3D glass layer, a light emitting layer, and a decorating layer. The 3D glass layer has a front surface and a back surface opposite to each other. The light emitting layer is disposed on the back surface of the 3D glass layer. The decorating layer is disposed between the 3D glass layer and the light emitting layer.
    Type: Application
    Filed: August 25, 2016
    Publication date: January 4, 2018
    Applicant: Jin Ya Dian Technology Co.,Ltd.
    Inventors: Kuo-Liang Ying, Ya-Yu Lai
  • Publication number: 20170305118
    Abstract: A film for decorating a workpiece, a decorated molding article and a method for fabricating the decorated molding article are provided. The film includes a wood veneer layer, an extension layer, an adhesive layer, and a base layer. The wood veneer layer has a first surface and a second surface opposite to each other. The extension layer is disposed on the first surface of the wood veneer layer. The adhesive layer is disposed on the second surface of the wood veneer layer. The base layer is disposed between the wood veneer layer and the adhesive layer. The adhesive layer is disposed between the base layer and the workpiece.
    Type: Application
    Filed: July 22, 2016
    Publication date: October 26, 2017
    Applicant: Jin Ya Dian Technology Co.,Ltd.
    Inventors: Kuo-Liang Ying, Ya-Yu Lai
  • Patent number: 9711683
    Abstract: The present application discloses a semiconductor device comprising a crystalline substrate having a first region and a second region, a nuclei structure on the first region, a first crystalline buffer layer on the nuclei structure, a void between the second region and the first crystalline buffer layer, a second crystalline buffer layer on the first crystalline buffer layer, an intermediate layer located between the first crystalline buffer layer and the second crystalline buffer layer, and a semiconductor device layer on the second crystalline buffer layer.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: July 18, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Heng-Kuang Lin, Ya-Yu Yang
  • Publication number: 20170141007
    Abstract: The present disclosure relates to a filler composition for a semiconductor package. The filler composition comprises carbon and silica.
    Type: Application
    Filed: November 17, 2015
    Publication date: May 18, 2017
    Inventors: Ya-Yu HSIEH, Hong-Ping LIN, Dao-Long CHEN, Ping-Feng YANG, Meng-Kai SHIH
  • Publication number: 20170117376
    Abstract: A heterostructure device includes a channel layer, a barrier layer disposed on the channel layer, and a first electrode and a second electrode disposed on the barrier layer, respectively. The second electrode includes a p-type semiconductor structure and a raised section disposed on the p-type semiconductor structure, the second electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface of the p-type semiconductor structure and a first bottom surface of the raised section, the ohmic contact is formed between a second bottom surface of the raised section and the barrier layer.
    Type: Application
    Filed: January 4, 2017
    Publication date: April 27, 2017
    Inventors: Ya-Yu Yang, Ping-Hao Lin
  • Patent number: 9577048
    Abstract: Heterostructure field-effect transistor (HFET) having a channel layer, a barrier layer disposed on the channel layer, and a gate, source and drain electrodes disposed on the barrier layer, respectively, and corresponding fabrication methods are disclosed. The drain electrode includes a p-type semiconductor patterned structure and a raised drain section, the drain electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface together with a side surface of p-type semiconductor patterned structure and a bottom surface together with a side surface of raised drain section, the ohmic contact is formed between another surface of raised drain section and barrier layer, the raised drain section partially surrounding the p-type semiconductor patterned structure, and a bandgap of the channel layer is less than a bandgap of the barrier layer.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: February 21, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Ya-Yu Yang, Ping-Hao Lin
  • Publication number: 20160275810
    Abstract: An integrated interactively teaching platform system comprising a pre-class interactive data compiling device, a in-class interactive data compiling device, and an after-class interactive data assessing device, wherein the pre-class interactive data compiling device generates an interactive teaching plan and an evaluating test paper object which can be used in class by the in-class interactive data compiling device. The in-class interactive data compiling device performs a teaching service and an evaluation test with an evaluating test paper object, and tracks the evaluating test paper object to obtain an evaluation result. The after-class interactive data assessing device generates an assessing record according to the evaluation result to provide teachers with the current study status of students.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 22, 2016
    Applicant: HONG DING EDUCATIONAL TECHNOLOGY CO., LTD.
    Inventors: Sheng-Chiu Pai, Ya-Yu Tung
  • Publication number: 20160199149
    Abstract: An alignment mark is adapted to be positioned relative to a head of a patient, and includes an alignment unit and a marking unit. The alignment unit includes a pad member and an alignment member. The pad member is adapted to adhere to a scalp of the patient. The alignment member has a threaded section that extends through the pad member and that is adapted to be threadedly locked into a cranium of the patient, and a head section that is opposite to the threaded section and that abuts against the pad member. The marking unit is removably disposed on the alignment unit, and includes a marking member.
    Type: Application
    Filed: December 30, 2015
    Publication date: July 14, 2016
    Inventors: Sheng-Hong Tseng, Ching-Te Chen, Ya-Yu Tsou, Chun-Hwei Tai
  • Publication number: 20160199146
    Abstract: A stereotactic stabilizer is adapted to be mounted to a fixing device and to be mounted with a stereotactic surgical instrument. The stereotactic stabilizer includes base seat and a rod member. The base seat has a main portion and an instrument connecting portion that is provided on the main portion and that is adapted to be mounted with the stereotactic surgical instrument. The rod member extends from the base seat and is adapted to be mounted to the fixing device so as to be positioned relative to a head of a patient.
    Type: Application
    Filed: January 12, 2016
    Publication date: July 14, 2016
    Inventors: Chun-Hwei TAI, Ya-Yu TSOU, Ching-Te CHEN, Sheng-Hong TSENG