Patents by Inventor Yang LIN
Yang LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240085634Abstract: An optical fiber transmission device includes a substrate, a photonic integrated circuit, and an optical fiber assembly. The photonic integrated circuit is disposed on an area of the substrate. The substrate has a protruding structure at an interface with an edge of the photonic integrated circuit. The optical fiber assembly includes an optical fiber and a ferrule that sleeves the optical fiber. The protruding structure of the substrate is configured to abut against the ferrule to limit the position of the optical fiber assembly in a vertical direction of the substrate, such that the protruding structure is a stopper for the optical fiber assembly in the vertical direction.Type: ApplicationFiled: September 14, 2023Publication date: March 14, 2024Applicant: AuthenX Inc.Inventors: Chun-Chiang YEN, Po-Kuan SHEN, Sheng-Fu LIN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
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Patent number: 11923433Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: March 9, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Patent number: 11923409Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.Type: GrantFiled: August 5, 2021Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
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Publication number: 20240068006Abstract: A method for assessing drug-resistant Klebsiella pneumoniae includes the following steps. A test sample is provided, wherein the test sample includes a Klebsiella pneumoniae. A spectrum analysis step is performed, wherein the test sample is detected by a mass spectrometry method so as to obtain a target mass spectrum data. An assessing step for drug-resistant Klebsiella pneumoniae is performed, wherein the target mass spectrum data is analyzed so as to assess whether the Klebsiella pneumoniae is resistant to a carbapenem antibiotic or a colistin or not. When the Klebsiella pneumoniae is resistant to the carbapenem antibiotic, the target mass spectrum data includes a first anti-carbapenem feature mark, and when the Klebsiella pneumoniae is resistant to the colistin, the target mass spectrum data includes a first anti-colistin feature mark.Type: ApplicationFiled: January 16, 2023Publication date: February 29, 2024Applicant: China Medical UniversityInventors: Der-Yang Cho, Po-Ren Hsueh, Jiaxin Yu, Ni Tien, Hsiu Hsien Lin, Chia-Fong Cho
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Publication number: 20240072115Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.Type: ApplicationFiled: February 13, 2023Publication date: February 29, 2024Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
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Publication number: 20240072210Abstract: A micro light emitting diode structure including an epitaxial structure, a first insulating layer and a second insulating layer is provided. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer. The first type semiconductor layer, the light emitting layer and a first portion of the second type semiconductor layer form a mesa. A second portion of the second type semiconductor layer is recessed relative the mesa to form a mesa surface. The first insulating layer covers from a top surface of the mesa to the mesa surface along a first side surface of the mesa, and exposes the second side surface. The second insulating layer directly covers a second side surface of the second portion, wherein a thickness ratio of the first insulating layer to the second insulating layer is between 10 and 50.Type: ApplicationFiled: October 21, 2022Publication date: February 29, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Chee-Yun Low, Yun-Syuan Chou, Hung-Hsuan Wang, Pai-Yang Tsai, Fei-Hong Chen, Tzu-Yang Lin
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Publication number: 20240071031Abstract: An example device is described for facilitating polygon localization. In various aspects, the device can comprise a processor. In various instances, the device can comprise a non-transitory machine-readable memory that can store machine-readable instructions. In various cases, the processor can execute the machine-readable instructions, which can cause the processor to localize a polygon depicted in an image, based on execution of a deep learning pipeline. In various aspects, the deep learning pipeline can comprise a circular-softmax block.Type: ApplicationFiled: August 23, 2022Publication date: February 29, 2024Inventors: Yang Cheng, Qian Lin, Jan Philip Allebach
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Publication number: 20240067691Abstract: The present disclosure provides interferon receptor agonists with improved safety profiles and therapeutic indices. The interferon receptor agonists are attenuated through masking and/or reduced receptor binding as compared to a wild-type interferon. IFN receptor agonists optionally further comprise a targeting moiety, e.g., a targeting moiety that recognizes a tumor- or immune cell-associated antigen and directs the interferon receptor agonist to a tumor site and/or tumor-reactive immune cells. The disclosure further provides pharmaceutical compositions comprising the interferon receptor agonists, and methods of use of the interferon receptor agonists in therapy, as well as nucleic acids encoding the interferon receptor agonists, recombinant cells that express the interferon receptor agonists and methods of producing the interferon receptor agonists.Type: ApplicationFiled: August 17, 2023Publication date: February 29, 2024Applicant: Regeneron Pharmaceuticals, Inc.Inventors: Eva-Maria WEICK, Nicolin BLOCH, Vidur GARG, Erica ULLMAN, Tong ZHANG, Chia-Yang LIN, Jiaxi WU, Eric Smith
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Publication number: 20240071888Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.Type: ApplicationFiled: August 28, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
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Publication number: 20240072669Abstract: A power converter includes a high side switch, a low side switch, a low side driver, a loading detector, a configurable regulator and a high side driver. The low side driver generates a low side drive signal to control the low side switch. The configurable regulator generates a regulation voltage, a magnitude of which is greater when the loading detector detects that the power converter has light loading than when the loading detector detects that the power converter has heavy loading. The high side driver generates a high side drive signal that switches between the input voltage and the regulation voltage to control the high side switch.Type: ApplicationFiled: August 24, 2022Publication date: February 29, 2024Inventors: Yi-Meng LAN, Yung-Chou LIN, Tuo-Kuang CHEN, Chih-Yang KANG
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Patent number: 11916127Abstract: Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.Type: GrantFiled: June 16, 2021Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi Yang Wei, Bi-Shen Lee, Hsin-Yu Lai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang
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Patent number: 11915954Abstract: A die sorter tool may include a first conveyor, and a first lane to receive, from one or more load ports and via the first conveyor, a carrier with a set of dies. The die sorter tool may include a die flip module to receive the carrier from the first lane, manipulate one or more dies of the set of dies by changing orientations of the one or more dies, and return the one or more dies to the carrier after manipulating the one or more dies and without changing positions of the one or more dies within the carrier. The die sorter tool may include a second conveyor, and a second lane to receive, via the second conveyor, the carrier from the die flip module, and provide, via the first conveyor, the carrier to the one or more load ports.Type: GrantFiled: January 30, 2023Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Huang, Cheng-Lung Wu, Zheng-Lin He, Yang-Ann Chu, Jiun-Rong Pai, Hsuan Lee
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Patent number: 11914804Abstract: A touch display device is provided in this disclosure. The touch display device includes a substrate, a first conductive layer, a second conductive layer, a stacked structure, an inorganic light emitting unit, and a touch sensing circuit. The first conductive layer is disposed on the substrate. The first conductive layer includes a gate electrode. The second conductive layer is disposed on the first conductive layer. The second conductive layer includes a source electrode and a drain electrode. The stacked structure is disposed on the substrate. The stacked structure includes a conductive channel and a sensing electrode. The inorganic light emitting unit is disposed on the stacked structure. The inorganic light emitting unit is electrically connected with the drain electrode via the conductive channel. The touch sensing circuit is electrically connected with the sensing electrode.Type: GrantFiled: March 10, 2022Date of Patent: February 27, 2024Assignee: InnoLux CorporationInventors: Po-Yang Chen, Hsing-Yuan Hsu, Tzu-Min Yan, Chun-Hsien Lin, Kuei-Sheng Chang
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Patent number: 11912767Abstract: The present invention provides multispecific antibodies that bind to EGFR and CD28 (EGFR×CD28) as well as anti-EGFR antibodies. Such antibodies may be combined with a further therapeutic agent such as an anti-PD1 antibody. Methods for treating cancers (e.g., EGFR-expressing cancer) by administering the antibodies (e.g., and combinations thereof with anti-PD1) are also provided. The EGFR×CD28 antibodies of the present invention embody a tumor-targeted immunotherapeutic modality combined with PD-1 inhibition. These bispecific antibodies bind a tumor-specific antigen (TSA) (EGFR) with one arm and the co-stimulatory receptor, CD28, on T-cells with the other arm. Combination therapy with PD-1 inhibitors specifically potentiated intra-tumoral T cell activation, promoting an effector memory-like T cell phenotype without systemic cytokine secretion in a variety of syngeneic and human tumor xenograft models.Type: GrantFiled: March 20, 2020Date of Patent: February 27, 2024Assignee: Regeneron Pharmaceuticals, Inc.Inventors: Dimitris Skokos, Andrew J. Murphy, George D. Yancopoulos, Chia-Yang Lin, Lauric Haber
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Patent number: 11916022Abstract: Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.Type: GrantFiled: June 7, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
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Patent number: 11911421Abstract: Disclosed herein is a probiotic composition that includes Lactobacillus salivarius subsp. salicinius AP-32, Lactobacillus johnsonii MH-68, and Bifidobacterium animalis subsp. lactis CP-9, which are deposited at the China Center for Type Culture Collection (CCTCC) respectively under accession numbers CCTCC M 2011127, CCTCC M 2011128, and CCTCC M 2014588. A number ratio of Lactobacillus salivarius subsp. salicinius AP-32, Lactobacillus johnsonii MH-68, and Bifidobacterium animalis subsp. lactis CP-9 ranges from 1:0.1:0.1 to 1:1:8. Also disclosed herein is use of the probiotic composition for alleviating type 1 diabetes mellitus (T1DM).Type: GrantFiled: November 18, 2021Date of Patent: February 27, 2024Assignee: GLAC BIOTECH CO., LTD.Inventors: Hsieh-Hsun Ho, Wen-Yang Lin, Yi-Wei Kuo, Yen-Yu Huang, Jia-Hung Lin
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Patent number: 11913047Abstract: A method for producing ?-aminobutyric acid includes cultivating, in a culture medium containing glutamic acid or a salt thereof, a probiotic composition including at least one lactic acid bacterial strain selected from the group consisting of Bifidobacterium breve CCFM1025 which is deposited at the Guangdong Microbial Culture Collection Center under an accession number GDMCC 60386, Lactobacillus acidophilus TYCA06, Lactobacillus plantarum LPL28, and Bifidobacterium longum subsp. infantis BLI-02 which are deposited at the China General Microbiological Culture Collection Center respectively under accession numbers CGMCC 15210, CGMCC 17954, and CGMCC 15212, Lactobacillus salivarius subsp. salicinius AP-32 which is deposited at the China Center for Type Culture Collection under an accession number CCTCC M 2011127, and combinations thereof.Type: GrantFiled: January 7, 2022Date of Patent: February 27, 2024Assignee: GLAC BIOTECH CO., LTD.Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Chen-Hung Hsu, Wen-Yang Lin, Yi-Wei Kuo, Shin-Yu Tsai
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Publication number: 20240063330Abstract: A micro LED display device includes a display substrate. The display substrate has a first transfer area and a second transfer area adjacent to each other. Both the first transfer area and the second transfer area include a plurality of pixel areas. The pixel area of the first transfer area includes a first micro light-emitting element arranged in a straight line along a first direction. The pixel area of the second transfer area includes a second micro light-emitting element arranged in another straight line along the first direction. In the first direction, the first micro light-emitting element and the second micro light-emitting element are arranged in a staggered manner. A manufacturing method of a micro LED display device is also provided.Type: ApplicationFiled: October 30, 2023Publication date: February 22, 2024Applicant: PlayNitride Display Co., Ltd.Inventors: Yu-Hung Lai, Yun-Li Li, Tzu-Yang Lin
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Publication number: 20240050579Abstract: Disclosed herein are compositions and methods for the treatment of locally advanced or metastatic tumors. According to some embodiments, the compositions and methods involve the use of a hyaluronan-nimesulide conjugate, in combination with pyrimidine-base nucleotide analog.Type: ApplicationFiled: August 4, 2023Publication date: February 15, 2024Applicant: Aihol CorporationInventor: Hua-Yang LIN
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Patent number: 11901479Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first microelectronic elements on a first temporary substrate; and replacing at least one defective microelectronic element of the first microelectronic elements with at least one second microelectronic element. The first microelectronic elements and at least one second microelectronic element are distributed on the first temporary substrate. The first microelectronic elements and at least one second microelectronic element have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first microelectronic elements and at least one second microelectronic element. A semiconductor structure and a display panel are also provided.Type: GrantFiled: May 19, 2021Date of Patent: February 13, 2024Assignee: PlayNitride Display Co., Ltd.Inventors: Bo-Wei Wu, Yu-Yun Lo, Chien-Chen Kuo, Chang-Feng Tsai, Tzu-Yang Lin