Patents by Inventor Yang Wei

Yang Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240063299
    Abstract: The present application provides an inverter. The inverter includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form air gaps, and the air gaps are distributed at both sides of the bottom electrode. The gate electrode is configured to connect with a signal input terminal, the bottom electrode is configured to connect with a signal output terminal.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 22, 2024
    Inventors: GUANG-QI ZHANG, YANG WEI, SHOU-SHAN FAN
  • Publication number: 20240047565
    Abstract: A field effect transistor includes a gate electrode, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer is located on the surface of the gate electrode, and the channel layer is located on the surface of the insulating layer away from the gate electrode. The source electrode and the drain electrode are spaced apart from each on the surface of the channel layer away from the insulating layer. The source electrode and the drain electrode are one-dimensional structures. The present application further provides a method for making the field effect transistor.
    Type: Application
    Filed: March 30, 2023
    Publication date: February 8, 2024
    Applicants: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: XUAN-ZHANG LI, YANG WEI, SHOU-SHAN FAN, YUE-GANG ZHANG
  • Publication number: 20240033077
    Abstract: A prosthetic heart valve is constructed from a flexible substrate that can be folded from an unfolded configuration to a folded configuration, in which the prosthesis is operable as a prosthetic heart valve. The prosthetic heart valves can be designed as atrioventricular valves (e.g., tricuspid valve, mitral valve) or as semilunar valves (e.g., aortic valve, pulmonary valve).
    Type: Application
    Filed: October 1, 2021
    Publication date: February 1, 2024
    Inventors: Brandon James Tefft, Yang Wei William Yuan
  • Publication number: 20240036100
    Abstract: A field effect transistor includes a gate electrode, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer is located on the surface of the gate electrode, and the channel layer is located on the surface of the insulating layer away from the gate electrode. The source electrode and the drain electrode are spaced apart from each on the surface of the channel layer away from the insulating layer. The source electrode and the drain electrode are one-dimensional structures. The present application further provides a method for making the field effect transistor and a method for measuring an interface resistance of the field effect transistor.
    Type: Application
    Filed: March 30, 2023
    Publication date: February 1, 2024
    Inventors: XUAN-ZHANG LI, YANG WEI, SHOU-SHAN FAN, YUE-GANG ZHANG
  • Publication number: 20240023807
    Abstract: An optical biometer including a light source, a first-stage coupler, a first and a second second-stage coupler, a first and a second optical path difference generator, a first and a second optical component set, a first and a second detection device is disclosed. The first-stage coupler receives an incident light from the light source and emits first and second first-stage lights. The first second-stage coupler receives the first first-stage light and emits first and second second-stage lights. The second second-stage coupler receives the second first-stage light and emits third and fourth second-stage lights. The first/second optical path difference generator generates the first/fourth second-stage light with the first/second optical path difference. The first/second optical component set emits the second/third second-stage light to a first/second position of an eye and receives a first/second reflected light. The first/second detector receives a first/second detection light.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 25, 2024
    Inventors: Che-Liang TSAI, William WANG, Chung-Ping CHUANG, Sung-Yang WEI, Hsuan-Hao CHAO, Chung-Cheng CHOU
  • Publication number: 20240024428
    Abstract: The present invention provides modified glucagon-like peptide 1 (GLP1) polypeptides, fusion proteins comprising modified GLP1 polypeptides, and methods of use thereof. In various embodiments of the invention, the fusion proteins are GLP1 receptor agonists that comprise a modified GLP1 fused to a stabilizing domain. In some embodiments, the fusion proteins comprising modified GLP1 are useful for treating or ameliorating a symptom or indication of a disorder such as obesity and diabetes.
    Type: Application
    Filed: August 29, 2023
    Publication date: January 25, 2024
    Inventors: Yang Wei, Haruka Okamoto, Jesper Gromada, Samuel Davis, Andrew J. Murphy
  • Publication number: 20240021700
    Abstract: Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.
    Type: Application
    Filed: August 8, 2023
    Publication date: January 18, 2024
    Inventors: Yi Yang Wei, Bi-Shen Lee, Hsin-Yu Lai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang
  • Publication number: 20240023344
    Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a lower electrode structure disposed over one or more interconnects. The one or more interconnects are arranged within a lower inter-level dielectric (ILD) structure over a substrate. A barrier is arranged along a lower surface of the lower electrode structure. The barrier separates the lower electrode structure from the one or more interconnects. An amorphous initiation layer is over the lower electrode layer and a ferroelectric material is on the amorphous initiation layer. The ferroelectric material has a substantially uniform orthorhombic crystalline phase. An upper electrode is over the ferroelectric material.
    Type: Application
    Filed: July 26, 2023
    Publication date: January 18, 2024
    Inventors: Bi-Shen Lee, Yi Yang Wei, Hai-Dang Trinh, Hsun-Chung Kuang, Cheng-Yuan Tsai
  • Patent number: 11844226
    Abstract: A method includes forming a bottom electrode layer, and depositing a first ferroelectric layer over the bottom electrode layer. The first ferroelectric layer is amorphous. A second ferroelectric layer is deposited over the first ferroelectric layer, and the second ferroelectric layer has a polycrystalline structure. The method further includes depositing a third ferroelectric layer over the second ferroelectric layer, with the third ferroelectric layer being amorphous, depositing a top electrode layer over the third ferroelectric layer, and patterning the top electrode layer, the third ferroelectric layer, the second ferroelectric layer, the first ferroelectric layer, and the bottom electrode layer to form a Ferroelectric Random Access Memory cell.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: December 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bi-Shen Lee, Yi Yang Wei, Hsing-Lien Lin, Hsun-Chung Kuang, Cheng-Yuan Tsai, Hai-Dang Trinh
  • Publication number: 20230387190
    Abstract: A multilayer structure, a capacitor structure and an electronic device are provided. The multilayer structure includes a first dielectric layer, a second dielectric layer and an intermediate dielectric layer. The intermediate dielectric layer is disposed between the first dielectric layer and the second dielectric layer. A material of the intermediate dielectric layer is represented by a formula of AxB1?xO, wherein A includes hafnium (Hf), zirconium (Zr), lanthanum (La) or tantalum (Ta), B includes lanthanum (La), aluminum (Al) or tantalum (Ta), A is different from B, O is oxygen, and x is a number less than 1 and greater than 0.
    Type: Application
    Filed: May 30, 2022
    Publication date: November 30, 2023
    Inventors: HAI-DANG TRINH, YI YANG WEI, FA-SHEN JIANG, BI-SHEN LEE, HSUN-CHUNG KUANG
  • Patent number: 11811337
    Abstract: A nanofiber actuator comprises a composite structure and a vanadium dioxide layer. The composite structure comprises a carbon nanotube wire and an aluminum oxide layer. The aluminum oxide layer is coated on a surface of the carbon nanotube wire, and the aluminum oxide layer and the carbon nanotube wire are located coaxially with each other. The vanadium dioxide layer is coated on a surface of the composite structure, and the vanadium dioxide layer and the composite structure are located non-coaxially with each other.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: November 7, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Guang Wang, He Ma, Xiang Jin, Hua Yuan, Yang Wei, Qun-Qing Li, Kai-Li Jiang, Shou-Shan Fan
  • Publication number: 20230354613
    Abstract: In some embodiments, the present disclosure relates to a memory device including a semiconductor substrate, a first electrode disposed over the semiconductor substrate, a ferroelectric layer disposed between the first electrode and the semiconductor substrate, and a first stressor layer separating the first electrode from the ferroelectric layer. The first stressor layer has a coefficient of thermal expansion greater than that of the ferroelectric layer.
    Type: Application
    Filed: June 26, 2023
    Publication date: November 2, 2023
    Inventors: Bi-Shen Lee, Tzu-Yu Lin, Yi-Yang Wei, Hai-Dang Trinh, Hsun-Chung Kuang, Cheng-Yuan Tsai
  • Patent number: 11779633
    Abstract: The present invention provides modified glucagon-like peptide 1 (GLP1) polypeptides, fusion proteins comprising modified GLP1 polypeptides, and methods of use thereof. In various embodiments of the invention, the fusion proteins are GLP1 receptor agonists that comprise a modified GLP1 fused to a stabilizing domain. In some embodiments, the fusion proteins comprising modified GLP1 are useful for treating or ameliorating a symptom or indication of a disorder such as obesity and diabetes.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: October 10, 2023
    Assignee: Regeneron Pharmaceuticals, Inc.
    Inventors: Yang Wei, Haruka Okamoto, Jesper Gromada, Samuel Davis, Andrew J. Murphy
  • Publication number: 20230320103
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes one or more interconnect dielectric layers arranged over a substrate. A bottom electrode is disposed over a conductive structure and extends through the one or more interconnect dielectric layers. A top electrode is disposed over the bottom electrode. A ferroelectric layer is disposed between and contacts the bottom electrode and the top electrode. The ferroelectric layer includes a first lower horizontal portion, a first upper horizontal portion arranged above the first lower horizontal portion, and a first sidewall portion coupling the first lower horizontal portion to the first upper horizontal portion.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 5, 2023
    Inventors: Hai-Dang Trinh, Yi Yang Wei, Bi-Shen Lee, Fa-Shen Jiang, Hsun-Chung Kuang, Cheng-Yuan Tsai
  • Publication number: 20230301509
    Abstract: An optical detection device and an operation method thereof is disclosed. The optical detection device includes a light source, an optical coupling element, a reference optical path modulation element and a data processing element. The light source provides an incident light. The optical coupling element divides the incident light into a reference light and a detection light and emits them to the reference optical path modulation element and the sample to be tested respectively. The reference optical path modulation element reflects the reference light and rapidly changes the light path of reference light. The optical coupling element interferes the reference light reflected by the reference optical path modulation element and the detection light reflected by the sample to be tested to generate an optical interference signal. The data processing element receives and analyzes the optical interference signal to obtain an optical detection result about the sample to be tested.
    Type: Application
    Filed: January 20, 2023
    Publication date: September 28, 2023
    Inventors: Hsuan-Hao CHAO, Sung-Yang WEI, William WANG, Chung-Cheng CHOU
  • Patent number: 11758797
    Abstract: A method of n-type doping a carbon nanotube includes the following steps: providing a single carbon nanotube; providing a film-like structure, wherein the film-like structure is a molybdenum disulfide film or a tungsten disulfide film; and converting at least one portion of the carbon nanotube from a p-type to an n-type by covering the carbon nanotube with the film-like structure.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: September 12, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Gao-Tian Lu, Yang Wei, Shou-Shan Fan, Yue-Gang Zhang
  • Patent number: 11737280
    Abstract: In some embodiments, the present disclosure relates to a memory device including a semiconductor substrate, a first electrode disposed over the semiconductor substrate, a ferroelectric layer disposed between the first electrode and the semiconductor substrate, and a first stressor layer separating the first electrode from the ferroelectric layer. The first stressor layer has a coefficient of thermal expansion greater than that of the ferroelectric layer.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: August 22, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bi-Shen Lee, Tzu-Yu Lin, Yi-Yang Wei, Hai-Dang Trinh, Hsun-Chung Kuang, Cheng-Yuan Tsai
  • Patent number: 11723212
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes one or more interconnect dielectric layers arranged over a substrate. A bottom electrode is disposed over a conductive structure and extends through the one or more interconnect dielectric layers. A top electrode is disposed over the bottom electrode. A ferroelectric layer is disposed between and contacts the bottom electrode and the top electrode. The ferroelectric layer includes a first lower horizontal portion, a first upper horizontal portion arranged above the first lower horizontal portion, and a first sidewall portion and coupling the first lower horizontal portion to the first upper horizontal portion.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hai-Dang Trinh, Yi Yang Wei, Bi-Shen Lee, Fa-Shen Jiang, Hsun-Chung Kuang, Cheng-Yuan Tsai
  • Patent number: 11712696
    Abstract: A drug screening platform simulating hyperthermic intraperitoneal chemotherapy including a dielectrophoresis system, a microfluidic chip and a heating system is disclosed. The dielectrophoresis system is used to provide a dielectrophoresis force. The microfluidic chip includes a cell culture array and observation module and a drug mixing module. The cell culture array and observation module are used to arrange the cells into a three-dimensional structure through the dielectrophoresis force to construct a three-dimensional tumor microenvironment. The drug mixing module is coupled to the cell culture array and observation module and used to automatically split and mix the inputted drugs and output the drug combinations into the cell culture array and observation module.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: August 1, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Te-Yu Chao, Yu-Ching Tung, Mao-Chih Hsieh, Yu-Ting Tai, Bing-Ying Ho, Wei-Chia Chang, Sung-Yang Wei, Chang-Hung Hsieh, Chung-Cheng Chou, Jen-Tsan Chi, Long Hsu, Hwan-You Chang, Huang-Ming Philip Chen, Cheng-Hsien Liu
  • Patent number: 11690277
    Abstract: A method of p-type doping a carbon nanotube includes the following steps: providing a single carbon nanotube; providing a layered structure, wherein the layered structure is a tungsten diselenide film or a black phosphorus film; and p-type doping at least one portion of the carbon nanotube by covering the carbon nanotube with the layered structure.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: June 27, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Gao-Tian Lu, Yang Wei, Shou-Shan Fan, Yue-Gang Zhang