Patents by Inventor Yang Yu

Yang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250020804
    Abstract: A method comprises generating, via a pulse generator, a first pressure pulse in a fluid in a pipe and detecting, via a transducer, a first reflected pressure pulse based on the first pressure pulse, wherein the first pressure pulse is reflected by a pipe feature to generate the first reflected pressure pulse. The method comprises generating, with the pulse generator, a second pressure pulse at a later time relative to generating the first pressure pulse, wherein timing of generating of the second pressure pulse is such that the second pressure pulse is superposed with the first reflected pressure pulse such that an amplitude of the second pressure pulse is greater than an amplitude of the first pressure pulse. The method comprises detecting, via the transducer, a second reflected pressure pulse based on the second pressure pulse, and detecting a pipe feature based on the second reflected pressure pulse.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 16, 2025
    Inventors: Zhijie Sun, Yang Yu, David Bennett, Robert P. Darbe
  • Publication number: 20250021287
    Abstract: This application relates to the field of operating systems, and relates to an electronic device and an application display method and a medium thereof. The application display method includes: A first system and a second system are run on the electronic device. The second system receives, from the first system, display data of a plurality of application windows and data identifiers of all the display data. The second system sends, based on window identifiers of the application windows corresponding to all the display data, all the display data to rendering tasks of the application windows corresponding to all the display data for rendering respectively, to obtain rendered images of all the display data. The second system displays, on a screen of the electronic device, the rendered images of all the display data on the application windows respectively corresponding to all the display data.
    Type: Application
    Filed: September 27, 2024
    Publication date: January 16, 2025
    Inventors: Yang Yu, Xiong Zhang
  • Publication number: 20250021703
    Abstract: Encrypting keystroke data in a multi-session-enabled computing device includes receiving a first control message requesting enabling of keystroke encryption for a protected application executing in a first desktop session. The first control message includes application identification information of the protected application. Keystroke encryption is enabled for keystrokes targeting the first desktop session based on receipt of the first control message. Keystroke data sent to the protected application is encrypted while the protected application maintains keyboard focus in the first desktop session. Unencrypted keystroke data is transmitted to another application of a second desktop session while keystroke encryption is enabled for the protected application in the first desktop session.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 16, 2025
    Inventors: Xiaoyu KONG, YiQun YUN, ZhangLin ZHOU, Yang YU
  • Patent number: 12198216
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for constructing a virtual environment for a ride-hailing platform are disclosed.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: January 14, 2025
    Assignee: Beijing DiDi Infinity Technology and Development Co., Ltd.
    Inventors: Wenjie Shang, Qingyang Li, Zhiwei Qin, Jieping Ye, Yang Yu, Yiping Meng
  • Patent number: 12189132
    Abstract: A wearable device includes a main structure, two straps, a connecting piece and a driving structure. The two straps are respectively connected to two ends of the main structure; the connecting piece is provided with a mounting cavity, a slide cavity in communication with the mounting cavity, and two communicating ports, each of the two straps having one end thereof distal to the main structure movably passing through one of the communicating ports to extend into the slide cavity, and the main structure, the two straps and the connecting piece enclosing a wearable space: the driving assembly is provided in the mounting cavity, the two transmission parts being provided spaced apart in the slide cavity and in transmission connection with the driving assembly, each of the two transmission parts being in respective transmission connection with the two straps.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: January 7, 2025
    Assignee: Goertek Technology Co., Ltd.
    Inventors: Feng Zhang, Yang Wang, Haijun Yin, Yang Yu
  • Patent number: 12190800
    Abstract: A display controller, a display device, a display system, and a control method are provided. The display controller includes: a flag-signal circuit configured to send a flag-signal to an application processor; an image processing circuit configured to obtain second current image data in response to receiving first current image data from the application processor, wherein the first current image data is sent by the application processor in response to receiving the flag-signal sent from the flag-signal circuit; and a drive circuit configured to generate a first drive control signal in response to receiving the second current image data from the image processing circuit.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: January 7, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Baoyun Wu, Yang Yu, Yuanzhang Zhu, Xuesong Tian, Xinbin Han, Shiming Shi, Hui Zhao, Hualing Yang
  • Patent number: 12181748
    Abstract: A display apparatus includes a display panel having a first display region, a second display region and an opening region. When the display apparatus is in a black state, the first display region has a first luminance value I1, the second display region and the opening region have a first luminance difference value DI1, the first display region and the second display region have a second luminance difference value DI2, and each of a ratio of DI1 to I1 and a ratio of DI2 to I1 ranges from 0.001 to 0.1.
    Type: Grant
    Filed: August 30, 2023
    Date of Patent: December 31, 2024
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Teng Wu, Jiawen Jiang, Qiang He, Yang Yu
  • Patent number: 12176545
    Abstract: This application provides a positive electrode plate, including a positive current collector, a positive active material layer on at least one side of the positive current collector, and a safety layer between the positive active material layer and the positive current collector. The positive active material layer includes a positive active material. The safety layer includes a binding material, a conductive material, and an overcharge-sensitive material. The overcharge-sensitive material is a polymer that includes a monosaccharide structural unit and that includes at least one of a carbonate group and a phosphate group. An average diameter x of the conductive material and a weight-average molecular weight y of the overcharge-sensitive material satisfy Formula 1.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: December 24, 2024
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITED
    Inventor: Yang Yu
  • Patent number: 12171835
    Abstract: The present disclosure relates to the technical field of medicine, in particular to a furan-aspidospermine dimer or a pharmaceutically acceptable salt thereof, and a preparation method, use and a pharmaceutical composition. In the present disclosure, the furan-aspidospermine dimer or a pharmaceutically acceptable salt thereof can activate an immune response by increasing a proportion of T lymphocytes and enhance a function of the immune response.
    Type: Grant
    Filed: March 12, 2022
    Date of Patent: December 24, 2024
    Assignees: Kunming Institute of Botany, Chinese Academy of Sciences
    Inventors: Xianghai Cai, Guisheng Zhong, Simeng Zhao, Meifen Bao, Yang Yu
  • Publication number: 20240418700
    Abstract: A sand column grouting filtration experimental device includes a sand column, a grout injection structure connected above the sand column and a grout exit structure connected below the sand column, the sand column comprises a plurality of connecting units; Four screws are provided around the sand column, and the four screws run through the grout injection structure and grout exit structure; A bottom plate is provided below the grout exit structure, a support plate one and a support plate two are provided between the bottom plate and the grout exit structure, and a sand column consolidation structure is provided between the support plate two and the support plate one. The experiment adopts a segmented combined sand column, in addition to ensuring the experimental results that can be obtained by the general sand column, segmented study of the interception and percolation effect of cement slurry in the sand column is implemented.
    Type: Application
    Filed: September 11, 2023
    Publication date: December 19, 2024
    Applicant: Shandong University
    Inventors: Dongming WANG, Feng ZHANG, Lei GAO, Yang YU
  • Publication number: 20240414944
    Abstract: A display substrate is provided, including: a base substrate, and a first semiconductor layer, a first conductive layer, a second semiconductor layer and a fourth conductive layer sequentially arranged on the base substrate. The display substrate includes first and third transistors. The first transistor includes a first active layer in the second semiconductor layer, and first bottom and top gate electrodes respectively on opposite sides of the first active layer. The third transistor includes a third active layer in the first semiconductor layer and a third gate electrode, the third active layer containing a polysilicon semiconductor material. The fourth conductive layer is on a side of the first top gate electrode away from the base substrate, and includes second and third conductive components. The first transistor is electrically connected to the third gate electrode of the third transistor through the second and third conductive components.
    Type: Application
    Filed: August 20, 2024
    Publication date: December 12, 2024
    Inventors: Bingqiang Gui, Yang Yu, Peng Huang, Tao Gao, Wenqiang Li, Ke Liu
  • Publication number: 20240408701
    Abstract: The present disclosure provides a welding-pad repair device and a welding-pad repair method. The device includes: a de-soldering component, an insulating layer removal component and a cleaning component; a welding-pad coating mechanism for forming an initial welding pad, where the welding-pad coating mechanism includes a coating component and a curing component; and a welding-pad encapsulation mechanism for performing an encapsulation operation on a welding pad and a circuit exposed at a periphery of the initial welding pad to form a new welding pad having a predetermined exposure pattern. Embodiments of the present disclosure provide a welding-pad repair device and a welding-pad repair method capable of effectively repairing defective pads before and after dies are bonded, thereby solving problems of low product yield and high cost caused by defective welding pads.
    Type: Application
    Filed: July 24, 2023
    Publication date: December 12, 2024
    Applicants: BOE MLED TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Wei Zhang, Pengju Hu, Yang Yu, Junchao Lu
  • Patent number: 12165946
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: December 10, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: 12162188
    Abstract: A resin matrix composite used as anti-ablation coating material and its preparation method is provided. The resin matrix composite is a mixture of yttria-stabilized zirconia (YSZ), a resin, Cu, and SiO2. The mixture is uniform and include spherical particles or spherical aggregates. A method for preparing a resin matrix composite for anti-ablation coating includes mixing YSZ, a resin, Cu, and SiO2 to obtain a mixed powder and performing spray granulation of the mixed powder to obtain a resin matrix composite including spherical particles or spherical agglomerates.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: December 10, 2024
    Assignee: AECC BEIJING INSTITUTE OF AERONAUTICAL MATERIALS
    Inventors: Haoliang Tian, Jie Pang, Changliang Wang, Mengqiu Guo, Huanhuan Zhang, Junguo Gao, Yang Yu, Zhihui Tang, Yongjing Cui
  • Publication number: 20240402537
    Abstract: A display apparatus includes a display panel having a first display region, a second display region and an opening region. When the display apparatus is in a black state, the first display region has a first luminance value I1, the second display region and the opening region have a first luminance difference value DI1, the first display region and the second display region have a second luminance difference value DI2, and each of a ratio of DI1 to I1 and a ratio of DI2 to I1 ranges from 0.001 to 0.1.
    Type: Application
    Filed: August 30, 2023
    Publication date: December 5, 2024
    Inventors: Teng WU, Jiawen JIANG, Qiang HE, Yang YU
  • Publication number: 20240401153
    Abstract: Disclosed in the present invention is a non-invasive detection method for screening for a well-developed blastocyst. A DNA methylation profile of a few of trophectoderm cells in a blastocyst is detected, and the average methylation level and the methylation pattern of embryos identified as having a good morphology in Gardner morphological blastocyst grading process are used as the standard for screening for well-developed blastocysts. The nearer the methylation level of the trophectoderm cells of the blastocyst to be tested approaches the methylation level or state of the good embryo, the better the embryo development is and the higher the suitability for being implanted into a maternal subject is. Furthermore, results of methylation sequencing may be analyzed to determine whether a chromosome is abnormal, so as to directly exclude chromosome-abnormal embryos.
    Type: Application
    Filed: July 25, 2024
    Publication date: December 5, 2024
    Inventors: Jiang Liu, Jie Qiao, Guoqiang Li, Yang Yu, Yong Fan, Congru Li
  • Publication number: 20240387457
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, a second encapsulant, and a conductive terminal. The first die includes a first connector, and the second die includes a second connector. The first encapsulant includes: a first portion, on the second die; a second portion, sandwiched between a first sidewall of the first die and a first sidewall of the second die; and a third portion, covering a second sidewall of the second die. The second encapsulant, laterally encapsulating the first die, the second die and the first encapsulant. The conductive terminal, electrically connected to the first die and the second die through a redistribution layer (RDL) structure. The third portion of first encapsulant is sandwiched between the second sidewall of the second die and the second encapsulant.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Chien-Hsun Lee, Kuan-Lin Ho, Yu-Min Liang
  • Publication number: 20240387440
    Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a redistribution layer, a semiconductor die, conducting connectors, dummy bumps and an underfill. The semiconductor die is disposed on a top surface of the redistribution layer and electrically connected with the redistribution layer. The conducting connectors are disposed between the semiconductor die and the redistribution layer, and are physically and electrically connected with the semiconductor die and the redistribution layer. The dummy bumps are disposed on the top surface of the redistribution layer, beside the conducting connectors and under the semiconductor die. The underfill is disposed between the semiconductor die and the redistribution layer and sandwiched between the dummy bumps and the semiconductor die. The dummy bumps are electrically floating. The dummy bumps are in contact with the underfill without contacting the semiconductor die.
    Type: Application
    Filed: July 28, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Nien-Fang Wu, Hai-Ming Chen, Yu-Min Liang, Jiun-Yi Wu
  • Publication number: 20240389021
    Abstract: Embodiments disclosed herein relate to reducing power consumption of an electronic device scanning for wireless communication signals while maintaining or even improving an efficiency of the scanning operations. To do so, the electronic device may include more than one scan core, such as a main core and a receiving core. The receiving core may have limited functionality compared to the main core. For example, the receiving core may only receive wireless signals (including scanning for wireless signals). That is, the receiving core may not support certain operations that consume relative high power that are supported by the main core, such as transmission of signals. In this way, operation of the receiving core, either in place of or in addition to the main core, may reduce power consumption of the electronic device by avoiding high power consuming operations, such as data transmission, while scanning for various signals.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 21, 2024
    Inventors: Sriram Lakshmanan, Tushar Ramanlal Shah, Udaykumar R. Raval, Bernd Willi Adler, Dongwoon Hahn, Shehla S. Rana, Yang Yu, Rajneesh Kumar, Veerendra Boodannavar, Yann Ly-Gagnon, Duy N. Phan, Karan Sawhney, Rohit Sharma, Sarin S. Mehta
  • Publication number: 20240387622
    Abstract: Semiconductor structure and method of forming the same are provided. The structure includes a substrate. The substrate includes a first region and a second region arranged along a first direction. The first region includes a first isolation area. The second region includes a second isolation area. A central axis of the first isolation area parallel to the first direction does not coincide with a central axis of the second isolation area parallel to the first direction. The structure also includes a first gate structure on the first region, a first metal layer and a second metal layer on two sides of the first gate structure, a second gate structure on the second region, a third metal layer and a fourth metal layer on two sides of the second gate structure, a first isolation structure on the first isolation area, and a second isolation structure on the second isolation area.
    Type: Application
    Filed: August 25, 2021
    Publication date: November 21, 2024
    Inventors: Kuchanuri SUBHASH, Jun WANG, Yang YU