Patents by Inventor Yao Huang

Yao Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240130102
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate including an array area and a peripheral area; and a peripheral gate structure including: a peripheral gate dielectric layer inwardly positioned in the peripheral area of the substrate and including a U-shaped cross-sectional profile; a peripheral gate conductor including a bottom portion positioned on the peripheral gate dielectric layer and a neck portion positioned on the bottom portion; and a peripheral gate capping layer positioned on the peripheral gate dielectric layer and the bottom portion, and surrounding the neck portion. A top surface of the peripheral gate capping layer and a top surface of the neck portion are substantially coplanar.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 18, 2024
    Inventor: TSE-YAO HUANG
  • Publication number: 20240127759
    Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, including a pixel array region and a peripheral region; and a first scan driving circuit, a plurality of power lines, a first signal line group, and a second signal line group, which are in the peripheral region and located on a first side of the base substrate. The first scan driving circuit includes a plurality of cascaded first shift registers; the plurality of power lines are configured to provide a plurality of power voltages to the plurality of cascaded first shift registers in the first scan driving circuit; the first signal line group includes at least one timing signal line; and the second signal line group is on a side of the plurality of power lines and the first signal line group away from the pixel array region.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao ZENG, Weiyun HUANG, Yue LONG, Yao HUANG, Meng LI
  • Publication number: 20240123097
    Abstract: A pharmaceutical composition for Positron Emission Tomography (PET) and Boron Neutron Capture Therapy (BNCT) and the use for treating cancer thereof are provided, wherein the pharmaceutical composition comprises a compound having structure of formula I, wherein R1 is a specific peptide, one of R2, R3, and R4 is Fluorine-18 (18F) or Fluorine-19 (19F), one of the other two position is —B(OH)2, and the remaining position is hydrogen (H); a method for preparing a compound having structure of formula I is also provided in the present invention.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 18, 2024
    Applicant: Primo Biotechnology Co., Ltd
    Inventor: Ya-Yao Huang
  • Publication number: 20240128148
    Abstract: A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 18, 2024
    Inventors: Chang-Jung Hsueh, Po-Yao Lin, Hui-Min Huang, Ming-Da Cheng, Kathy Yan
  • Publication number: 20240130103
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate including an array area and a peripheral area; and a peripheral gate structure including: a peripheral gate dielectric layer inwardly positioned in the peripheral area of the substrate and including a U-shaped cross-sectional profile; a peripheral gate conductor including a bottom portion positioned on the peripheral gate dielectric layer and a neck portion positioned on the bottom portion; and a peripheral gate capping layer positioned on the peripheral gate dielectric layer and the bottom portion, and surrounding the neck portion. A top surface of the peripheral gate capping layer and a top surface of the neck portion are substantially coplanar.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 18, 2024
    Inventor: TSE-YAO HUANG
  • Patent number: 11963409
    Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes: a sub-pixel, in a display region and including a light-emitting element, the light-emitting element including a first electrode, a light-emitting layer and a second electrode; a positive power line, connected to the first electrode; a positive power bus, connected to the positive power line; three positive power access ends, at a side of the positive power bus away from a display region, and respectively connected to the positive power bus; a negative power line; an auxiliary electrode, respectively connected to the negative power line and the second electrode; three negative power access ends, at the side of the positive power bus away from the display region, and respectively connected to the negative power line; and a negative power auxiliary line, respectively connected to the negative power access end and the auxiliary electrode.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: April 16, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yao Huang, Weiyun Huang, Yue Long, Chao Zeng, Meng Li
  • Publication number: 20240120313
    Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
  • Publication number: 20240112639
    Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, a gate driving circuit, power lines, a first signal line group, and a second signal line group. The gate driving circuit includes cascaded shift register units; the power lines are configured to provide power signals to the shift register units; the first signal line group includes at least one clock signal line, and the clock signal line is configured to provide a clock signal to the shift register units; the second signal line group includes a trigger signal line, and the trigger signal line is configured to provide a trigger signal to a first-stage shift register unit; and the gate driving circuit includes at least one transistor, and an extending direction of a channel of the transistor is parallel to an extending direction of the clock signal line.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao ZENG, Weiyun HUANG, Yue LONG, Yao HUANG, Meng LI
  • Publication number: 20240114731
    Abstract: A display panel and a display device, the display panel comprising: a first display region; a second display region, at least partially positioned on one side of the first display region; a plurality of pixel units, the density of pixel units in the first display region being less than the density of pixel units in the second display region, and the pixel units comprising pixel circuits; and first power supply lines, configured to supply a first voltage signal to the pixel circuits. The first power supply lines comprise a plurality of first wires, a plurality of second wires, and a plurality of third wires, the first wires extending from the second display region to the first display region, the plurality of second wires being positioned in the first display region, positioned between adjacent first wires, and extending in a first direction, and the third wires extending along a second direction, the first direction intersecting with the second direction.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: Yao HUANG, Weiyun Huang, Yue Long, Binyan Wang, Guobo Yang, Benlian Wang
  • Publication number: 20240113196
    Abstract: The present application discloses a contact structure, a semiconductor device, and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; an impurity region positioned in the substrate; an intervening conductive layer positioned on the impurity region; a bottom conductive layer positioned on the bottom conductive layer; a conductive capping layer positioned on the bottom conductive layer; a top conductive layer positioned on the conductive capping layer. The intervening conductive layer, the bottom conductive layer, the conductive capping layer, and the top conductive layer configure a contact structure. The bottom conductive layer includes germanium or silicon germanium. The bottom conductive layer includes n-type dopants or p-type dopants.
    Type: Application
    Filed: September 26, 2022
    Publication date: April 4, 2024
    Inventor: TSE-YAO HUANG
  • Patent number: 11950461
    Abstract: Provided is a display substrate including a base substrate, a plurality of pixel units, at least one first power line, a barrier structure, an adapting structure, a cathode layer and a first organic pattern. By covering at least part of the second side face of the adapting structure with the first organic pattern, the risk of the second side face of the adapting structure being eroded by moisture or oxygen due to the etching defects can be reduced.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: April 2, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yue Long, Weiyun Huang, Chao Zeng, Yao Huang, Meng Li
  • Patent number: 11948512
    Abstract: A display substrate and a display device are provided. Sub-pixels in the display substrate include a first electrode, a light emitting layer and a second electrode which are sequentially stacked; each second electrode includes a main body electrode and a connecting electrode. The sub-pixels include first color sub-pixels and second color sub-pixels, the main body electrode of a same first color sub-pixel is a continuous electrode. The sub-pixels include sub-pixel pairs, each sub-pixel pair includes a first pixel block and a second pixel block, a shape of the second electrode of the second pixel block is different from that of the second electrode of the first pixel block.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: April 2, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Tinghua Shang, Yang Zhou, Haigang Qing, Linhong Han, Ling Shi, Yao Huang
  • Patent number: 11948581
    Abstract: A smart interpreter engine is provided. The smart interpreter engine includes a speech to text converter, a natural language processing module and a translator. The speech to text converter is utilized for converting speech data corresponding to a first language into text data corresponding to the first language. The natural language processing module is utilized for converting the text data corresponding to the first language into glossary text data corresponding to the first language according to a game software. The translator is utilized for converting the glossary text data corresponding to the first language into text data corresponding to a second language.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 2, 2024
    Assignee: ACER INCORPORATED
    Inventors: Gianna Tseng, Shih-Cheng Huang, Shang-Yao Lin, Szu-Ting Chou
  • Publication number: 20240103252
    Abstract: A photographing optical lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has a convex object-side surface. The second lens element with negative refractive power has a convex object-side surface and a concave image-side surface. The third lens element has refractive power. The fourth lens element has refractive power, and an object-side surface and an image-side surface thereof are aspheric. The fifth lens element with negative refractive power has a concave image-side surface, wherein an object-side surface and the image-side surface thereof are aspheric, and at least one of the object-side surface and the image-side surface thereof has at least one inflection point.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 28, 2024
    Inventors: Lin-Yao LIAO, Hsin-Hsuan HUANG
  • Publication number: 20240105807
    Abstract: The present application discloses a contact structure, a semiconductor device, and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; an impurity region positioned in the substrate; an intervening conductive layer positioned on the impurity region; a bottom conductive layer positioned on the bottom conductive layer; a conductive capping layer positioned on the bottom conductive layer; a top conductive layer positioned on the conductive capping layer. The intervening conductive layer, the bottom conductive layer, the conductive capping layer, and the top conductive layer configure a contact structure. The bottom conductive layer includes germanium or silicon germanium. The bottom conductive layer includes n-type dopants or p-type dopants.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Inventor: TSE-YAO HUANG
  • Publication number: 20240107829
    Abstract: A display panel and a display device are provided. The display panel includes: a base substrate, having a first display region and a second display region, the first display region is located at at least one side of the second display region; a plurality of first pixel circuits, located in the first display region; a plurality of first light-emitting elements, located in the first display region to each drive at least one first light-emitting element; a plurality of second pixel circuits, located in the first display region; a plurality of second light-emitting elements, located in the second display region to each drive at least one second light-emitting element; and a plurality of conductive lines, the second pixel circuit is connected to the second light-emitting element through at least one conductive line.
    Type: Application
    Filed: July 19, 2021
    Publication date: March 28, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lili DU, Yao HUANG, Kaipeng SUN, Benlian WANG, Jianchang CAI
  • Publication number: 20240103196
    Abstract: A radiographic inspection device and a method of inspecting an object are provided. The radiographic inspection device includes a support frame, where an inspection space applicable to inspect an object is formed within the support frame, and the inspection space has a first opening connecting to an outside; a transfer mechanism applicable to carry the object and move through the inspection space; a shielding curtain mounted at the first opening; and a driving mechanism. The driving mechanism includes: a driver mounted on the support frame; and a joint portion, where an upper end of the shielding curtain is connected to the joint portion. The driver is configured to synchronously drive two ends of the joint portion, so that the shielding curtain moves up and down with the joint portion to open or close the first opening.
    Type: Application
    Filed: January 18, 2022
    Publication date: March 28, 2024
    Inventors: Zhiqiang CHEN, Li ZHANG, Yi CHENG, Qingping HUANG, Mingzhi HONG, Minghua QIU, Yao ZHANG, Jianxue YANG, Lei ZHENG
  • Publication number: 20240107804
    Abstract: A display substrate and a display device are provided. The display substrate includes a display region including light emitting units; the light emitting units are arranged into light emitting unit rows, and the light emitting units in one of the light emitting unit rows are arranged along a first direction; the light emitting units include first light emitting units. In at least part of the display region: distances, in the first direction, between a light emitting region of one first light emitting unit and light emitting regions of two of the first light emitting units adjacent to the one first light emitting units are different, and/or distances, in a second direction, between a light emitting region of one first light emitting units and the light emitting regions of two of the first light emitting units adjacent to the one first light emitting units are different.
    Type: Application
    Filed: May 31, 2021
    Publication date: March 28, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Mingwen WANG, Yao HUANG, Xingliang XIAO, Zhong LU, Yuan CHEN, Yamei ZHOU, Yu SONG, Wei HU, Fuqiang LIN
  • Patent number: 11942258
    Abstract: An inductor device includes a first and a second inductor and a first and a second connection member. A first and a second trace of the first inductor is located on a first and a second layer respectively. The second trace is coupled to the first trace located at a first and a second area. The first connection member is coupled to the second trace. A third and a fourth trace of the second inductor is located on the first and the second layer respectively. The first trace and the third trace are disposed in turn at the first area and the second area. The fourth trace is coupled to the third trace located at the first and the second area. The second and the fourth trace are disposed in turn at the first and the second area. The second connection member is coupled to the fourth trace.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: March 26, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Ting-Yao Huang, Ka-Un Chan
  • Patent number: 11942906
    Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan