Abstract: A display panel, includes: a substrate; and a plurality of OLED devices disposed on the substrate, each of which includes an anode and a light-emitting layer arranged in stack; further includes a patterned area, the patterned area comprising at least one cathode group, each of which includes a plurality of cathodes arranged at intervals, and an orthographic projection of each of the plurality of cathodes on the substrate at least covers an orthographic projection of the light-emitting layer of one of the plurality of OLED devices on the substrate; and for each of the at least one cathode group, the display panel further includes a plurality of first wirings electrically connected to the plurality of cathodes in one-to-one correspondence and a second wiring electrically connected to the plurality of first wirings and electrically connected to a VSS signal line. A display device is further provided.

Abstract: An electric vehicle includes a battery pack for driving the electric vehicle; and a vehicle body reinforcing structure member having at least a cross connection structure, wherein a left side and a right side of the vehicle body reinforcing structure member are fixed to a left side and a right side of a vehicle body respectively, and at least a portion of the vehicle body reinforcing structure member is fixed to the battery pack.

Abstract: An example device for decoding video data includes one or more processors implemented in circuitry and configured to: generate an inter-prediction block for a current block of video data; generate an intra-prediction block for the current block of video data; generate a final prediction block for the current block of video data from the inter-prediction block and the intra-prediction block, including performing each of combined inter/intra prediction (CIIP) mode, overlapped block motion compensation (OBMC), and luma mapping with chroma scaling (LMCS) while generating the final prediction block; and decode the current block of video data using the final prediction block. To generate the final prediction block, the processors may perform LMCS on a first inter-prediction sub-block, combine the LMCS-mapped first inter-prediction sub-block with the intra-prediction block using CIIP, and perform OBMC between the first CIIP prediction block and a second inter-prediction sub-block.

Abstract: An image capturing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has a convex object-side surface. The second lens element has refractive power. The third lens element has refractive power, and an object-side surface and an image-side surface thereof being aspheric. The fourth lens element has negative refractive power, and an object-side surface and an image-side surface thereof are aspheric. The fifth lens element with negative refractive power has a concave object-side surface, and the object-side surface and an image-side surface thereof are aspheric.

Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer, an anode layer, and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wirings are respectively disposed on two sides of the anode layer below the anode layer, the signal wiring is between the first and second wirings, the projections of the first and second wirings on the base substrate respectively overlap projections of two sides of the anode layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

Abstract: Provided is a display panel. The display panel includes: a substrate, at least one row of light-emitting elements disposed on the substrate, a plurality of pixel drive circuits, a plurality of connection lines, and a plurality of compensation portions. A length of a first connection line electrically connected to a first pixel drive circuit is less than a length of a second connection line electrically connected to a second pixel drive circuit. A capacitance of the first connection line is compensated by electrically connecting the compensation portion to the first connection line, and thus a difference between the capacitance of the first connection line and a capacitance of the second connection line is reduced.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a word line structure positioned in the substrate; a plurality of impurity regions positioned in the substrate and adjacent to the word line structure; a plurality of bottom shallow contacts positioned on the word line structure; a first interconnect layer positioned on the plurality of bottom shallow contacts; a plurality of top shallow contacts positioned on the first interconnect layer; and a plurality of deep contacts positioned on the plurality of impurity regions. Top surfaces of the plurality of top shallow contacts and top surfaces of the plurality of deep contacts are substantially coplanar.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a word line structure positioned in the substrate; a plurality of impurity regions positioned in the substrate and adjacent to the word line structure; a plurality of bottom shallow contacts positioned on the word line structure; a first interconnect layer positioned on the plurality of bottom shallow contacts; a plurality of top shallow contacts positioned on the first interconnect layer; and a plurality of deep contacts positioned on the plurality of impurity regions. Top surfaces of the plurality of top shallow contacts and top surfaces of the plurality of deep contacts are substantially coplanar.

Abstract: A display substrate and a display device are provided. In the display substrate, a first display region includes a first light emitting unit column and a second light emitting unit column each connected with a column of first sub-pixel circuits; a second display region includes a third light emitting unit column and a fourth light emitting unit column each connected with a column of first sub-pixel circuit pairs; each second sub data line is connected with each second light emitting unit column, and each fourth sub data line is connected with each fourth light emitting unit column. The first sub-pixel circuits connected with the fourth light emitting unit column and the first sub-pixel circuits connected with the second light emitting unit column are located in different columns, and the second sub data line and the fourth sub data line are connected by a data line connection portion.

Abstract: A display substrate and a display device. The display substrate includes a display region, a first connecting wire, and a second connecting wire. A first display region includes a first sub-pixel array, including a plurality of light emitting elements arranged in an array, and the plurality of light emitting elements include a first light emitting element and a second light emitting element. The second display region includes a first pixel circuit array, including a plurality of first pixel circuit units, and the plurality of pixel circuit units include a first pixel circuit (D10) and a second pixel circuit. The first connecting wire (151) is connected to the first pixel circuit and the first light emitting element. The second connecting wire is connected to the second pixel circuit and the second light emitting element. The second connecting wire extends in a first direction, the first connecting wire extends in a second direction.

Abstract: The present disclosure discloses a multifunctional sounding device including a frame, a vibrator assembly, and a speaker assembly. The frame includes a top wall and a bottom wall. The vibrator assembly includes a vibrating unit vibrating along a first direction. The speaker assembly includes two magnetic units locating on two opposite sides of the vibrating unit respectively, a diaphragm fixed to the top wall, and two voice coils. The diaphragm vibrates along a second direction that is perpendicular to the first direction. A winding axis of each voice coil is perpendicular to the first and second directions. The two magnetic units are sandwiched between the top wall and the bottom wall. A peripheral edge of the diaphragm is recessed inward for avoiding the two magnetic units. The multifunctional sounding device disclosed by the present disclosure combines functions of emitting sounds and providing vibrations.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a first impurity region positioned in the substrate; a first dielectric layer positioned on the substrate; a first contact including a buried portion positioned along the first dielectric layer and on the first impurity region, and a protruding portion positioned on the buried portion and protruding from the first dielectric layer; a first top assistant cap covering the protruding portion; and a first top conductive layer positioned on the first top assistant cap. The first top assistant cap includes germanium or silicon germanium.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a first impurity region positioned in the substrate; a first dielectric layer positioned on the substrate; a first contact including a buried portion positioned along the first dielectric layer and on the first impurity region, and a protruding portion positioned on the buried portion and protruding from the first dielectric layer; a first top assistant cap covering the protruding portion; and a first top conductive layer positioned on the first top assistant cap. The first top assistant cap includes germanium or silicon germanium.

Abstract: A pixel circuit and a driving method thereof, and a display panel. The pixel circuit includes a driving circuit, a data writing circuit, a compensation control circuit, an energy storage circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first initialization circuit, a second initialization circuit, and a transmission circuit. The driving circuit includes a control terminal, a first terminal and a second terminal, and is configured to control a driving current flowing through the first terminal and the second terminal and used for driving a light-emitting element to emit light. The first initialization circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit; the second initialization circuit is configured to apply a second initialization voltage to the first electrode of the light-emitting element.

Abstract: The present disclosure discloses a display panel and a display device. The display panel includes a base substrate including a first display region and a second display region. Since pixel circuits for driving light-emitting elements in the second display region are only disposed in the first display region but not disposed in the second display region, the light transmittance of the second display region is ensured to be good. Correspondingly, the display panel in the present disclosure has a good display effect.

Abstract: The present application discloses a method for fabricating a semiconductor device with graphene layers The method includes providing a substrate; forming a first passivation layer above the substrate; forming a redistribution layer on the first passivation layer; forming a first adjustment layer on the redistribution layer; forming a pad layer on the first adjustment layer; forming a second adjustment layer between the pad layer and the first adjustment layer; forming a second passivation layer on the first passivation layer; wherein the first adjustment layer and the second adjustment layer are formed of graphene.

Abstract: Disclosed in the present invention is an L-glutamate dehydrogenase mutant, the sequence of the L-glutamate dehydrogenase mutant being a sequence in which amino acid residue A at position 175 in SEQ ID NO: 1 is mutated to be G, and amino acid residue V at position 386 is mutated to be an amino acid residue having less steric hindrance. Further disclosed in the present invention is an application of the described L-amino acid dehydrogenase mutant in the preparation of L-glufosinate-ammonium or a salt thereof. When the L-glutamate dehydrogenase mutant of the present invention is used to prepare L-glufosinate-ammonium or a salt thereof, compared to an L-glutamate dehydrogenase mutant in which only position 175 or 386 is mutated, the specific enzyme activity is higher. Therefore, the action efficiency of the enzyme is improved, reaction costs are reduced, and industrial production is facilitated.

Abstract: A method for predicting an attacked path on enterprise networks includes: obtaining a plurality of accounts, a plurality of machines and network resource data, where the plurality of machines include at least one attacked target; calculating, according to the network resource data, a plurality of evaluated values of executing access on other machines of each account logging in at least one machine; and presenting an attacked path where a machine at least one account logs in accesses the attacked target directly, or indirectly by connecting to other machines, and the machine the at least one account logs in points to the attacked target directly, or indirectly by connecting to other machines.

Abstract: Provided is a display panel. The display panel includes a first light-emitting element disposed in a first display region, and a first pixel circuit and a compensation capacitor that are disposed in a peripheral region. The first pixel circuit may be coupled to the first light-emitting element by a first connecting wire. A first metal layer in the compensation capacitor may be coupled to a target node, a second metal layer may be coupled to a power supply end, and the target node is a node via which the first connecting wire is coupled to the first pixel circuit.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, including a pixel array region and a peripheral region; and a first scan driving circuit, a plurality of power lines, a first signal line group, and a second signal line group, which are in the peripheral region and located on a first side of the base substrate. The first scan driving circuit includes a plurality of cascaded first shift registers; the plurality of power lines are configured to provide a plurality of power voltages to the plurality of cascaded first shift registers in the first scan driving circuit; the first signal line group includes at least one timing signal line; and the second signal line group is on a side of the plurality of power lines and the first signal line group away from the pixel array region.