Patents by Inventor Yao-Wen Chang

Yao-Wen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10796954
    Abstract: A semiconductor structure includes a first substrate, a metallic pad disposed over the first substrate, a dielectric structure disposed over the first substrate and exposing a portion of the metallic pad, a bonding structure disposed over and electrically connected to the metallic pad, a barrier ring surrounding the bonding structure, and a through-hole penetrating the first substrate and the dielectric structure. The bonding structure includes a bottom and a sidewall, the bottom of the bonding structure is in contact with the metallic pad, a first portion of the sidewall of the bonding structure is in contact with the dielectric structure, and a second portion of the sidewall of the bonding structure is in contact with the barrier ring.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Gung-Pei Chang, Yao-Wen Chang, Hai-Dang Trinh
  • Publication number: 20200312405
    Abstract: A method and an apparatus for neural network computation using adaptive data representation, adapted for a processor to perform multiply-and-accumulate operations on a memory having a crossbar architecture, are provided. The memory comprises multiple input and output lines crossing each other, multiple cells respectively disposed at intersections of the input and output lines, and multiple sense amplifiers respectively connected to the output lines. In the method, an input cycle of kth bits respectively in an input data is adaptively divided into multiple sub-cycles, wherein a number of the divided sub-cycles is determined according to a value of k. The kth bits of the input data are inputted to the input lines with the sub-cycles and computation results of the output lines are sensed by the sense amplifiers. The computation results sensed in each sub-cycle are combined to obtain the output data corresponding to the kth bits of the input data.
    Type: Application
    Filed: February 21, 2020
    Publication date: October 1, 2020
    Applicant: MACRONIX International Co., Ltd.
    Inventors: SHU-YIN HO, Hsiang-Pang Li, Yao-Wen Kang, Chun-Feng Wu, Yuan-Hao Chang, Tei-Wei Kuo
  • Publication number: 20200309138
    Abstract: A fan module including a first body, a second body, a first fan assembly, a power module, and a second fan assembly is provided. The second body is slidably disposed at the first body to form a circulation space together. The first fan assembly is rotatably disposed at the first body and has sliding grooves. The power module is disposed in the first body and connected to the first fan assembly. The second fan assembly is rotatably disposed at the second body and has sliding portions, respectively and slidably disposed in corresponding sliding grooves. The power module is adapted to drive the first and second fan assemblies to rotate relative to the first body. A link module is adapted to drive the first and second bodies to relatively slide along an axial direction, so that the first and second fan assemblies are relatively separated or overlapped along the axial direction.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Han-Hsuan Tsai, Jui-Min Huang, Wei-Hao Lan, Chien-Chu Chen, Ching-Ya Tu, Chih-Wen Chiang, Ching-Tai Chang, Ken-Ping Lin, Yao-Lin Chang, Cheng-Ya Chi
  • Patent number: 10790362
    Abstract: The present disclosure provides a semiconductor structure, including providing a metal layer, an adhesion-enhancing layer over the metal layer, a dielectric stack over the adhesion-enhancing layer, a contact penetrating the dielectric stack and the adhesion-enhancing layer and connecting with the metal layer, a barrier layer disposed between the contact and the dielectric stack, and a high-k dielectric layer disposed between the contact and the barrier layer.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: September 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yao-Wen Chang, Gung-Pei Chang, Ching-Sheng Chu, Chern-Yow Hsu
  • Patent number: 10775858
    Abstract: A liquid immersion cooling tank includes a reservoir and a liquid flow tube. The reservoir contains an insulating coolant to immerse an electronic device. The liquid flow tube includes an adjusting member. The reservoir includes an inlet and an outlet. The inlet and the outlet are respectively arranged at opposite ends of the electronic device. The liquid flow tube is located inside the reservoir. The liquid flow tube is coupled to at least one of the inlet and the outlet. The adjusting member faces the electronic device to control an amount of inflow or outflow of the insulating coolant. When the electronic device is immersed in the reservoir for cooling, the insulating coolant flows through the electronic device. The liquid flow tube coupled to the inlet or the outlet of the reservoir uses the adjusting member to control the amount of inflow or outflow of the insulating coolant.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: September 15, 2020
    Assignee: HONGFUJIN PRECISION ELECTRONICS (TIANJIN) CO., LTD.
    Inventors: Tze-Chern Mao, Yen-Chun Fu, Chih-Hung Chang, Yao-Ting Chang, Li-Wen Chang, Chao-Ke Wei
  • Patent number: 10770144
    Abstract: A non-volatile memory and a program method thereof are provided. The program method includes: setting one of a plurality of word lines to be a program word line, setting the word lines except the program word line to be a plurality of unselected word lines; raise a voltage on the program word line from a reference voltage to a first program voltage during a first sub-time period of a program time period; raising the voltage on the program word line from the first program voltage to a second program voltage during a second sub-time period of the program time period; and raising voltages on at least part of the unselected word lines from the reference voltage to a pass voltage during the second sub-time period.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 8, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang
  • Patent number: 10763273
    Abstract: A memory device comprises an array of two-transistor memory cells, two-transistor memory cells in the array including a vertical select transistor and a vertical data storage transistor. The array comprises a plurality of stacks of conductive lines, a stack of conductive lines including a select gate line and a word line adjacent the select gate line. The device comprises an array of vertical channel lines disposed through the conductive lines to a reference line, gate dielectric structures surrounding the vertical channel lines at channel regions of vertical select transistors in the array of vertical channel lines and the select gate lines, charge storage structures surrounding the vertical channel lines at channel regions of vertical data storage transistors in the array of vertical channel lines and the word lines, and bit lines coupled to the vertical channel lines via upper ends of the vertical channel lines.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: September 1, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Guan-Wei Wu, Yao-Wen Chang, I-Chen Yang
  • Publication number: 20200265896
    Abstract: A non-volatile memory and a program method thereof are provided. The program method includes: setting one of a plurality of word lines to be a program word line, setting the word lines except the program word line to be a plurality of unselected word lines; raise a voltage on the program word line from a reference voltage to a first program voltage during a first sub-time period of a program time period; raising the voltage on the program word line from the first program voltage to a second program voltage during a second sub-time period of the program time period; and raising voltages on at least part of the unselected word lines from the reference voltage to a pass voltage during the second sub-time period.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 20, 2020
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang
  • Patent number: 10746961
    Abstract: An optical image capturing system with four lenses is provided. In order from an object side to an image side, the optical image capturing system includes a first lens, a second lens, a third lens and a fourth lens. The first lens has positive refractive power and the object side thereof may be a convex surface. The second lens and the third lens have refractive power and the object side and the image side thereof may be all aspheric. The fourth lens has negative power and the image side thereof may be a concave surface. The object side and the image side of the fourth lens are aspheric and at least one surface thereof has one inflection point. When meeting some certain conditions, the optical image capturing system may have outstanding light-gathering ability and an adjustment ability about the optical path in order to elevate the image quality.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: August 18, 2020
    Assignee: ABILITY OPTO-ELECTRONICS TECHNOLOGY CO. LTD.
    Inventors: Yeong-Ming Chang, Chen-Hung Tsai, Hung-Wen Lee, Chien-Hsun Lai, Yao-Wei Liu
  • Publication number: 20200257342
    Abstract: A liquid immersion cooling tank includes a reservoir and a liquid flow tube. The reservoir contains an insulating coolant to immerse an electronic device. The liquid flow tube includes an adjusting member. The reservoir includes an inlet and an outlet. The inlet and the outlet are respectively arranged at opposite ends of the electronic device. The liquid flow tube is located inside the reservoir. The liquid flow tube is coupled to at least one of the inlet and the outlet. The adjusting member faces the electronic device to control an amount of inflow or outflow of the insulating coolant. When the electronic device is immersed in the reservoir for cooling, the insulating coolant flows through the electronic device. The liquid flow tube coupled to the inlet or the outlet of the reservoir uses the adjusting member to control the amount of inflow or outflow of the insulating coolant.
    Type: Application
    Filed: March 8, 2019
    Publication date: August 13, 2020
    Inventors: TZE-CHERN MAO, YEN-CHUN FU, CHIH-HUNG CHANG, YAO-TING CHANG, LI-WEN CHANG, CHAO-KE WEI
  • Patent number: 10741250
    Abstract: A non-volatile memory device driving method, applicable to a non-volatile memory device comprising a row decoder and a memory array, comprises: utilizing the row decoder to transmit multiple word line signals to multiple word lines of the memory array; according to an address, utilizing the row decoder to switch a selected word line signal of the multiple word line signals from a predetermined voltage level to a program voltage level; utilizing the row decoder to switch at least one support word line signal of the multiple word line signals from the predetermined voltage level to a first pass voltage level; when the selected word line signal is remained at the program voltage level, utilizing the row decoder to switch the at least one support word line signal from the first pass voltage level to a higher second pass voltage level.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 11, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsing-Wen Chang, Yao-Wen Chang, Chi-Yuan Chin
  • Publication number: 20200243121
    Abstract: A non-volatile memory and a program method thereof are provided. The program method includes: selecting a programmed word line, where the programmed word line has a plurality of segments respectively corresponding to a plurality of bit lines; providing a program voltage to a voltage receiving end of the programmed word line, and sequentially transmitting the program voltage to the segments; respectively providing a plurality of bit line voltages to the bit lines at a plurality of enable time points and turning on a string selection switch at a setting time point; and setting voltage values of the bit line voltages according to the segments corresponding to the bit lines, respectively, or setting the enable time points according to the segments corresponding to the bit lines, or setting the setting time point according to a voltage transmission delay of the programmed word line.
    Type: Application
    Filed: January 30, 2019
    Publication date: July 30, 2020
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Chu-Yung Liu, Hsing-Wen Chang, Yung-Hsiang Chen, Yao-Wen Chang
  • Publication number: 20200243469
    Abstract: A bump structure with a barrier layer, and a method for manufacturing the bump structure, are provided. In some embodiments, the bump structure comprises a conductive pad, a conductive bump, and a barrier layer. The conductive pad comprises a pad material. The conductive bump overlies the conductive pad, and comprises a lower bump layer and an upper bump layer covering the lower bump layer. The barrier layer is configured to block movement of the pad material from the conductive pad to the upper bump layer along sidewalls of the lower bump layer. In some embodiments, the barrier layer is a spacer lining the sidewalls of the lower bump layer. In other embodiments, the barrier layer is between the barrier layer and the conductive pad, and spaces the sidewalls of the lower bump layer from the conductive pad.
    Type: Application
    Filed: April 17, 2020
    Publication date: July 30, 2020
    Inventors: Yao-Wen Chang, Chern-Yow Hsu, Cheng-Yuan Tsai, Kong-Beng Thei
  • Patent number: 10725268
    Abstract: An optical image capturing system is provided. In the order from an object side to an image side, the optical image capturing system includes a first lens, a second lens, a third lens, and a fourth lens. The first lens has positive refractive power and the object side thereof may be a convex surface. The second lens and the third lens both have refractive power and the object side and the image side of the second lens and the third lens are all aspheric. The fourth lens may have negative refractive power, the image side of the fourth lens may be a concave surface, and the object side and the image side thereof are both aspheric. When meeting some certain conditions, the optical image capturing system may have outstanding light-gathering ability and an adjustment ability about the optical path in order to elevate the image quality.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: July 28, 2020
    Assignee: Ability Opto-Electronics Technology Co., Ltd.
    Inventors: Yeong-Ming Chang, Chen-Hung Tsai, Hung-Wen Lee, Chien-Hsun Lai, Yao-Wei Liu
  • Patent number: 10725267
    Abstract: A four-piece optical lens for capturing image and a four-piece optical module for capturing image are provided. In order from an object side to an image side, the optical lens along the optical axis includes a first lens with refractive power; a second lens with refractive power; a third lens with refractive power; and a fourth lens with positive refractive power; and at least one of the image-side surface and object-side surface of each of the four lens elements are aspheric. The optical lens can increase aperture value and improve the imagining quality for use in compact cameras.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: July 28, 2020
    Assignee: ABILITY OPTO-ELECTRONICS TECHNOLOGY CO. LTD.
    Inventors: Po-Jui Liao, Hung-Wen Lee, Ying Jung Chen, Bo Guang Jhang, Kuo-Yu Liao, Yao Wei Liu, Yeong-Ming Chang
  • Patent number: 10727350
    Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo, Po-Cheng Shih, Jun-Yi Ruan
  • Patent number: 10727399
    Abstract: The present application relates to a method for forming a top-electrode cap structure on a memory cell. In some embodiments, a method for forming a top-electrode cap structure on a memory cell. The method includes providing a memory cell comprising a top electrode, a bottom electrode, and a resistive memory element sandwiched between the top and bottom electrodes. An etch is performed into an interlayer dielectric (ILD) layer covering the memory cell to form a via opening exposing the top electrode of the memory cell. A getter layer is then formed to line the via opening, and further, over and abutting the top electrode of the memory cell. An oxygen-resistant layer is formed over and abutting the getter layer.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao-Wen Chang, Tsung-Hsueh Yang
  • Patent number: 10727077
    Abstract: A memory cell with an etch stop layer is provided. The memory cell comprises a bottom electrode disposed over a substrate. A switching dielectric is disposed over the bottom electrode and having a variable resistance. A top electrode is disposed over the switching dielectric. A sidewall spacer layer extends upwardly along sidewalls of the bottom electrode, the switching dielectric, and the top electrode. A lower etch stop layer is disposed over the lower dielectric layer and lining an outer sidewall of the sidewall spacer layer. The lower etch stop layer is made of a material different from the sidewall spacer layer and protects the top electrode from damaging during manufacturing processes.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Chau Chen, Cheng-Tai Hsiao, Cheng-Yuan Tsai, Hsun-Chung Kuang, Yao-Wen Chang
  • Patent number: 10713410
    Abstract: A method related to legalize mixed-cell height standard cells of an IC is provided. A global placement of the IC is obtained. A plurality of standard cells of the IC are placed in the global placement. Each standard cell is moved from a position to the nearest row in the global placement. A displacement value of each moved standard cell is obtained in the global placement. The global placement of the IC is divided into a plurality of windows according to the displacement values of the moved standard cells in each window and a dead space corresponding to each moved standard cell in each window. All overlapping areas among the standard cells of each window are removed to obtain a detailed placement. The IC is manufactured according to the detailed placement. The standard cells have different cell heights in each window.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: July 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chao-Hung Wang, Yen-Yi Wu, Shih-Chun Chen, Yao-Wen Chang, Meng-Kai Hsu
  • Patent number: 10690883
    Abstract: An optical image capturing system includes, along the optical axis in order from an object side to an image side, a first lens, a second lens, a third lens, a fourth lens, and a fifth lens. At least one lens among the first to the fifth lenses has positive refractive power. The fifth lens can have negative refractive power, wherein both surfaces thereof are aspheric, and at least one surface thereof has an inflection point. The lenses in the optical image capturing system which have refractive power include the first to the fifth lenses. The optical image capturing system can increase aperture value and improve the imaging quality for use in compact cameras.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: June 23, 2020
    Assignee: ABILITY OPTO-ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yeong-Ming Chang, Hung-Wen Lee, Chien-Hsun Lai, Yao-Wei Liu