Patents by Inventor Yasuhiro Okamoto
Yasuhiro Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9231096Abstract: A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition In1?zAlzN (0?z?1), a channel layer having a composition of: AlxGa1?xN (0?x?1) or InyGa1?yN (0?y?1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.Type: GrantFiled: November 21, 2014Date of Patent: January 5, 2016Assignee: Renesas Electronics CorporationInventors: Yasuhiro Okamoto, Yuji Ando, Tatsuo Nakayama, Takashi Inoue, Kazuki Ota
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Patent number: 9123739Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed over the first nitride semiconductor layer; and a gate electrode facing the second nitride semiconductor layer via a gate insulating film. Because the second nitride semiconductor layer is formed by stacking plural semiconductor layers with their Al composition ratios different from each other, the Al composition ratio of the second nitride semiconductor layer changes stepwise. The semiconductor layers forming the second nitride semiconductor layer are polarized in the same direction so that, among the semiconductor layers, a semiconductor layer nearer to the gate electrode has higher (or lower) intensity of polarization.Type: GrantFiled: July 12, 2012Date of Patent: September 1, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yasuhiro Okamoto, Tatsuo Nakayama, Takashi Inoue, Hironobu Miyamoto
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Publication number: 20150221757Abstract: Characteristics of a semiconductor device are improved. The semiconductor device is configured to provide a trench that penetrates a barrier layer, and reaches a middle portion of a channel layer among an n+ layer, an n-type layer, a p-type layer, the channel layer, and the barrier layer which are formed above a substrate, a gate electrode arranged within the groove through a gate insulating film, and a source electrode and a drain electrode which are formed above the barrier layer on both sides of the gate electrode. The n-type layer and the drain electrode are electrically coupled to each other by a connection portion that reaches the n+ layer. The p-type layer and the source electrode are electrically coupled to each other by a connection portion that reaches the p-type layer. A diode including a p-type layer and an n-type layer is provided between the source electrode and the drain electrode, to thereby prevent the breaking of an element caused by an avalanche breakdown.Type: ApplicationFiled: January 26, 2015Publication date: August 6, 2015Inventors: Tatsuo NAKAYAMA, Hironobu Miyamoto, Yasuhiro Okamoto, Yoshinao Miura, Takashi Inoue
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Publication number: 20150208902Abstract: An introduction device applies urging force linearly generated by a spring to a nut portion screwed to a drive shaft to convert the urging force to the rotation direction of the drive shaft. This conversion returns an RL operation dial provided at the end of the drive shaft in a direction opposite to the rotation direction in which the RL operation dial is operated, and then returns the RL operation dial to an original neutral position.Type: ApplicationFiled: February 4, 2015Publication date: July 30, 2015Applicant: OLYMPUS MEDICAL SYSTEMS CORP.Inventor: Yasuhiro OKAMOTO
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Publication number: 20150171204Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a potential fixing layer, a channel underlayer, a channel layer, and a barrier layer formed above a substrate, a trench that penetrates the barrier layer and reaches as far as a middle of the channel layer, gate electrode disposed by way of an insulation film in the trench, and a source electrode and a drain electrode formed respectively over the barrier layer on both sides of the gate electrode. A coupling portion inside the through hole that reaches as far as the potential fixing layer electrically couples the potential fixing layer and the source electrode. This can reduce fluctuation of the characteristics such as a threshold voltage and an on-resistance.Type: ApplicationFiled: December 12, 2014Publication date: June 18, 2015Inventors: Tatsuo NAKAYAMA, Hironobu MIYAMOTO, Yasuhiro OKAMOTO, Yoshinao MIURA, Takashi INOUE
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Publication number: 20150164306Abstract: A bending apparatus includes: a bending portion; an operation element erected vertically from an operation portion having a longitudinal axis and has a shaft portion in which a tilt direction and tilt angle are changeable; a pulling member having one end connected to the bending portion; a pulley on which a rotary body around which the pulling member is wound is arranged; a motor that generates a driving force that rotates the pulley to pull the pulling member wound around the rotary body in a winding direction; a hanging frame that extends in a diameter direction of the shaft portion, and includes an attachment portion to which the other end of the pulling member is attached; and an attachment path setting member provided inside the operation portion, which changes a path of the pulling to the longitudinal axis direction and guides the pulling member to the attachment portion.Type: ApplicationFiled: February 25, 2015Publication date: June 18, 2015Applicant: OLYMPUS MEDICAL SYSTEMS CORP.Inventors: Yasuhiro Okamoto, Hiroki Moriyama
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Publication number: 20150145004Abstract: The characteristics of a semiconductor device are improved. A semiconductor device is formed so as to have a channel layer formed over a substrate, a barrier layer, a trench penetrating through the barrier layer in an opening region, and reaching some point of the channel layer, a gate electrode arranged in the trench via a gate insulation film, and an insulation film formed over the barrier layer outside the opening region. Then, the insulation film has a lamination structure of a Si-rich silicon nitride film, and a N-rich silicon nitride film situated thereunder. Thus, the upper layer of the insulation film is set as the Si-rich silicon nitride film. This enables the improvement of the breakdown voltage, and further, enables the improvement of the etching resistance. Whereas, the lower layer of the insulation film is set as the N-rich silicon nitride film. This can suppress collapse.Type: ApplicationFiled: November 20, 2014Publication date: May 28, 2015Inventors: Takashi Inoue, Toshiyuki Takewaki, Tatsuo Nakayama, Yasuhiro Okamoto, Hironobu Miyamoto
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Publication number: 20150115323Abstract: A semiconductor device including a first nitride semiconductor layer formed over a substrate, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer, a trench penetrating through the second nitride semiconductor layer to reach the middle of the first nitride semiconductor layer, a conductive film formed at a corner portion corresponding to an end portion of a bottom surface of the trench and a gate electrode disposed via a gate insulating film inside the trench including a region on the conductive film.Type: ApplicationFiled: December 24, 2014Publication date: April 30, 2015Inventors: Tohru Kawai, Takashi Inoue, Tatsuo Nakayama, Yasuhiro Okamoto, Hironobu Miyamoto
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Publication number: 20150109231Abstract: In a conductive film for touch panel, a first electrode pattern is formed on the main surface at one side of an insulating layer, a second electrode pattern is formed on the main surface at the other side of the insulating layer, an adhesive insulating layer is disposed on at least one of the first electrode pattern and the second electrode pattern, an acid value of an adhesive insulating material contained in the adhesive insulating layer is equal to or greater than 10 mg KOH/g and equal to or less than 100 mg KOH/g, either or both of the first electrode pattern and the second electrode pattern contain silver, and a rate of change in mutual capacitance (%) between the first electrode pattern and the second electrode pattern before and after performing an environmental test is 0% to 100%.Type: ApplicationFiled: January 5, 2015Publication date: April 23, 2015Applicant: FUJIFILM CorporationInventors: Hideyuki SHIRAI, Yasuhiro OKAMOTO, Nobuyuki TADA, Yasushi ENDO, Toshiaki HAYASHI
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Patent number: 8986195Abstract: A medical operation device is attachable to an insertion portion of a medical instrument for observation.Type: GrantFiled: November 16, 2012Date of Patent: March 24, 2015Assignee: Olympus Medical Systems Corp.Inventors: Yasuhiro Okamoto, Kazuo Banju
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Publication number: 20150076511Abstract: A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition In1?zAlzN (0?z?1), a channel layer having a composition of: AlxGa1?xN (0?x?1) or InyGa1?yN (0?y?1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.Type: ApplicationFiled: November 21, 2014Publication date: March 19, 2015Applicant: Renesas Electronics CorporationInventors: Yasuhiro OKAMOTO, Yuji ANDO, Tatsuo NAKAYAMA, Takashi INOUE, Kazuki OTA
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Patent number: 8981434Abstract: Provided is a semiconductor device in which the trade-off between the withstand voltage and the on-resistance is improved and the performance is increased. A semiconductor device comprises a substrate 1, a first n-type semiconductor layer 21?, a second n-type semiconductor layer 23, a p-type semiconductor layer 24, and a third n-type semiconductor layer 25?, wherein the first n-type semiconductor layer 21?, the second n-type semiconductor layer 23, the p-type semiconductor layer 24, and the third n-type semiconductor layer 25? are laminated at the upper side of the substrate 1 in this order. The drain electrode 13 is in ohmic-contact with the first n-type semiconductor layer 21? and the source electrode 12 is in ohmic-contact with the third n-type semiconductor layer 25?.Type: GrantFiled: June 23, 2010Date of Patent: March 17, 2015Assignee: Renesas Electronics CorporationInventors: Hironobu Miyamoto, Yasuhiro Okamoto, Yuji Ando, Tatsuo Nakayama, Takashi Inoue, Kazuki Ota, Kazuomi Endo
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Patent number: 8974376Abstract: An introducing device system includes: an insertion portion; a bending portion which is provided at the insertion portion; an operation portion through which an input operation is performed for bending the bending portion; a pulling member connected to the bending portion and pulled in accordance with the operation through the operation portion; a detection section that detects a moving state of the pulling member; a driving unit that rotationally drives; a driving force transmitting unit including an inner circumferential surface configured to be able to contact an outer circumferential surface of the driving unit, and an outer circumference on which the pulling member is wound, the driving force transmitting unit being reduced in diameter in accordance with pulling of the pulling member; and a driving unit control section controls the driving unit when the moving state detected by the detection section is different from a state determined in advance.Type: GrantFiled: January 29, 2014Date of Patent: March 10, 2015Assignee: Olympus Medical Systems Corp.Inventor: Yasuhiro Okamoto
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Patent number: 8963207Abstract: A semiconductor device includes a buffer layer, a channel layer and a barrier layer formed over a substrate, a trench penetrating through the barrier layer to reach the middle of the channel layer, and a gate electrode disposed inside the trench via a gate insulating film. The channel layer contains n-type impurities, and a region of the channel layer positioned on a buffer layer side has an n-type impurity concentration larger than a region of the channel layer positioned on a barrier layer side, and the buffer layer is made of nitride semiconductor having a band gap wider than that of the channel layer. The channel layer is made of GaN and the buffer layer is made of AlGaN. The channel layer has a channel lower layer containing n-type impurities at an intermediate concentration and a main channel layer formed thereon and containing n-type impurities at a low concentration.Type: GrantFiled: February 24, 2014Date of Patent: February 24, 2015Assignee: Renesas Electronics CorporationInventors: Tohru Kawai, Takashi Inoue, Tatsuo Nakayama, Yasuhiro Okamoto, Hironobu Miyamoto
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Patent number: 8961402Abstract: An endoscope includes an insertion portion, a bending portion bendable in an up-down direction and a left-right direction, a traction member for bending the bending portion, an operation portion provided at a proximal end of the insertion portion, an operation input portion provided in the operation portion, tiltable with respect to a first direction for bending the bending portion in the up-down direction and a second direction for bending the bending portion in the left-right direction, and for performing an operation input for acting on the traction member according to tilting operation and bending the bending portion, and an operation force amount adjusting portion configured to adjust an operation force amount for tilting the operation input portion in the first direction and an operation force amount for tilting the operation input portion in the second direction to be different.Type: GrantFiled: June 21, 2013Date of Patent: February 24, 2015Assignee: Olympus Medical Systems Corp.Inventor: Yasuhiro Okamoto
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Publication number: 20150048419Abstract: A semiconductor device has a channel layer formed above a substrate, a barrier layer formed over the channel layer and having a band gap larger than that of the channel layer, a trench passing through the barrier layer as far as a midway of the channel layer, and a gate electrode disposed byway of a gate insulation film in the inside of the trench. Then, the end of the bottom of the trench is in a rounded shape and the gate insulation film in contact with the end of the bottom of the trench is in a rounded shape. By providing the end of the bottom of the trench with a roundness as described above, a thickness of the gate insulation film situated between the end of the bottom of the gate electrode and the end of the bottom of the trench can be decreased. Thus, the channel is formed also at the end of the bottom of the trench to reduce the resistance of the channel.Type: ApplicationFiled: July 16, 2014Publication date: February 19, 2015Inventors: Yasuhiro Okamoto, Tatsuo Nakayama, Takashi Inoue
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Publication number: 20150041821Abstract: An electrode comes in ohmic contact with an AlGaN layer. A semiconductor device SD has a nitride semiconductor layer GN2, and an AlxGa(1?x)N layer AGN (hereinafter referred to as “AlGaN layer AGN), and Al electrodes DE, SE. in the AlGaN layer AGN, 0<X?0.2 is satisfied. Also, both of a concentration of a p-type impurity and a concentration of an n-type impurity in the AlGaN layer AGN are 1×1016 cm?3 or lower. In this example, the p-type impurity is exemplified by, for example, Be, C, and Mg, and the n-type impurity is exemplified by Si, S, and Se. Also, the Al electrodes DE and SE are connected to the AlGaN layer AGN. Because a composition ratio of Al is limited to the above-mentioned range, the Al electrodes DE and SE are brought into ohmic contact with the AlGaN layer AGN.Type: ApplicationFiled: July 14, 2014Publication date: February 12, 2015Inventors: Tatsuo Nakayama, Masaaki Kanazawa, Yasuhiro Okamoto, Takashi Inoue, Hironobu Miyamoto, Ryohei Nega
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Patent number: 8933367Abstract: There is obtained a laser processing method by which an excellent shape of a cut surface can be achieved and an increase in cost can be suppressed. A laser processing method includes the steps of: preparing a material to be processed; and forming a modified area in the material to be processed, by irradiating the material to be processed with laser beam. In the aforementioned step, pulsed laser beam having a continuous spectrum is focused with a lens, thereby forming a focusing line constituted by a plurality of focuses that are obtained by predetermined bands forming the continuous spectrum of the laser beam, and the material to be processed is irradiated with the laser beam such that at least a part of the focusing line is located on a surface of the material to be processed, thereby forming the modified area on an axis of the focusing line.Type: GrantFiled: February 8, 2012Date of Patent: January 13, 2015Assignees: Sumitomo Electric Industries, Ltd., National University Corporation Okayama UniversityInventors: Motoki Kakui, Hiroshi Kohda, Yasuomi Kaneuchi, Shinobu Tamaoki, Shigehiro Nagano, Yoshiyuki Uno, Yasuhiro Okamoto, Kenta Takahashi
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Patent number: 8928038Abstract: A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition In1-zAlzN (0?z?1), a channel layer having a composition of: AlxGa1-xN (0?x?1) or InyGa1-yN (0?y?1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.Type: GrantFiled: May 15, 2012Date of Patent: January 6, 2015Assignee: Renesas Electronics CorporationInventors: Yasuhiro Okamoto, Yuji Ando, Tatsuo Nakayama, Takashi Inoue, Kazuki Ota
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Patent number: 8921894Abstract: The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer 112, a channel layer 113, a barrier layer 114, and a spacer layer 115 is formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer 112, the channel layer 113 having a compressive strain, and the barrier layer 114 having a tensile strain, and the spacer layer 115 having a compressive strain are laminated on a substrate 100 in this order. The gate insulating film 14 is arranged on the spacer layer 115. The gate electrode 15 is arranged on the gate insulating film 14. The source electrode 161 and the drain electrode 162 are electrically connected to the channel layer 113 directly or via another component.Type: GrantFiled: December 15, 2010Date of Patent: December 30, 2014Assignee: NEC CorporationInventors: Yuji Ando, Takashi Inoue, Kazuki Ota, Yasuhiro Okamoto, Tatsuo Nakayama, Kazuomi Endo