Patents by Inventor Yasuhiro Okamoto

Yasuhiro Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9936860
    Abstract: A bending apparatus includes: a bending portion; an operation element erected vertically from an operation portion having a longitudinal axis and has a shaft portion in which a tilt direction and tilt angle are changeable; a pulling member having one end connected to the bending portion; a pulley on which a rotary body around which the pulling member is wound is arranged; a motor that generates a driving force that rotates the pulley to pull the pulling member wound around the rotary body in a winding direction; a hanging frame that extends in a diameter direction of the shaft portion, and includes an attachment portion to which the other end of the pulling member is attached; and an attachment path setting member provided inside the operation portion, which changes a path of the pulling to the longitudinal axis direction and guides the pulling member to the attachment portion.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: April 10, 2018
    Assignee: OLYMPUS CORPORATION
    Inventors: Yasuhiro Okamoto, Hiroki Moriyama
  • Publication number: 20180061983
    Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.
    Type: Application
    Filed: October 20, 2017
    Publication date: March 1, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Tatsuo NAKAYAMA, Hironobu MIYAMOTO, Ichiro MASUMOTO, Yasuhiro OKAMOTO, Shinichi MIYAKE, Hiroshi KAWAGUCHI
  • Patent number: 9895052
    Abstract: An insertion instrument includes an insertion portion having a curving portion, and an operation portion body coupled to the proximal side of the insertion portion. The operation portion body includes a first surface, and a second surface extending from the first surface and extending in a direction different from the direction in which the first surface extends. A finger side other than a thumb of a grasping hand is located in the second surface. The operation portion body includes a first curving operation portion which is provided in the first surface and which curves the curving portion in a first direction, a functional switch which is provided in the second surface and which operates a predetermined function of the insertion instrument, and a second curving operation portion which is provided in the second surface.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: February 20, 2018
    Assignee: OLYMPUS CORPORATION
    Inventor: Yasuhiro Okamoto
  • Publication number: 20180042455
    Abstract: An attachment unit includes a tube main body attached to an insertion section of an endoscope and disposed to be rotatable around a longitudinal axis of the insertion section and a fin section protrudingly provided on an outer circumferential surface of the tube main body and spirally extended along a longitudinal axis of the tube main body. In the fin section, a first force amount necessary for bringing down the fin section toward an insertion section distal end side direction and a second force amount necessary for bringing down the fin section toward an insertion section proximal end side direction, which is an opposite direction of the insertion section distal end side direction, are different. In the fin section provided on the tube main body, the first force amount is smaller than the second force amount.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Applicant: OLYMPUS CORPORATION
    Inventor: Yasuhiro OKAMOTO
  • Publication number: 20180042456
    Abstract: An attachment unit includes a tube main body attached to an insertion section of an endoscope and disposed to be rotatable around a longitudinal axis of the insertion section and a fin section protrudingly provided on an outer circumferential surface of the tube main body and spirally extended along a longitudinal axis of the tube main body. In the fin section, a first force amount necessary for bringing down the fin section toward a distal end side direction and a second force amount necessary for bringing down the fin section toward a proximal end side direction, which is an opposite direction of the distal end side, are different. In the fin section provided on the tube main body, the first force amount is larger than the second force amount.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Applicant: OLYMPUS CORPORATION
    Inventor: Yasuhiro OKAMOTO
  • Publication number: 20180026099
    Abstract: Properties of a semiconductor device are improved. A semiconductor device is configured so as to include a voltage clamp layer, a channel underlayer, a channel layer, and a barrier layer, which are formed in order above a substrate, a trench that extends up to the middle of the channel layer while penetrating through the barrier layer, a gate electrode disposed within the trench with a gate insulating film in between, a source electrode and a drain electrode formed above the barrier layer on both sides of the gate electrode, and a fourth electrode electrically coupled to the voltage clamp layer. The fourth electrode is electrically isolated from the source electrode, and a voltage applied to the fourth electrode is different from a voltage applied to the source electrode. Consequently, threshold control can be performed. For example, a threshold of a MISFET can be increased.
    Type: Application
    Filed: May 25, 2017
    Publication date: January 25, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Hironobu MIYAMOTO, Tatsuo NAKAYAMA, Atsushi TSUBOI, Yasuhiro OKAMOTO, Hiroshi KAWAGUCHI
  • Patent number: 9861264
    Abstract: A rigid endoscope includes a first insertion section extending along longitudinal directions, a first needle defining an outer edge of a first opening, and a first functional section provided in a vicinity of the first opening of a first lumen, and configured to perform some part of functions. The rigid endoscope includes a second insertion section extending along the longitudinal directions, and located apart from the first insertion section in directions perpendicular to the longitudinal directions, a second needle defining an outer edge of a second opening, and a second functional section provided in a vicinity of the second opening of a second lumen, and configured to perform some part of the functions different from the functions performed by the first functional section.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: January 9, 2018
    Assignee: OLYMPUS CORPORATION
    Inventors: Yasuhiro Okamoto, Kazuo Banju, Hiroki Moriyama
  • Publication number: 20170358652
    Abstract: In order to improve the characteristics of a semiconductor device including: a channel layer and a barrier layer formed above a substrate; and a gate electrode arranged over the barrier layer via a gate insulating film, the semiconductor device is configured as follows. A silicon nitride film is provided over the barrier layer between a source electrode and the gate electrode, and is also provided over the barrier layer between a drain electrode and the gate electrode GE. The surface potential of the barrier layer is reduced by the silicon nitride film, thereby allowing two-dimensional electron gas to be formed. Thus, by selectively forming two-dimensional electron gas only in a region where the silicon nitride film is formed, a normally-off operation can be performed even if a trench gate structure is not adopted.
    Type: Application
    Filed: August 7, 2017
    Publication date: December 14, 2017
    Inventor: Yasuhiro OKAMOTO
  • Patent number: 9837519
    Abstract: The semiconductor device includes a trench that penetrates a barrier layer, and reaches a middle portion of a channel layer among an n+ layer, an n-type layer, a p-type layer, the channel layer, and the barrier layer which are formed above a substrate, a gate electrode arranged within the groove through a gate insulating film, and a source electrode and a drain electrode which are formed above the barrier layer on both sides of the gate electrode. The n-type layer and the drain electrode are electrically coupled by a connection portion that reaches the n+ layer. The p-type layer and the source electrode are electrically coupled by a connection portion that reaches the p-type layer. A diode including a p-type layer and an n-type layer is provided between the source electrode and the drain electrode, to thereby prevent the breaking of an element caused by an avalanche breakdown.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: December 5, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tatsuo Nakayama, Hironobu Miyamoto, Yasuhiro Okamoto, Yoshinao Miura, Takashi Inoue
  • Patent number: 9831339
    Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: November 28, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Tatsuo Nakayama, Hironobu Miyamoto, Ichiro Masumoto, Yasuhiro Okamoto, Shinichi Miyake, Hiroshi Kawaguchi
  • Publication number: 20170294538
    Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Tatsuo NAKAYAMA, Hironobu MIYAMOTO, Ichiro MASUMOTO, Yasuhiro OKAMOTO, Shinichi MIYAKE, Hiroshi KAWAGUCHI
  • Publication number: 20170288046
    Abstract: A property of a semiconductor device (high electron mobility transistor) is improved. A semiconductor device having a buffer layer, a channel layer, an electron supply layer, a mesa type cap layer, a source electrode, a drain electrode and a gate insulating film covering the cap layer, and a gate electrode formed on the gate insulating film, is configured as follows. The cap layer and the gate electrode are separated from each other by the gate insulating film, and side surfaces of the cap layer, the side surfaces being closer to the drain electrode and the source electrode, have tapered shapes. For example, a taper angle (?1) of the side surface of the cap layer (mesa portion) is equal to or larger than 120 degrees. By this configuration, a TDDB life can be effectively improved, and variation in an ON-resistance can be effectively suppressed.
    Type: Application
    Filed: March 20, 2017
    Publication date: October 5, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Hironobu MIYAMOTO, Yasuhiro OKAMOTO, Hiroshi KAWAGUCHI, Tatsuo NAKAYAMA
  • Patent number: 9763564
    Abstract: The introducing apparatus comprises the operating section, which is easy to grip and easy to operate, mounted therein by providing the dial of the operation element to perform a bending operation of the bending section and a part of the rotary mechanism alone while avoiding an operation range of the operating section for fingers of a gripping hand.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: September 19, 2017
    Assignee: OLYMPUS CORPORATION
    Inventors: Yasuhiro Okamoto, Keijiro Omoto
  • Patent number: 9761682
    Abstract: In order to improve the characteristics of a semiconductor device including: a channel layer and a barrier layer formed above a substrate; and a gate electrode arranged over the barrier layer via a gate insulating film, the semiconductor device is configured as follows. A silicon nitride film is provided over the barrier layer between a source electrode and the gate electrode, and is also provided over the barrier layer between a drain electrode and the gate electrode GE. The surface potential of the barrier layer is reduced by the silicon nitride film, thereby allowing two-dimensional electron gas to be formed. Thus, by selectively forming two-dimensional electron gas only in a region where the silicon nitride film is formed, a normally-off operation can be performed even if a trench gate structure is not adopted.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: September 12, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yasuhiro Okamoto
  • Patent number: 9748225
    Abstract: The ringing of a switching waveform of a semiconductor device is restrained. For example, an interconnect (L5) is laid which functions as a source of a power transistor (Q3) and a cathode of a diode (D4), and further functioning as a drain of a power transistor (Q4) and an anode of a diode (D3). In other words, a power transistor and a diode coupled to this power transistor in series are formed in the same semiconductor chip; and further an interconnect functioning as a drain of the power transistor and an interconnect functioning as an anode of the diode are made common to each other. This structure makes it possible to decrease a parasite inductance between the power transistor and the diode coupled to each other in series.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: August 29, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshinao Miura, Hironobu Miyamoto, Yasuhiro Okamoto
  • Patent number: 9722062
    Abstract: The characteristics of a semiconductor device are improved. A semiconductor device has a potential fixed layer containing a p type impurity, a channel layer, and a barrier layer, formed over a substrate, and a gate electrode arranged in a trench penetrating through the barrier layer, and reaching some point of the channel layer via a gate insulation film. Source and drain electrodes are formed on opposite sides of the gate electrode. The p type impurity-containing potential fixed layer has an inactivated region containing an inactivating element such as hydrogen between the gate and drain electrodes. Thus, while raising the p type impurity (acceptor) concentration of the potential fixed layer on the source electrode side, the p type impurity of the potential fixed layer is inactivated on the drain electrode side. This can improve the drain-side breakdown voltage while providing a removing effect of electric charges by the p type impurity.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: August 1, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Tatsuo Nakayama, Hironobu Miyamoto, Ichiro Masumoto, Yasuhiro Okamoto, Shinichi Miyake, Hiroshi Kawaguchi
  • Publication number: 20170202440
    Abstract: An insertion apparatus includes: a flexible tube; an electric driving source arranged on a proximal end side of the flexible tube; a driven portion arranged on a distal end of the flexible tube; and a single driving force transmitting member inserted in the flexible tube and formed by being wound in a coil shape. For the driving force transmitting member, first torsional rigidity in a first rotating state of being rotated in a direction of being wound in the coil shape is set higher than second torsional rigidity in a second rotating state of being rotated in an opposite direction; and the driven portion performs a first motion by the first rotating state and performs a second motion requiring a larger amount of force than the first motion by the second rotating state.
    Type: Application
    Filed: April 5, 2017
    Publication date: July 20, 2017
    Applicant: OLYMPUS CORPORATION
    Inventor: Yasuhiro OKAMOTO
  • Publication number: 20170186880
    Abstract: A MISFET is formed to include: a co-doped layer that is formed over a substrate and has an n-type semiconductor region and a p-type semiconductor region; and a gate electrode formed over the co-doped layer via a gate insulation film. The co-doped layer contains a larger amount of Mg, a p-type impurity, than that of Si, an n-type impurity. Accordingly, the carriers (electrons) resulting from the n-type impurities (herein, Si) in the co-doped layer are canceled by the carriers (holes) resulting from p-type impurities (herein, Mg), thereby allowing the co-doped layer to serve as the p-type semiconductor region. Mg can be inactivated by introducing hydrogen into, of the co-doped layer, a region where the n-type semiconductor region is to be formed, thereby allowing the region to serve as the n-type semiconductor region. By thus introducing hydrogen into the co-doped layer, the p-type semiconductor region and the n-type semiconductor region can be formed in the same layer.
    Type: Application
    Filed: November 29, 2016
    Publication date: June 29, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Tatsuo NAKAYAMA, Hironobu MIYAMOTO, Yasuhiro OKAMOTO
  • Publication number: 20170172386
    Abstract: An endoscope operation mechanism includes: a dial operating an endoscope function; a detection sensor that has a sensor rotation shaft to which rotation of a dial rotation shaft of the dial is transmitted and detects the rotation amount, and that outputs an electrical signal in accordance with the detected rotation amount to a control portion performing driving control of a driving source of the endoscope function; an initial position reversion mechanism applying a rotational force to the dial rotation shaft in an opposite direction to the direction in which the dial rotation shaft is rotated, to thereby cause the rotational position of the dial to return to an initial position; and a switching mechanism switchable between a first state in which a rotational force from the initial position reversion mechanism is applied to the dial rotation shaft, and a second state in which the rotational force is not applied.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 22, 2017
    Applicant: OLYMPUS CORPORATION
    Inventor: Yasuhiro OKAMOTO
  • Publication number: 20170162683
    Abstract: A semiconductor device includes a first nitride semiconductor layer formed over a substrate, a second nitride semiconductor layer formed over the first nitride semiconductor layer, a third nitride semiconductor layer formed over the second nitride semiconductor layer, a fourth nitride semiconductor layer formed over the third nitride semiconductor layer, a trench that penetrates the fourth nitride semiconductor layer and reaches as far as the third nitride semiconductor layer, a gate electrode disposed by way of a gate insulation film in the trench, a first electrode and a second electrode formed respectively over the fourth nitride semiconductor layer on both sides of the gate electrode, and a coupling portion for coupling the first electrode and the first nitride semiconductor layer.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 8, 2017
    Inventors: Tatsuo NAKAYAMA, Hironobu MIYAMOTO, Yasuhiro OKAMOTO, Yoshinao MIURA, Takashi INOUE