Patents by Inventor Yasuhiro Sugaya

Yasuhiro Sugaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040226744
    Abstract: A module with a built-in circuit component of the present invention includes an electric insulating layer, a pair of wiring layers provided on both principal planes of the electric insulating layer, a plurality of via conductors electrically connecting the pair of wiring layers and passing through the electric insulating layer in a thickness direction thereof, and a circuit component buried in the electric insulating layer, wherein the plurality of via conductors are disposed in a circumferential portion of the electric insulating layer in accordance with a predetermined rule. The plurality of via conductors are placed at an interval, for example, so as to form at least one straight line, in a cut surface of the electric insulating layer in a direction parallel to a principal plane thereof.
    Type: Application
    Filed: May 12, 2004
    Publication date: November 18, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshiyuki Asahi, Yutaka Taguchi, Yasuhiro Sugaya, Seiichi Nakatani, Toshio Fujii
  • Publication number: 20040194999
    Abstract: A wiring board that allows the high-density connection with a plurality of circuit boards within a limited area, a manufacturing method for the same and electronic equipment using the same are provided. A wiring board includes: a plurality of conductive layers each including one or more wirings for transmitting signals; and a plurality of insulation layers for insulating the respective conductive layers. The conductive layers and the insulation layers are laminated alternately, and each of the plurality of conductive layers is provided with a terminal at at least one of both ends. The terminals are formed stepwise and separated by the insulation layers in a cross-sectional shape of a lamination structure of the conductive layers and the insulation layers.
    Type: Application
    Filed: April 1, 2004
    Publication date: October 7, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiro Tomita, Tadashi Nakamura, Yukihiro Ishimaru, Yasuhiro Sugaya, Kazuyoshi Honda, Sadayuki Okazaki
  • Publication number: 20040191491
    Abstract: A transfer sheet of the present invention includes a resin film having a glass transition temperature of not lower than 60° C., a silicone resin layer formed on the resin film, and a metal wiring pattern formed on the silicone resin layer. The metal wiring pattern has an exposed face that forms a roughened face, and the roughened face has a ten-point average surface roughness (Rz) of 2 &mgr;m or more, while a face of the wiring pattern, which is in contact with the silicone resin layer, has a surface roughness (Rz) lower than that of the exposed face. Thereby, the present invention provides a transfer sheet that has improved transfer performance for enabling transferring at low temperature, and improved dimensional stability and also a via-connection reliability. The present invention provides also a wiring board using the transfer sheet and a method of manufacturing the same.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 30, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuhiro Sugaya, Hiroyuki Ishitomi, Seiichi Nakatani
  • Patent number: 6798121
    Abstract: At least two electric elements (203) such as semiconductor chips or surface acoustic wave devices are mounted on wiring patterns (201), and the electric elements (203) are sealed with a thermosetting resin composition (204). An upper surface of the at least two electric elements (203) and an upper surface of the thermosetting resin composition (204) are abraded at the same time, thereby forming surfaces substantially flush with each other. Since they are abraded while being sealed with the thermosetting resin composition (204), it is possible to reduce the thickness without damaging the electric elements (203). Also, the electric elements (203) and the wiring patterns (201) can be prevented from being contaminated by an abrasive liquid. In this manner, it is possible to obtain an electric element built-in module whose thickness can be reduced while maintaining its mechanical strength.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: September 28, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Yoshihiro Bessho, Yasuhiro Sugaya, Keiji Onishi
  • Patent number: 6784530
    Abstract: A circuit component built-in module includes: a first electrical insulating substrate made of a mixture containing an inorganic filler and a thermosetting resin; a plurality of wiring patterns formed at least on a principal surface of the first electrical insulating substrate; a semiconductor chip incorporated in the first electrical insulating substrate and connected electrically with the wiring patterns; and inner vias electrically connecting the plurality of wiring patterns with one another, the inner vias passing through the first electrical insulating substrate. In the circuit component built-in module, the semiconductor chip has a thickness of not less than 30 &mgr;m and not more than 100 &mgr;m, and has a non-wired surface ground, and the circuit component built-in module has a thickness in a range of not less than 80 &mgr;m and not more than 200 &mgr;m.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: August 31, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu, Yoshiyuki Yamamoto, Seiichi Nakatani, Satoru Yuhaku, Kazuo Ohtani
  • Publication number: 20040160752
    Abstract: An electronic component built-in module according to the present invention includes a pair of opposed circuit substrates, each of which includes a wiring pattern and an insulating base material containing a resin, an insulating layer that is placed between the pair of circuit substrates and contains an inorganic filler and a resin composition containing a thermosetting resin, an electronic component that is embedded in the insulating layer, and an inner via that is provided in the insulating layer so as to make an electrical connection between wiring patterns provided on different circuit substrates. A glass transition temperature Tg1 of the resin composition contained in the insulating layer and a glass transition temperature Tg2 of the insulating base material included in each of the circuit substrates satisfy a relationship Tg1>Tg2.
    Type: Application
    Filed: February 9, 2004
    Publication date: August 19, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO.
    Inventors: Yoshihisa Yamashita, Koichi Hirano, Yasuhiro Sugaya, Toshiyuki Asahi, Seiichi Nakatani
  • Publication number: 20040158980
    Abstract: A component built-in module including a core layer formed of an electric insulating material, and an electric insulating layer and a plurality of wiring patterns, which are formed on at least one surface of the core layer. The electric insulating material of the core layer is formed of a mixture including at least an inorganic filler and a thermosetting resin. At least one or more of active components and/or passive components are contained in an internal portion of the core layer. The core layer has a plurality of wiring patterns and a plurality of inner vias formed of a conductive resin. The electric insulating material formed of the mixture including at least an inorganic filler and a thermosetting resin of the core layer has a modulus of elasticity at room temperature in the range from 0.6 GPa to 10 GPa. Thus, it is possible to provide a thermal conductive component built-in module capable of filling the inorganic filler with high density; burying the active component such as a semiconductor etc.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 19, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu
  • Publication number: 20040145044
    Abstract: A circuit component built-in module includes: a first electrical insulating substrate made of a mixture containing an inorganic filler and a thermosetting resin; a plurality of wiring patterns formed at least on a principal surface of the first electrical insulating substrate; a semiconductor chip incorporated in the first electrical insulating substrate and connected electrically with the wiring patterns; and inner vias electrically connecting the plurality of wiring patterns with one another, the inner vias passing through the first electrical insulating substrate. In the circuit component built-in module, the semiconductor chip has a thickness of not less than 30 &mgr;m and not more than 100 &mgr;m, and has a non-wired surface ground, and the circuit component built-in module has a thickness in a range of not less than 80 &mgr;m and not more than 200 &mgr;m.
    Type: Application
    Filed: January 7, 2004
    Publication date: July 29, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu, Yoshiyuki Yamamoto, Seiichi Nakatani, Satoru Yuhaku, Kazuo Ohtani
  • Patent number: 6734542
    Abstract: A component built-in module including a core layer formed of an electric insulating material, and an electric insulating layer and a plurality of wiring patterns, which are formed on at least one surface of the core layer. The electric insulating material of the core layer is formed of a mixture including at least an inorganic filler and a thermosetting resin. At least one or more of active components and/or passive components are contained in an internal portion of the core layer. The core layer has a plurality of wiring patterns and a plurality of inner vias formed of a conductive resin. The electric insulating material formed of the mixture including at least an inorganic filler and a thermosetting resin of the core layer has a modulus of elasticity at room temperature in the range from 0.6 GPa to 10 GPa. Thus, it is possible to provide a thermal conductive component built-in module capable of filling the inorganic filler with high density; burying the active component such as a semiconductor etc.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: May 11, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu
  • Publication number: 20040084769
    Abstract: A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.
    Type: Application
    Filed: October 24, 2003
    Publication date: May 6, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu, Yoshiyuki Yamamoto, Seiichi Nakatani
  • Publication number: 20040040740
    Abstract: At least two electric elements (203) such as semiconductor chips or surface acoustic wave devices are mounted on wiring patterns (201), and the electric elements (203) are sealed with a thermosetting resin composition (204). An upper surface of the at least two electric elements (203) and an upper surface of the thermosetting resin composition (204) are abraded at the same time, thereby forming surfaces substantially flush with each other. Since they are abraded while being sealed with the thermosetting resin composition (204), it is possible to reduce the thickness without damaging the electric elements (203). Also, the electric elements (203) and the wiring patterns (201) can be prevented from being contaminated by an abrasive liquid. In this manner, it is possible to obtain an electric element built-in module whose thickness can be reduced while maintaining its mechanical strength.
    Type: Application
    Filed: September 3, 2003
    Publication date: March 4, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Yoshihiro Bessho, Yasuhiro Sugaya, Keiji Onishi
  • Patent number: 6696139
    Abstract: A green sheet including a binder containing an acrylic resin having no polar group and a ceramics material in powder is prepared, and connection via are formed in the green sheet. Further, a conductor layer having virtually no voids is placed on the green sheet and a mask is also placed on the conductor layer. Then, the conductor layer is patterned by wet-etching so that wiring is formed thereon. A plurality of the green sheets thus formed are laminated, and a binding sheet, which contains an inorganic composition that has virtually no sintering shrinkage at the firing temperature of the multi-layered body as a main component, is formed on either both surfaces or one surface of the laminated body, and this is then fired, and thereafter, the binding sheet is removed.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: February 24, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Osamu Inoue, Junichi Kato
  • Publication number: 20040026361
    Abstract: A surface acoustic wave device which occupies a small mounting area and has a low profile, yet having an improved reliability, and can be made available at low cost. The surface acoustic wave device comprises a piezoelectric substrate 1, a function region 2 formed of comb-like electrodes for exciting surface acoustic wave provided on a main surface of the piezoelectric substrate 1, a space formation member 3 covering the function region 2, a plurality of bump electrodes 4 provided on a main surface of the piezoelectric substrate 1 and a terminal electrode 5 provided opposed to the main surface of piezoelectric substrate 1. The bump electrode 4 and the terminal electrode 5 are having a direct electrical connection, and a space between piezoelectric substrate 1 and terminal electrode 5 is filled with resin 6.
    Type: Application
    Filed: August 15, 2003
    Publication date: February 12, 2004
    Inventors: Akihiko Namba, Keiji Onishi, Yasuhiro Sugaya, Katsunori Moritoki
  • Publication number: 20040001661
    Abstract: A light reception/emission device built-in module with optical and electrical wiring combined therein includes: an optical waveguide layer including a core portion and a cladding portion; first and second wiring patterns formed on a main surface of the optical waveguide layer; a light reception device disposed inside the optical waveguide layer, the light reception device being optically connected with the core portion of the optical waveguide layer and being electrically connected with the first wiring pattern; and a light emission device disposed inside the optical waveguide layer, the light emission device being optically connected with the core portion of the optical waveguide layer and being electrically connected with the second wiring pattern. With this configuration, optical coupling between the optical waveguide and the light reception/emission device can be conducted precisely.
    Type: Application
    Filed: June 20, 2003
    Publication date: January 1, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyoshi Ogura, Yasuhiro Sugaya, Toshiyuki Asahi, Tousaku Nishiyama, Yoshinobu Idogawa
  • Publication number: 20030189246
    Abstract: A semiconductor built-in millimeter-wave band module includes: an insulating substrate made of a mixture containing an inorganic filler and a thermosetting resin; a high thermal conductivity substrate made of a dielectric material having thermal conductivity higher than the insulating substrate and laminated on one surface of the insulating substrate; a plurality of wiring patterns formed on the high thermal conductivity substrate and the insulating substrate; a semiconductor device operating at millimeter-wave band, which is arranged inside of the insulating substrate, is packaged on the high thermal conductivity substrate in a face-up manner, and is connected electrically with the wiring patterns; and a distributed constant circuit element and an active element provided on the semiconductor device. In this module, a void is provided inside of the insulating substrate and in the vicinity of a surface of the distributed constant circuit element and the active element.
    Type: Application
    Filed: April 2, 2003
    Publication date: October 9, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyosi Ogura, Yasuhiro Sugaya, Toshiyuki Asahi, Tousaku Nishiyama, Yoshinobu Idogawa
  • Publication number: 20030141105
    Abstract: A circuit component built-in module capable of mounting the circuit component with high density and having high heat releasing property and the high reliability. The circuit component built-in module 100 includes the insulating substrate 101 made of a first mixture 105 and a second mixture 106, wiring patterns 102a and 102b formed on one principal surface and another principal surface of the insulating substrate 101, a circuit component 103a electrically connected to the wiring pattern 102a and sealed with the second mixture 106 in an internal portion of the insulating substrate 101, the inner via conductor 104 electrically connecting the wiring pattern 102a and 102b.
    Type: Application
    Filed: January 9, 2003
    Publication date: July 31, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuhiro Sugaya, Koichi Hirano, Seiichi Nakatani, Yasuyuki Matsuoka, Satoru Yuuhaku, Toshiyuki Asahi
  • Publication number: 20030141948
    Abstract: A dielectric filter includes resonator electrodes, an inter-stage coupling capacitor electrode, and an input/output coupling capacitor electrode on dielectric substrates, respectively. The resonator electrodes are electro-magnetically coupled to each other to form a tri-plate structure, are made of a metallic foil embedded in a resonator dielectric substrate. Another dielectric filter includes an upper shield electrode dielectric substrate, an inter-stage coupling capacitor dielectric substrate, a resonator dielectric substrate, and an input/output coupling capacitor dielectric substrate which are made of a composite dielectric material including a high-dielectric-constant material and a low-dielectric-constant material. The above described arrangement provides the dielectric filter with an improved Q factor of a resonator, a low loss, and a high attenuation.
    Type: Application
    Filed: February 10, 2003
    Publication date: July 31, 2003
    Inventors: Tomoya Maekawa, Yasuhiro Sugaya, Toru Yamada, Toshio Ishizaki
  • Publication number: 20030141006
    Abstract: A green sheet including a binder containing an acrylic resin having no polar group and a ceramics material in powder is prepared, and connection via are formed in the green sheet. Further, a conductor layer having virtually no voids is placed on the green sheet and a mask is also placed on the conductor layer. Then, the conductor layer is patterned by wet-etching so that wiring is formed thereon. A plurality of the green sheets thus formed are laminated, and a binding sheet, which contains an inorganic composition that has virtually no sintering shrinkage at the firing temperature of the multi-layered body as a main component, is formed on either both surfaces or one surface of the laminated body, and this is then fired, and thereafter, the binding sheet is removed.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 31, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Osamu Inoue, Junichi Kato
  • Publication number: 20030137045
    Abstract: A circuit component built-in module includes: a first electrical insulating substrate made of a mixture containing an inorganic filler and a thermosetting resin; a plurality of wiring patterns formed at least on a principal surface of the first electrical insulating substrate; a semiconductor chip incorporated in the first electrical insulating substrate and connected electrically with the wiring patterns; and inner vias electrically connecting the plurality of wiring patterns with one another, the inner vias passing through the first electrical insulating substrate. In the circuit component built-in module, the semiconductor chip has a thickness of not less than 30 &mgr;m and not more than 100 &mgr;m, and has a non-wired surface ground, and the circuit component built-in module has a thickness in a range of not less than 80 &mgr;m and not more than 200 &mgr;m.
    Type: Application
    Filed: January 17, 2003
    Publication date: July 24, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu, Yoshiyuki Yamamoto, Seiichi Nakatani, Satoru Yuhaku, Kazuo Ohtani
  • Publication number: 20030127725
    Abstract: The present invention provides a metal wiring board in which metal wiring buried in a surface layer of an electrically insulating substrate is adhered to a carrier sheet covering the metal wiring that can be mechanically detached and that can prevent oxidation of the metal wiring. A semiconductor device that uses this substrate is structured so that a metal terminal electrode buried in an electrically insulating substrate is electrically connected to a protruding electrode on a semiconductor element, the protruding electrode has a structure wherein its tip is flattened by mounting the semiconductor element to the substrate, and the portion where the substrate and the semiconductor element are connected is reinforced by an insulating resin structure and formed into a single unit therewith.
    Type: Application
    Filed: December 10, 2002
    Publication date: July 10, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Toshiyuki Asahi, Satoru Yuhaku, Seiichi Nakatani