Abstract: A nitride semiconductor epitaxial substrate includes: a Si substrate; a nitride semiconductor epitaxial layer disposed above the Si substrate; and a mixed crystal layer disposed between the Si substrate and the nitride semiconductor epitaxial layer, and containing Si and a group III metal element, the mixed crystal layer containing a high concentration of C. The mixed crystal layer has a concentration of at least 1.0×10+21 cm?3, and a transition metal element concentration of at most 5.0×10+16 cm?3.

Abstract: A semiconductor device includes: a substrate; a channel layer constituted of a single nitride semiconductor on the substrate; a first barrier layer which is a nitride semiconductor on a part of an upper surface of the channel layer and having a band gap larger than that of the channel layer; a gate layer which is a nitride semiconductor on and in contact with the first barrier layer; a second barrier layer which is a nitride semiconductor in contact with the first barrier layer in an area where the gate layer is not disposed above the channel layer, and having a band gap larger than that of the channel layer and having a thickness or a band gap independent from the first barrier layer; a gate electrode on the gate layer; and a source electrode and a drain electrode spaced apart from the gate layer and on the second barrier layer.

Abstract: A semiconductor device includes: a substrate; a channel layer constituted of a single nitride semiconductor on the substrate; a first barrier layer which is a nitride semiconductor on a part of an upper surface of the channel layer and having a band gap larger than that of the channel layer; a gate layer which is a nitride semiconductor on and in contact with the first barrier layer; a second barrier layer which is a nitride semiconductor in contact with the first barrier layer in an area where the gate layer is not disposed above the channel layer, and having a band gap larger than that of the channel layer and having a thickness or a band gap independent from the first barrier layer; a gate electrode on the gate layer; and a source electrode and a drain electrode spaced apart from the gate layer and on the second barrier layer.

Abstract: A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.

Abstract: A semiconductor device having: a substrate; a nitride semiconductor layer including a first semiconductor layer made of GaN or InxGa1-xN (0<x?1) and formed on the substrate and a second semiconductor layer containing Al and formed on the first semiconductor layer; and a protective film formed on the set of nitride semiconductor layers. The nitride semiconductor layer has an active section and an inactive section surrounding the active section, and a portion of the second semiconductor layer has been removed from the inactive section.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer (1) located over the substrate; a second nitride semiconductor layer (2) located over the first nitride semiconductor layer (1), having a larger band gap than the first nitride semiconductor layer (1), and having a recess (11) penetrating into the first nitride semiconductor layer (1); and a third nitride semiconductor layer (12) continuously covering the second nitride semiconductor layer (2) and the recess (11), and having a larger band gap than the first nitride semiconductor layer (1); a gate electrode (5) located above a portion of the third nitride semiconductor layer (12) over the recess (11); and a first ohmic electrode (4a) and a second ohmic electrode (4b) located on opposite sides of the gate electrode (5).

Abstract: A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.

Abstract: A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the first nitride semiconductor layer, a recess having a bottom portion which reaches the first nitride semiconductor layer through a part of the p-type nitride semiconductor layer, a third nitride semiconductor layer formed to cover the bottom portion of the recess, a side portion of the recess, and a part of an upper surface of the p-type nitride semiconductor layer. The semiconductor device further includes a fourth nitride semiconductor layer formed on the third nitride semiconductor layer, a first electrode formed on another side of the substrate, a gate electrode formed on the upper surface of the p-type nitride semiconductor layer, and a second electrode that is in contact with the third nitride semiconductor layer or the fourth nitride semiconductor layer.

Abstract: A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the first nitride semiconductor layer, a recess having a bottom portion which reaches the first nitride semiconductor layer through a part of the p-type nitride semiconductor layer, a third nitride semiconductor layer formed to cover the bottom portion of the recess, a side portion of the recess, and a part of an upper surface of the p-type nitride semiconductor layer. The semiconductor device further includes a fourth nitride semiconductor layer formed on the third nitride semiconductor layer, a first electrode formed on another side of the substrate, a gate electrode formed on the upper surface of the p-type nitride semiconductor layer, and a second electrode that is in contact with the third nitride semiconductor layer or the fourth nitride semiconductor layer.

Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.

Abstract: A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.

Abstract: An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.

Abstract: A bidirectional switching device includes a semiconductor multilayer structure made of a nitride semiconductor, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor multilayer structure, and a first gate electrode and a second gate electrode. The first gate electrode is covered with a first shield electrode having a potential substantially equal to that of the first ohmic electrode. The second gate electrode is covered with the second shield electrode having a potential substantially equal to that of the second ohmic electrode. An end of the first shield electrode is positioned between the first gate electrode and the second gate electrode, and an end of the second shield electrode is positioned between the second gate electrode and the first gate electrode.

Abstract: A semiconductor device having: a substrate; a nitride semiconductor layer including a first semiconductor layer made of GaN or InxGa1-xN (0<x?1) and formed on the substrate and a second semiconductor layer containing Al and formed on the first semiconductor layer; and a protective film formed on the set of nitride semiconductor layers. The nitride semiconductor layer has an active section and an inactive section surrounding the active section, and a portion of the second semiconductor layer has been removed from the inactive section.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer (1) located over the substrate; a second nitride semiconductor layer (2) located over the first nitride semiconductor layer (1), having a larger band gap than the first nitride semiconductor layer (1), and having a recess (11) penetrating into the first nitride semiconductor layer (1); and a third nitride semiconductor layer (12) continuously covering the second nitride semiconductor layer (2) and the recess (11), and having a larger band gap than the first nitride semiconductor layer (1); a gate electrode (5) located above a portion of the third nitride semiconductor layer (12) over the recess (11); and a first ohmic electrode (4a) and a second ohmic electrode (4b) located on opposite sides of the gate electrode (5).

Abstract: A two-wire AC switch suppressing heat from a bidirectional switch element inside the switch is provided. The two-wire AC switch 100a connected between an AC power supply 101 and a load 102 includes: a bidirectional switch element 103 which flows passing current bi-directionally, selects whether to flow or block the current, is connected in series with the AC power supply 101 and the load 102 to form a closed-loop circuit, and is made of a group-III nitride semiconductor; a full-wave rectifier 104 performing full-wave rectification on power supplied from the AC power supply 101; a power supply circuit 105 smoothing a voltage after the full-wave rectification to generate DC power; a first gate drive circuit 107 and a second gate drive circuit 108 each outputting a control signal to the bidirectional switch element 103; and a control circuit 106 controlling the first and second gate drive circuits 107 and 108.

Abstract: A transistor includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer and has a band gap larger than that of the first semiconductor layer, a control layer formed on the second semiconductor layer and contains p-type impurities, a gate electrode formed in contact with at least part of the control layer and a source electrode and a drain electrode formed on both sides of the control layer, respectively. A third semiconductor layer made of material having a lower etch rate than that of the control layer is formed between the control layer and the second semiconductor layer.

Abstract: A bidirectional switch includes a plurality of unit cells 11 including a first ohmic electrode 15, a first gate electrode 17, a second gate electrode 18, and a second ohmic electrode 16. The first gate electrodes 15 are electrically connected via a first interconnection 31 to a first gate electrode pad 43. The second gate electrodes 18 are electrically connected via a second interconnection 32 to a second gate electrode pad 44. A unit cell 11 including a first gate electrode 17 having the shortest interconnect distance from the first gate electrode pad 43 includes a second gate electrode 18 having the shortest interconnect distance from the second gate electrode pad 44.

Abstract: A semiconductor device includes a first transistor formed on a first element region, and a first protecting element including a second transistor formed on a second element region. A second protecting element ohmic electrode is connected to a first gate electrode, a first protecting element ohmic electrode is connected to a first ohmic electrode, and a first protecting element gate electrode is connected to at least one of the first protecting element ohmic electrode and the second protecting element ohmic electrode. The second element region is smaller in area than the first element region.

Abstract: A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.