Patents by Inventor Yasuko Yoshida

Yasuko Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010011753
    Abstract: A gate electrode of each MISFET is formed on a substrate in an active region whose periphery is defined by an element isolation trench, and crosses the active region so as to extend from one end thereof to the other end thereof. The gate electrode has a gate length in a boundary region defined between the active region and the element isolation trench, which gate length is greater than a gate length in a central portion of the active region. The gate electrode is configured in an H-type flat pattern as a whole. Further, the gate electrode covers the whole of one side extending along a gate-length direction, of the boundary region defined between the active region L and the element isolation trench, and parts of two sides thereof extending along a gate-width direction. The MISFETs are respectively formed in electrically separated wells and are connected in series so as to constitute part of a reference voltage generating circuit.
    Type: Application
    Filed: February 1, 2001
    Publication date: August 9, 2001
    Inventors: Akio Nishida, Noriyuki Yabuoshi, Yasuko Yoshida, Kazuhiro Komori, Sousuke Tsuji, Hideo Miwa, Mitsuhiro Higuchi, Koichi Imato
  • Patent number: 6242323
    Abstract: A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: June 5, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Norio Suzuki, Yasushi Matsuda, Yasuko Yoshida, Hirohiko Yamamoto, Masamichi Kobayashi, Akira Takamatsu, Hirofumi Shimizu, Kazushi Fukuda, Shinichi Horibe, Toshio Nozoe
  • Patent number: 6090684
    Abstract: A shallow groove isolation structure (SGI) electrically insulates adjoining transistors on a semiconductor substrate. A pad oxide film is formed on the semiconductor substrate and an oxidation inhibition film is formed on the pad oxide film. Parts of the oxide inhibition film and pad oxide film are removed to form the groove. In particular, the pad oxide film is removed from an upper edge of the groove within a range of 5 to 40 nm. A region of the groove is oxidized in an oxidation environment with a cast ratio of hydrogen (H.sub.2) to oxygen (O.sub.2) being less than or equal to 0.5. At this ratio, the oxidizing progresses under low stress at the upper groove edges of the substrate thereby enabling rounding of the upper groove edges without creating a level difference at or near the upper groove edge on the substrate surface.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: July 18, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Yasuko Yoshida, Norio Suzuki, Masayuki Kojima, Kota Funayama
  • Patent number: 6083931
    Abstract: The present invention is aimed at providing an anticancer agent which can inhibit the metastasis of cancer cells when used alone. In addition, the present invention is also aimed at providing an anticancer agent which can inhibit the metastasis of cancer cells while causing a small side effect and very small toxicity even for an extended time of administration. The cancer metastasis-inhibiting anticancer agent according to the present invention is characterized by containing sialic acid, its salt, a polymer of sialic acid or a salt of the polymer as an effective ingredient.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: July 4, 2000
    Assignees: NGK Insulators, Ltd., Biseiken Co., Ltd.
    Inventors: Takaaki Hasegawa, Kenichi Miyamoto, Mitsuo Kawase, Yasuko Yoshida, Tadahiko Inukai
  • Patent number: 6057241
    Abstract: A silicon oxide film 2 which is exposed from a side wall of a groove 4a is etched to displace the silicon oxide film 2 backward toward an active region. The displacement amount is set to be equal to or more than a film thickness (Tr) of a silicon oxide film 5 to be formed on an inner wall of the groove 4a in a later thermal oxidation step and equal to or less than twice the film thickness (Tr) thereof. A shoulder portion of the groove 4a can be rounded by a low-temperature heat treatment at 1000.degree. C. or less, by controlling a heat treatment period such that the film thickness (Tr) of the silicon oxide film 5 is more than the film thickness (Tp) of the silicon oxide film 2 and equal to or less than three times the film thickness (Tr) thereof (Tp<Tr.ltoreq.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: May 2, 2000
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Yasushi Matsuda, Hideo Miura, Hirohiko Yamamoto, Masamichi Kobayashi, Shuji Ikeda, Akira Takamatsu, Norio Suzuki, Hirofumi Shimizu, Yasuko Yoshida, Kazushi Fukuda, Shinichi Horibe, Toshio Nozoe
  • Patent number: 5939404
    Abstract: The present invention relates to the technology for inhibiting the cancer metastasis, and is aimed at the provision of a pharmaceutical composition for effectively inhibiting the metastasis of the cancer. A cancer metastasis inhibitor according to the present invention is characterized by containing a sugar chain separated from a surface of a Streptococcus agalactiae Ia type or Ib type as a main ingredient. Since the surface sugar chains of the Streptococcus agalactiae Ia type or Ib type have structures similar to surface sugar chains of the cancer cells, the former surface sugar chains adhere to E-selectin appearing in an intravascular endothelial cell, competitively inhibit the adhesion between intravascular endothelial cells and the cancer cells, and effectively prevent of the metastasis of the cancer, when the sugar chains exist in blood of a patient.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: August 17, 1999
    Assignee: NGK Insulators, Ltd.
    Inventors: Shinji Iijima, Katsuhide Miyake, Shin Yamamoto, Yasuko Yoshida, Mitsuo Kawase
  • Patent number: 5880497
    Abstract: A SRAM having its memory cell constructed to include transfer MISFETs to be controlled by word lines and a flip-flop circuit having driver MISFETs and load MISFETs. Plate electrodes of large area fixed on predetermined power source lines are arranged over the load MISFETs such that the plate electrodes over the offset region of the load MISFETs are formed with an opening. A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer MISFETs and the driver MISFETs formed over the main surface of a semiconductor substrate and the load MISFETs formed of a polycrystalline silicon film deposited on the driver MISFETs.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: March 9, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Ikeda, Koichi Imato, Kazuo Yoshizaki, Kohji Yamasaki, Soichiro Hashiba, Keiichi Yoshizumi, Yasuko Yoshida, Kousuke Okuyama, Mitsugu Oshima, Kazushi Tomita, Tsuyoshi Tabata, Kazushi Fukuda, Junichi Takano, Toshiaki Yamanaka, Chiemi Hashimoto, Motoko Kawashima, Fumiyuki Kanai, Takashi Hashimoto
  • Patent number: 5780328
    Abstract: When the source and drain regions (an n.sup.- type semiconductor region and an n.sup.+ type semiconductor region) of a complementary MISFET and a p-type semiconductor region for use as a punch-through stopper are formed in a p-type well in a substrate having a p- and an n-type well, p-type impurities for the punch-through stopper are suppressed from being supplied to the feeding portion (an n.sup.+ type semiconductor region) of the n-type well.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: July 14, 1998
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Co., Ltd.
    Inventors: Kazushi Fukuda, Yasuko Yoshida, Yutaka Hoshino, Naotaka Hashimoto, Kyoichiro Asayama, Yuuki Koide, Keiichi Yoshizumi, Eri Okamoto, Satoru Haga, Shuji Ikeda
  • Patent number: 5508540
    Abstract: A SRAM having its memory cell constructed to include transfer MISFETs to be controlled by word lines and a flip-flop circuit having driver MISFETs and load MISFETs. Plate electrodes of large area fixed on predetermined power source lines are arranged over the load MISFETs such that the plate electrodes over the offset region of the load MISFETs are formed with an opening. A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer MISFETs and the driver MISFETs formed over the main surface of a semiconductor substrate and the load MISFETs formed of a polycrystalline silicon film deposited on the driver MISFETs.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: April 16, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Ikeda, Koichi Imato, Kazuo Yoshizaki, Kohji Yamasaki, Soichiro Hashiba, Keiichi Yoshizumi, Yasuko Yoshida, Kousuke Okuyama, Mitsugu Oshima, Kazushi Tomita, Tsuyoshi Tabata, Kazushi Fukuda, Junichi Takano, Toshiaki Yamanaka, Chiemi Hashimoto, Motoko Kawashima, Fumiyuki Kanai, Takashi Hashimoto
  • Patent number: 5408601
    Abstract: A graphic editor for performing various editing processes such as inputting, moving, copying, and deleting a graphic pattern and a line on a display screen in a graphic editing system such as a CAD, etc. The graphic editor realizes a user interface for simultaneously selecting an object to be processed and a function, thus improving the efficiency of the editing operation. The editor comprises an area specifier for specifying an area as a rectangle having a diagonal whose start and end points are specified by the area specifier, and a graphic operating unit for determining the existence of a symbol or a line in a specified area to give a predetermined process on the symbol or the line. The predetermined processes can be identified by determining whether or not a symbol and/or a whole or a part of a line exists in or crosses a specified area.
    Type: Grant
    Filed: July 5, 1994
    Date of Patent: April 18, 1995
    Assignee: Fujitsu Limited
    Inventors: Takeo Nakamura, Syuichiro Yamada, Yasuko Yoshida
  • Patent number: 5143847
    Abstract: An enzyme-fixed bioreactor, including a reaction column, enzyme-fixed catalyst particles uniformly and densely filled in the reaction column, the catalyst particles being composed of carrier sepiolite particles consisting essentially of sepiolite and an enzyme carried on the surface of the carrier sepiolite particles. The bioreactor has stable heat resistant and chemical properties, high productivity, and is economically superior to prior art, without fear of destruction of the catalyst, short path, and clogging in the reaction column.
    Type: Grant
    Filed: November 27, 1989
    Date of Patent: September 1, 1992
    Assignee: NGK Insulators, Ltd.
    Inventors: Mitsuo Kawase, Yasuko Yoshida, Hitoshi Yonekawa