Patents by Inventor Yasuo Kobayashi

Yasuo Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6051281
    Abstract: A method of forming a titanium film and a titanium nitride film on a substrate by lamination which method is capable of suppressing contamination of the substrate due to the by-product and of reducing a contact resistance value of the titanium film. By carrying out the step of forming a titanium film on a surface of a substrate, the step of subjecting the substrate to the plasma processing in an atmosphere of the mixed gas of nitrogen gas and hydrogen gas, thereby nitriding a surface layer of the titanium film to form thereon a nitride layer, and the step of forming a barrier film (e.g., a titanium nitride film) on the titanium film having the nitride layer formed thereon, both the titanium film and the titanium nitride film are formed on the substrate by lamination.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: April 18, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Yasuo Kobayashi, Kunihiro Tada, Hideki Yoshikawa
  • Patent number: 5851600
    Abstract: Plasma processing gas is introduced into an upper portion of a processing vessel and a film-formation gas is simultaneously introduced into the vicinity of a substrate to be processed. The plasma processing gas is ionized to form a first plasma and any of the plasma processing gas that has temporarily recombined in locations close to the substrate to be processed is re-ionized as a second plasma. As a result, the density of etchant ions used for cutting away overhangs around the openings of grooves can be increased. In other words, the number of etchant ions can be increased. This makes it possible to reduce the bias voltage applied to the substrate to be processed, preventing damage thereto.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: December 22, 1998
    Assignee: Tokyo Electron, Ltd.
    Inventors: Yasuhiro Horiike, Yasuo Kobayashi
  • Patent number: 5698036
    Abstract: A plasma processing apparatus comprises a processing container, a waveguide tube for guiding microwaves generated by a microwave generator, and a flat antenna member connected to the wave guide and disposed in the container to face a semiconductor wafer supported in the container. The antenna includes a plurality of short slits concentrically or spirally arranged in the antenna. The slits are spaced apart in the widthwise direction at intervals of 5% to 50% of a guide wavelength of the microwave, and each of the slits has a length of +30% of the guide wavelength centered with respect to half of the guide wavelength.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: December 16, 1997
    Assignees: Tokyo Electron Limited, Naohisa Goto, Makoto Ando, Junichi Takada, Yasuhiro Horike
    Inventors: Nobuo Ishii, Yasuo Kobayashi, Naohisa Goto, Makoto Ando, Junichi Takada, Yasuhiro Horike
  • Patent number: 5684445
    Abstract: A power transformer is formed of a pair of cores having wiring storage portions, at least one primary winding formed of a spirally wound flat ring having a pair of primary leading portions, at least one secondary winding formed of a flat plate, at least one spacer interposed between the flat ring and the flat plate, and an insulation member mounted in the wiring storage portions of the cores. The flat ring, flat plate and at least one spacer for insulating the flat ring and the flat plate are housed in the insulation member. The insulation member has an opening for allowing the primary leading portions to pass therethrough. In order to insulate the primary leading portions from burrs of the secondary winding, a protrusion may be formed on an outer periphery of the spacer to be located under the primary leading portions, or a cut-out portion may be formed in the flat plate.
    Type: Grant
    Filed: March 12, 1996
    Date of Patent: November 4, 1997
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yasuo Kobayashi, Koichi Ueki
  • Patent number: 5479329
    Abstract: In a switching power supply, electric current is supplied through a switching device to a load located away from the switching power supply. The electric current at the load is detected by a remote detecting device at remote detecting terminals. The remote detecting device includes a differential amplifier and a comparator connected to an output terminal of the differential amplifier. The comparator compares an output voltage of the differential amplifier with a reference voltage and outputs an alarm signal when the output voltage of the differential amplifier is lower than the reference voltage. A control device is connected to the switching device, the output terminal of the remote detecting device and a first reference voltage supply device. The control device changes ON-OFF duty ratio of the switching device by comparing the output voltage of the differential amplifier with the first reference voltage to control an output voltage of the switching device at a predetermined value.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: December 26, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masahiro Motonobu, Koichi Ueki, Yasuo Kobayashi
  • Patent number: 5334302
    Abstract: A magnetron sputtering apparatus which includes a vacuum chamber, a plurality of sputtering guns, arranged in the vacuum chamber, for emitting sputter particles, a support member for supporting an object to be processed, on which a thin film is to be formed within the vacuum chamber, and a movement mechanism for moving the sputtering guns and the support member relative to each other, wherein sputter particles sputtered from the target by the plasma produced in the recess are deposited on the object to be processed. Each sputtering gun includes a target having a recess, a sputtering gas supplying pass for supplying a sputtering gas into the recess, an electric field producing mechanism for producing an electric field in the recess, thereby generating a plasma of the sputtering gas, and a magnetic field producing mechanism for production, in the recess, of a magnetic field including a component which crosses the electric field at right angles.
    Type: Grant
    Filed: November 13, 1992
    Date of Patent: August 2, 1994
    Assignee: Tokyo Electron Limited
    Inventors: Kenichi Kubo, Yasuo Kobayashi, Koji Koizumi
  • Patent number: 5327388
    Abstract: A semiconductor memory device with a power source voltage step-down circuit which generates a stepped-down voltage from electric power supplied from outside and supplies this stepped-down voltage to a memory cell array and peripheral circuits. Current switching device interposed in a circuit or circuits of the semiconductor memory device other than the memory cell array and a switch controlling signal generating means for generating a controlling signal in response to a signal from the outside are provided. The current switching device performs switching of current to flow through the circuit in response to a controlling signal.
    Type: Grant
    Filed: September 29, 1992
    Date of Patent: July 5, 1994
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 5295114
    Abstract: A semiconductor memory device has regular memory cells arranged in rows and columns, and at least one of the rows is replaced with redundant memory cells when one of the regular memory cells in the row is defective, wherein a fuse element is broken for isolating a power supply line associated with the row from a main power supply line so that a defective memory cell does not consume any current, thereby improving the power consumption of the semiconductor memory device.
    Type: Grant
    Filed: November 15, 1991
    Date of Patent: March 15, 1994
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 5051955
    Abstract: A semiconductor memory device capable of reading out stored data at high speed and with low power consumption includes a sense amplifier for amplifying a data signal stored in a selected memory cell, a data latch circuit for latching the output signal of the sense amplifier, a switching circuit for outputting the output signal of the data latch circuit, and an output circuit for receiving the output signal of the sense amplifier and the output signal of the switching circuit and generating a data output signal. It also includes at the power supply side, switching means for keeping the sense amplifier in an operative state as long as data signal is amplified in response to a sense enable signal.
    Type: Grant
    Filed: June 26, 1990
    Date of Patent: September 24, 1991
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 5030867
    Abstract: The present invention discloses a same polarity induction generator comprising a casing, a stator composed of a plurality of magnetic poles spaced away at a predetermined mechanical angle, a rotary shaft, a rotor mounted on said rotary shaft and composed of two pairs of ferrite magnets each pair having one polarity located outwardly of a circumference of the rotor and the other polarity located inwardly of the circumference, the respective pairs being arranged so as to have different polarities on the outer circumference of the rotor, magnetic cores fixedly mounted on the casing, and coil wirings each wound around said respective magnetic cores so as to intersect magnetic fluxes formed among said ferrite magnets.
    Type: Grant
    Filed: October 25, 1989
    Date of Patent: July 9, 1991
    Assignee: Technical Associate Co., Ltd.
    Inventors: Yasuharu Yamada, Yasuo Kobayashi
  • Patent number: 4991074
    Abstract: A lighting lamp having a display sheet laminated on the surface of a bulb thereof, said display sheet comprising a support having laminated thereon a light-susceptible layer including an active layer containing at least one of a dye and a pigment capable of coloring, fading, or discoloring by the action of an active light and an adhesive layer formed on the surface of the light-susceptible layer such that the portion corresponding to at least the display portion thereof is exposed, and being laminated on the surface of the bulb by the adhesive layer.
    Type: Grant
    Filed: September 8, 1989
    Date of Patent: February 5, 1991
    Assignees: Tomoegawa Paper Co., Ltd., Hitachi Ltd.
    Inventors: Yasuo Kobayashi, Yasuo Hirasawa, Churyo Kodama, Katsumi Miyazaki, Takao Higashi, Masami Yanagisawa, Akinori Sei
  • Patent number: 4954937
    Abstract: A lighting lamp is disclosed, comprising a lamp having laminated on the surface of a bulb thereof a display sheet, said display sheet comprising a support having thereon an active layer containing a pigment which is faded by the action of an active light and an active light-adjusting layer.
    Type: Grant
    Filed: September 8, 1989
    Date of Patent: September 4, 1990
    Assignees: Tomoegawa Paper Co., Ltd., Hitachi Ltd.
    Inventors: Yasuo Kobayashi, Naoki Hagiwara, Taisuke Hirota, Churyo Kodama, Yasuo Hirasawa, Katsumi Miyazaki, Fumio Kawamura, Takao Higashi, Masami Yanagisawa, Akinori Sei
  • Patent number: 4953134
    Abstract: A semiconductor memory device having improved address wiring and address decoding structures is disclosed. The memory device comprises a plurality of address decoders arranged separately, an address buffer for generating "n"-bits of address signals, a set of address wirings coupled to said address buffer and the address decoders, the number of address wirings being "n", and a plurality of inverting circuits provided for the address decoders, each of inverting circuits coupled to the address wirings and being responsive to the signals at the address wirings for generating their complementary signals to be applied to the associated address decoder.
    Type: Grant
    Filed: February 28, 1989
    Date of Patent: August 28, 1990
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 4861282
    Abstract: A waterproof connecting structure for a connector in a hole of a panel is disclosed which comprises connector elements connected to electric cords, respectively, and fitted to each other in an opposed manner; a waterproof grommet provided near one of the connector elements; a connector holder which is secured in the hole in a watertight manner with a first seal on the peripheral portion of the holder and conjoined at one side of the holder to the other one of the connector elements and has an opening and grommet fitting portions at the other side of said holder; and a cover for closing the opening with a second seal in a watertight manner.
    Type: Grant
    Filed: December 7, 1988
    Date of Patent: August 29, 1989
    Assignee: Yazaki Corporation
    Inventors: Yasuo Kobayashi, Masahiko Endo
  • Patent number: 4858188
    Abstract: A static memory which can operate with a small power consumption and produces at an output terminal the same data that is written into a selected memory cell, is disclosed. The memory comprises a memory array, a sense amplifier, a latch circuit for holding data from the sense amplifier and a data-in buffer for generating a buffered input signal, and is featured by a circuit for directly writing the buffered input signal to the latch circuit in a write mode.
    Type: Grant
    Filed: September 8, 1987
    Date of Patent: August 15, 1989
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 4825110
    Abstract: A differential amplifier circuit comprising first and second input lines to which potentials with a slight difference therebetween are to be applied, a series combination of a first load transistor and a first amplifier transistor provided between sources of voltage of high and low levels, a series combination of a second load transistor and a second amplifier transistor provided between the sources of the voltages of high and low levels, and activating means provided in association with the first and second amplifier transistors for activating each of the first and second amplifier transistors when the activating means is actuated, each of the first and second load transistors, the first and second amplifier transistors and the activating transistor having a control terminal, the control terminal of the first amplifier transistor being connected to the first input line and the control terminal of the second amplifier transistor being connected to the second input line, characterized by current cutoff means p
    Type: Grant
    Filed: October 9, 1986
    Date of Patent: April 25, 1989
    Assignee: NEC Corporation
    Inventors: Takashi Yamaguchi, Yasuo Kobayashi
  • Patent number: 4821316
    Abstract: A key telephone system includes a temporary registration memory for temporarily storing operating data and a final registration timing data memory for storing final registration timing data, including a timing condition for transferring contents of the temporary registration memory to the operating data memory. Operating data input by a user and the final registration timing data are written into the temporary registration memory and the final registration timing data memory, respectively, from a data input unit connected to the main unit during a data setting mode. The system discriminates establishment of the timing condition designated in accordance with the final registration timing data stored in the final registration timing data memory, whereupon the operating data stored in the temporary registration memory is transferred to the operating data memory.
    Type: Grant
    Filed: October 2, 1987
    Date of Patent: April 11, 1989
    Assignee: Tamura Electric Works, Ltd.
    Inventors: Senji Okumura, Yasuo Kobayashi, Ryuzo Sugiura, Masatoshi Ikeda
  • Patent number: 4766572
    Abstract: A semiconductor memory is disclosed which attains a data read operation at a high speed with a low power dissipation. The memory includes a sense amplifier amplifying a data signal stored in the selected memory cell, a data latch circuit latching the output signal of the sense amplifier, a switching circuit outputting the output signal of the sense amplifier before the data latch circuit latches the output signal of the sense amplifier and outputting the output signal of the data latch circuit after the data latch circuit latches the output signal of the sense amplifier, and an output circuit producing an output data signal responsive to the output signal of the switching circuit.
    Type: Grant
    Filed: December 26, 1985
    Date of Patent: August 23, 1988
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 4757214
    Abstract: A pulse generator circuit includes (a) a delay circuit responsive to an input signal for producing an output signal after a predetermined delay time, (b) a first logic circuit responsive to the input signal and this output signal for producing an output signal having a first logic state when both of the input signal and the output signal from the delay circuit are concurrently of a second logic value, (c) a second logic circuit responsive to the input signal and the output signal from the delay circuit for producing an output signal having the first logic state when both the input signal and the output signal from the delay circuit are of the first logic value, and (d) a third logic circuit responsive to the output signal from the first logic circuit and to the output signal from the second logic circuit for producing an output signal having a first logic state when both of the output signal from the first logic circuit and the output signal from the second logic circuit are concurrently of the second logic v
    Type: Grant
    Filed: February 19, 1986
    Date of Patent: July 12, 1988
    Assignee: NEC Corporation
    Inventor: Yasuo Kobayashi
  • Patent number: 4723270
    Abstract: In each exchange (12) of a communication network, a template data memory (31) keeps "exchange" template data according to which traffic data should be monitored at the exchange. In a center (11) of the network, a template data file (33) keeps copies of the template data of the respective exchanges of the network as "center" template data. When a change in the exchange template data is transmitted from a "change" originating exchange to the center, a central processor (13) updates the center template data accordingly for the originating exchange. Traffic data are transmitted from the respective exchanges to the center without the exchange template data. When such a traffic datum is transmitted from a "data" originating exchange to the center, the central processor stores the traffic datum in a traffic data log file (17) according to the template data kept in the template data file for the data originating exchange.
    Type: Grant
    Filed: November 12, 1986
    Date of Patent: February 2, 1988
    Assignee: NEC Corporation
    Inventors: Michio Okamoto, Atsushi Tsuchihashi, Yasuo Kobayashi