Patents by Inventor Yasuo Kobayashi

Yasuo Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4699673
    Abstract: A method of manufacturing an aluminum alloy sheet excellent in hot formability. A hot rolled plate of an aluminum alloy is cold rolled into a cold rolled sheet with a reduction ratio of at least 20%. The cold rolled sheet thus obtained is subjected to intermediate heat treatment wherein it is heated to a temperature of 420.degree. to 560.degree. C., at a heating rate of at least 2.degree. C. per second while it is heated from 150.degree. to 350.degree. C., and the sheet is then cooled to room temperature, at a cooling rate of at least 1.degree. C. per second while it is cooled from 420.degree. to 150.degree. C. The resulting heat treated sheet is subjected to final cold rolling with a reduction ratio of 15 to 60%.
    Type: Grant
    Filed: June 25, 1985
    Date of Patent: October 13, 1987
    Assignee: Mitsubishi Aluminium Kabushiki Kaisha
    Inventors: Yasuo Kobayashi, Michihiro Yoda, Hiromi Goto, Yo Takeuchi
  • Patent number: 4464209
    Abstract: A clad steel pipe excellent in corrosion resistance and low-temperature toughness, which comprises a cladding sheet of high corrosion resistant steel and a substrate sheet of low-alloy high-strength steel, the substrate sheet consisting, as the fundamental constituents, essentially of:carbon: from 0.002 to 0.050 wt. %,silicon: from 0.05 to 0.80 wt. %,manganese: from 0.80 to 2.20 wt. %,niobium: from 0.01 to 0.10 wt. %,aluminum: from 0.01 to 0.08 wt. %,nitrogen: from 0.002 to 0.008 wt. %, and,the balance being iron and incidental impurities;or, the substrate sheet further additionally containing, as the strength-improving constituents, at least one element selected from the group consisting of:copper: from 0.05 to 1.00 wt. %,nickel: from 0.05 to 3.00 wt. %,chromium: from 0.05 to 1.00 wt. %,molybdenum: from 0.03 to 0.80 wt. %,vanadium: from 0.01 to 0.10 wt. %, and,boron: from 0.0003 to 0.0030 wt.
    Type: Grant
    Filed: February 9, 1983
    Date of Patent: August 7, 1984
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Tadaaki Taira, Junichiro Takehara, Yasuo Kobayashi, Kazuyoshi Ume
  • Patent number: 4275093
    Abstract: A method of manufacturing SOS type semiconductor devices having small leakage current comprising the steps of forming a single crystal semiconductor film on an insulator single crystal substrate, selectively forming a film for masking against oxidation on the surface of the single crystal semiconductor film, and thermally oxidizing the single crystal semiconductor film, in a region which is not covered with the masking film, down to the surface of the insulating single crystal substrate in a water vapor atmosphere having a high pressure which is at least more than atmospheric pressure.
    Type: Grant
    Filed: June 13, 1979
    Date of Patent: June 23, 1981
    Assignee: Fujitsu Limited
    Inventors: Nobuo Sasaki, Yasuo Kobayashi, Ryoiku Tohgei, Takashi Iwai, Motoo Nakano
  • Patent number: 4262340
    Abstract: A semiconductor memory device provides a plurality of bit lines, a plurality of memory cells each of which is connected to a pair of different bit lines, a plurality of common word wires each of which is connected to the memory cells via a transmission gate. A characteristic feature of the present invention is to provide at least one amplifier between two memory cells which are connected to a word line or a bit line so as to prevent an increase of the access time of the memory device.
    Type: Grant
    Filed: November 9, 1979
    Date of Patent: April 14, 1981
    Assignee: Fujitsu Limited
    Inventors: Nobuo Sasaki, Yasuo Kobayashi, Takashi Iwai, Motoo Nakano
  • Patent number: 4250569
    Abstract: Disclosed is a semiconductor memory device using semiconductor memory elements as memory cells. Each semiconductor memory element is provided with a semiconductor region having a particular conductivity type, a source region and a drain region both having opposite conductivity type and both being located adjacent to the semiconductor region, one on each side of the semiconductor region, so that the semiconductor region functions as a separator between the source region and the drain region, and a gate electrode which is provided over the surface of the semiconductor region on a dielectric insulation film. In the semiconductor memory device, information is written in the semiconductor memory element by injecting electric charges into the semiconductor region, and the written information is read by detecting a variation of the electrical conductance on the surface of the semiconductor region due to the injection of electric charges.
    Type: Grant
    Filed: November 15, 1978
    Date of Patent: February 10, 1981
    Assignee: Fujitsu Limited
    Inventors: Nobuo Sasaki, Moto'o Nakano, Yasuo Kobayashi, Takashi Iwai
  • Patent number: 4008062
    Abstract: For accurately detecting the position of an edge of a glass ribbon in a process for manufacturing float glass, wherein the glass ribbon is moved forwardly along a longitudinal bath of molten metal, a radiation receiving edge of a radiation pyrometer is inserted transversely of the glass ribbon and thereabove from the side wall of the tank supporting the molten metal bath. The radiation receiving edge is reciprocably moved so as to detect the position at which the indication of a predetermined temperature changes, or the position where the temperature increases rapidly, and the position of the edge of the glass ribbon is detected by measuring such position of the radiation receiving edge where the temperature indicated increases rapidly.
    Type: Grant
    Filed: February 13, 1976
    Date of Patent: February 15, 1977
    Assignee: Asahi Glass Co., Ltd.
    Inventors: Tuneharu Nishikori, Tetsu Mori, Yasuo Kobayashi, Kenjiro Hiyama