Patents by Inventor Yasuo Namikawa

Yasuo Namikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120070605
    Abstract: An SiC ingot includes a bottom face having 4 sides; four side faces extending from the bottom face in a direction intersecting the direction of the bottom face; and a growth face connected with the side faces located at a side opposite to the bottom face. At least one of the bottom face, the side faces, and the growth face is the {0001} plane, {1-100} plane, {11-20} plane, or a plane having an inclination within 10° relative to these planes.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Hiroki Inoue, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120068195
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a plurality of SiC substrates each made of single-crystal silicon carbide; forming a base layer made of silicon carbide and holding the plurality of SiC substrates, which are arranged side by side when viewed in a planar view; and forming a filling portion filling a gap between the plurality of SiC substrates.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 22, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Hideto Tamaso, Yasuo Namikawa
  • Publication number: 20120061687
    Abstract: A silicon carbide substrate, which allows for reduced resistivity in the thickness direction thereof while restraining stacking faults from being produced due to heat treatment, includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on one main surface of the base layer. The base layer has an impurity concentration greater than 2×1019 cm?3. Further, the SiC layer has an impurity concentration greater than 5×1018 cm?3 and smaller than 2×1019 cm?3.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 15, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120061686
    Abstract: A silicon carbide substrate allowing reduction in cost for manufacturing a semiconductor device including a silicon carbide substrate includes a base substrate composed of silicon carbide and an SiC layer composed of single crystal silicon carbide different from the base substrate and arranged on the base substrate in contact therewith. Thus, the silicon carbide substrate 1 is a silicon carbide substrate capable of making effective use of silicon carbide single crystal.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 15, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Shinsuke Fujiwara, Yasuo Namikawa
  • Publication number: 20120056201
    Abstract: An IGBT, which is a vertical type IGBT allowing for reduced on-resistance while restraining defects from being produced, includes: a silicon carbide substrate, a drift layer, a well region, an n+ region, an emitter contact electrode, a gate oxide film, a gate electrode, and a collector electrode. The silicon carbide substrate includes: a base layer made of silicon carbide and having p type conductivity; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The base layer has a p type impurity concentration exceeding 1×1018 cm?3.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 8, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Shin Harada, Takeyoshi Masuda, Misako Honaga, Taro Nishiguchi, Makoto Sasaki, Shinsuke Fujiwara, Yasuo Namikawa
  • Publication number: 20120056203
    Abstract: A JFET, which is a semiconductor device allowing for reduced manufacturing cost, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source electrode disposed on the active layer; and a drain electrode formed on the active layer and separated from the source electrode. The silicon carbide substrate includes: a base layer made of single-crystal silicon carbide, and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The SiC layer has a defect density smaller than that of the base layer.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 8, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kazuhiro Fujikawa, Shin Harada, Taro Nishiguchi, Makoto Sasaki, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120056202
    Abstract: A MOSFET, which is a semiconductor device allowing for reduced on-resistance while restraining stacking faults from being produced due to heat treatment in a device manufacturing process, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source contact electrode disposed on the active layer; and a drain electrode formed on the other main surface of the silicon carbide substrate. The silicon carbide substrate includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. Further, the base layer has an impurity concentration greater than 2×1019 cm?3, and the SiC layer has an impurity concentration greater than 5×1018 cm?3 and smaller than 2×1019 cm?3.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 8, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Shin Harada, Takeyoshi Masuda, Misako Honaga, Makoto Sasaki, Taro Nishiguchi, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120032191
    Abstract: A method for manufacturing a silicon carbide substrate (1) having a large diameter provided readily includes the steps of: preparing a plurality of SiC substrates (20) each made of single-crystal silicon carbide; and connecting end surfaces (20B) of the plurality of SiC substrates (20) to one another such that the plurality of SiC substrates (20) are arranged side by side when viewed in a planar view.
    Type: Application
    Filed: September 27, 2010
    Publication date: February 9, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Hideto Tamaso, Yasuo Namikawa
  • Publication number: 20120025208
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; forming a Si film made of silicon on a main surface of the base substrate; fabricating a stacked substrate by placing the SiC substrate on and in contact with the Si film; and connecting the base substrate and the SiC substrate to each other by heating the stacked substrate to convert, into silicon carbide, at least a region making contact with the base substrate and a region making contact with the SiC substrate in the Si film.
    Type: Application
    Filed: September 29, 2010
    Publication date: February 2, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Takeyoshi Masuda, Makoto Sasaki, Shin Harada, Yasuo Namikawa, Shinsuke Fujiwara
  • Publication number: 20120017826
    Abstract: A supporting portion (30c) made of silicon carbide has irregularities at at least a portion of a main surface (FO). The supporting portion (30c) and at least one single crystal substrate (11) made of silicon carbide are stacked such that the backside surface (B1) of each at least one single crystal substrate (11) and the main surface (FO) of the supporting portion (30c) having irregularities formed contact each other. In order to connect the backside surface (B1) of each at least one single crystal substrate (11) to the supporting portion (30c), the supporting portion (30c) and at least one single crystal substrate (11) are heated such that the temperature of the supporting portion (30c) exceeds the sublimation temperature of silicon carbide, and the temperature of each at least one single crystal substrate (11) is below the temperature of the supporting portion (30c).
    Type: Application
    Filed: September 28, 2010
    Publication date: January 26, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Kyoko Okita, Hiroki Inoue, Yasuo Namikawa
  • Publication number: 20120012862
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; and connecting the base substrate and SiC substrate to each other by forming an intermediate layer, which is made of carbon that is a conductor, between the base substrate and the SiC substrate.
    Type: Application
    Filed: September 29, 2010
    Publication date: January 19, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Shinsuke Fujiwara, Yasuo Namikawa, Takeyoshi Masuda
  • Publication number: 20120015499
    Abstract: A combined substrate is prepared which has a supporting portion and first and second silicon carbide substrates. Between the first and second silicon carbide substrates, a gap having an opening exists. A closing layer for the gap is formed over the opening. The closing layer at least includes a silicon layer. In order to form a cover made of silicon carbide and closing the gap over the opening, the silicon layer is carbonized. By depositing sublimates from the first and second side surfaces of the first and second silicon carbide substrates onto the cover, a connecting portion is formed to close the opening. The cover is removed.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 19, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Yasuo Namikawa
  • Publication number: 20120009761
    Abstract: At least one single crystal substrate, each having a backside surface and made of silicon carbide, and a supporting portion having a main surface and made of silicon carbide, are prepared. In this preparing step, at least one of the backside surface and main surface is formed by machining. By this forming step, a surface layer having distortion in the crystal structure is formed on at least one of the backside surface and main surface. The surface layer is removed at least partially. Following this removing step, the backside surface and main surface are connected to each other.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 12, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Kyoko Okita, Hiroki Inoue, Shinsuke Fujiwara, Yasuo Namikawa
  • Publication number: 20120003823
    Abstract: A combined substrate is prepared which has a supporting portion and first and second silicon carbide substrates. The first silicon carbide substrate has a first front-side surface and a first side surface. The second silicon carbide substrate has a second front-side surface and a second side surface. The second side surface is disposed such that a gap having an opening between the first and second front-side surfaces is formed between the first side surface and the second side surface. By introducing melted silicon from the opening into the gap, a silicon connecting portion is formed to connect the first and second side surfaces so as to close the opening. By carbonizing the silicon connecting portion, a silicon carbide connecting portion is formed.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 5, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Yasuo Namikawa
  • Publication number: 20120003811
    Abstract: A first silicon carbide substrate has a first front-side surface and a first side surface. A second silicon carbide substrate has a second front-side surface and a second side surface. The second side surface is disposed such that a gap having an opening between the first and second front-side surfaces of the first and second silicon carbide substrates is disposed between the first side surface and the second side surface. A closing portion is provided to close the gap over the opening. By depositing sublimates from the first and second side surfaces onto the closing portion, a connecting portion is formed to connect the first and second side surfaces to each other so as to close the opening. After the step of forming the connecting portion, the closing portion is removed.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 5, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Noshiguchi, Kyoto Okita, Hideto Tamaso, Yasuo Namikawa
  • Publication number: 20120003812
    Abstract: A plurality of silicon carbide substrates and a support portion are heated. A temperature of a first radiation plane facing the plurality of silicon carbide substrates in a first space extending from the plurality of silicon carbide substrates in a direction perpendicular to one plane and away from the support portion is set to a first temperature. A temperature of a second radiation plane facing the support portion in a second space extending from the support portion in a direction perpendicular to one plane and away from the plurality of silicon carbide substrates is set to a second temperature higher than the first temperature. A temperature of a third radiation plane facing the plurality of silicon carbide substrates in a third space extending from a gap among the plurality of silicon carbide substrates along one plane is set to a third temperature lower than the second temperature.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 5, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Yasuo Namikawa
  • Publication number: 20110306181
    Abstract: A method of manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate formed of silicon carbide and a SiC substrate formed of single crystal silicon carbide; fabricating a stacked substrate by stacking the base substrate and the SiC substrate to have their main surfaces in contact with each other; heating the stacked substrate to join the base substrate and the SiC substrate and thereby fabricating a joined substrate; and heating the joined substrate such that a temperature difference is formed between the base substrate and the SiC substrate, and thereby discharging voids formed at the step of fabricating the joined substrate at an interface between the base substrate and the SiC substrate to the outside.
    Type: Application
    Filed: September 28, 2010
    Publication date: December 15, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES ,LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Hiroki Inoue, Yasuo Namikawa
  • Patent number: D651991
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: January 10, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Shinsuke Fujiwara, Yasuo Namikawa
  • Patent number: D651992
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: January 10, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Shinsuke Fujiwara, Yasuo Namikawa
  • Patent number: D655256
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: March 6, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Taro Nishiguchi, Makoto Sasaki, Shin Harada, Shinsuke Fujiwara, Yasuo Namikawa