Abstract: The first insulating film (81) and the second insulating film (82) are so layered in this order on a SOI layer (3) as to cover a gate electrode (6) and a side wall (5) and dry-etched with different etching selection ratio (the etching rate of the second insulating film (82) is smaller). After that, an exposed portion of the first insulating film (81) is removed by wet etching. Through these steps, a silicide protection portion (8) is formed only on a flat surface (3S) of the SOI layer (3) and silicide layers (71 and 72) are formed in n+ layers (12 and 13). With this structure, it is possible to prevent etching of the SOI layer in formation of an SiO2 film for silicide protection.

Abstract: There is provided a method including the steps of: forming spaced gate patterns on a main surface of a semiconductor substrate; forming sidewall films on the gate patterns, respectively, at their respective sidewalls facing each other; and, with the gate patterns and the sidewall films used as a mask, implanting a dopant in the semiconductor substrate to form a doped region. The doped region and a substrate region adjacent thereto together form a diode protecting a gate electrode of a field effect transistor. The doped region as a constituent of the diode can be minimized in size to be smaller than a limit of resolution.

Abstract: There is provided a method including the steps of: forming spaced gate patterns on a main surface of a semiconductor substrate; forming sidewall films on the gate patterns, respectively, at their respective sidewalls facing each other; and, with the gate patterns and the sidewall films used as a mask, implanting a dopant in the semiconductor substrate to form a doped region. The doped region and a substrate region adjacent thereto together form a diode protecting a gate electrode of a field effect transistor. The doped region as a constituent of the diode can be minimized in size to be smaller than a limit of resolution.

Abstract: In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.

Abstract: A semiconductor device in which parasitic resistance of source/drain regions can be reduced than the parasitic resistance of the drain region, and manufacturing method thereof, can be obtained. In the semiconductor device, inactivating ions are implanted only to the source region of the semiconductor layer, so as to damage the crystal near the surface of the semiconductor layer, whereby siliciding reaction is promoted. Therefore, in the source region, a titanium silicide film which is thicker can be formed.

Abstract: A semiconductor device that prevents metal pollution and a method of manufacturing the semiconductor device. A region (NR) and a region (PR) are defined by a trench isolation oxide film, a polysilicon film selectively provided on the trench isolation oxide film, a silicon layer provided on the polysilicon film, and a side wall spacer provided on a side surface of the polysilicon film. The polysilicon film is provided in a position corresponding to a top of a PN junction portion JP of a P-type well region and an N-type well region in a SOI layer across the two well regions.

Abstract: A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer. A protruded insulation layer is formed on the channel stopper region. A gate electrode extends from a region over the SOI layer to the protruded insulation layer and the sidewall insulation layer. In this way, reduction in threshold voltage Vth of a parasitic MOS transistor at the edge portion of the SOI layer can be suppressed.

Abstract: A resistor layer (5) is formed on an isolation insulating film (4) selectively formed in a major surface (1S) of a semiconductor substrate (1). An interlayer insulation film (7) covering the resistor layer (5) has first and second plugs (9, 19) buried therein in the form of buried interconnections. The first and second plugs (9, 19) provide connection not only between an end portion of the resistor layer (5) and first and second interconnection layers (8, 18) but also between the end portion of the resistor layer (5) and the major surface (1S) of the semiconductor substrate (1).

Abstract: A motor 12 includes a cylindrical rotor 20, a stator 19 arranged at a predetermined distance from an outer periphery of the rotor 20, and a position sensor 23 for detecting a rotational position of the rotor 20, wherein the stator 19 includes a stator core 19a and a plurality of stator windings 19b arranged along a circumferential direction of the stator core 19a at substantially equal distances from one another. A shield plate 26 for shielding magnetic flux from the stator windings 19b to the position sensor 23 is mounted against the stator core 19a. Magnetic flux from the stator windings pass through a closed loop starting from the stator windings 19b through the stator core 19a and the shield plate 26 and back to the stator windings to prevent the magnetic flux leakage from the stator windings 19b from flowing to another member. With this arrangement, the magnetic flux leakage from the stator windings does not affect the position sensor (magnetic sensor) which detects the rotational position of the rotor.

Abstract: A semiconductor device having an inductor is provided. In an RF circuit portion (RP), a region in an SOI layer (3) corresponding to a region in which a spiral inductor (SI) is provided is divided into a plurality of SOI regions (21) by a plurality of trench isolation oxide films (11). The trench isolation oxide films (11) are formed by filling trenches extending from the surface of the SOI layer (3) to the surface of a buried oxide film (2) with a silicon oxide film, and completely electrically isolate the SOI regions (21) from each other. The trench isolation oxide films (11) have a predetermined width and are shaped to extend substantially perpendicularly to the surface of the buried oxide film (2). The semiconductor device is capable of reducing electrostatically induced power dissipation and electromagnetically induced power dissipation, and preventing the structure and manufacturing steps thereof from becoming complicated.

Abstract: An object is to provide a semiconductor substrate processing method and a semiconductor substrate that prevent formation of particles from the edge part of the substrate. Silicon ions are implanted into the edge part of an SOI substrate (10) in the direction of radiuses of the SOI substrate (10) to bring a buried oxide film (2) in the edge part of the SOI substrate (10) into a silicon-rich state. Thus an SOI substrate (100) is provided, where the buried oxide film (2) has substantially been eliminated in the edge part.

Abstract: A driving control device for an electric vehicle includes an electric machine which is driven by a current supplied from a battery, a transmission which is coupled with the electric machine and performs shifting at a predetermined gear ratio, a charging state detecting portion which detects an electric variable that shows a charging state of the battery, a fail determination processing device which determines whether the electric variable exceeds a threshold value and makes a fail determination when the electric variable exceeds the threshold value, and a charging control processing device which decreases a rotational speed of the electric machine and reduces the electric variable when the fail determination is made. The fail determination is made to decrease the rotational speed of the electric machine when field weakening control becomes unperformable and the electric variable exceeds the threshold value, which makes it possible to prevent an overcurrent from being supplied to the battery.

Abstract: A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer. A protruded insulation layer is formed on the channel stopper region. A gate electrode extends from a region over the SOI layer to the protruded insulation layer and the sidewall insulation layer. In this way, reduction in threshold voltage Vth of a parasitic MOS transistor at the edge portion of the SOI layer can be suppressed.

Abstract: Provided is a method of manufacturing an acceleration sensor capable of preventing bonding of a movable electrode and a fixed electrode. A stain film 8 for reducing bonding adsorption force is formed on side surfaces of a movable electrode 1, fixed electrodes 2a and 2b and a frame portion 7. In the case in which the movable electrode 1 and the fixed electrodes 2a and 2b are to be formed of a silicon substrate, it is preferable that an insulating film having irregular bonding of silicon atoms and oxygen atoms and irregular bonding of silicon atoms and nitrogen atoms should be employed for the stain film 8, for example. The formation of the stain film 8 can suppress the bonding between the movable electrode 1 and the fixed electrodes 2a and 2b even if Coulomb force is generated between both electrodes when the silicon substrate and a back side substrate 4 are joined by using an anode junction method.

Abstract: In manufacturing hermetically sealed semiconductor devices, a plurality of generally rectangular openings are first formed into a matrix pattern in a cap silicon wafer so that the plurality of generally rectangular openings are separated by a plurality of row segments extending in a first direction and a plurality of column segments extending in a second direction perpendicular to the first direction. On the other hand, a plurality of semiconductor elements each having a plurality of electrode portions are bonded to a semiconductor wafer. After each of the plurality of generally rectangular openings has been aligned with the plurality of electrode portions of at least one of the plurality of semiconductor elements, the cap wafer is bonded to the plurality of semiconductor elements.

Abstract: In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.

Abstract: A rotation detector resists magnetic disturbances from sources near the detector. The rotation detector includes a rotor on which iron magnetic path changing pieces are fixed at predetermined intervals. A first bias magnet and a first magneto-resistive element for detecting the flux of the first bias magnet oppose the magnetic path changing pieces. A magnetic guide plate is located to guide disturbing magnetic flux in predetermined directions. The disturbing magnetic flux thus fails to adversely affect the first magneto-resistive element.

Abstract: An object is to provide a semiconductor substrate processing method and a semiconductor substrate that prevent formation of particles from the edge part of the substrate. Silicon ions are implanted into the edge part of an SOI substrate (10) in the direction of radiuses of the SOI substrate (10) to bring a buried oxide film (2) in the edge part of the SOI substrate (10) into a silicon-rich state. Thus an SOI substrate (100) is provided, where the buried oxide film (2) has substantially been eliminated in the edge part.

Abstract: A fire alarm system provided with a fire receiver (1) to which a plurality of fire sensors and controlled apparatuses are connected. The fire receiver (1) comprises a LAN interface (11) for connecting with other fire receivers. When a fire sensor issues an alarm, the fire receiver transmits the fire information over the LAN together with a group number set in advance, and displays (12) only the fire information of the same group number when the fire receiver receives fire information transmitted from the other fire receivers via the LAN. Thus, even is a plurality of fire receivers are used in a large building divided into ridge sections, fire information can be shared without causing disorder.

Abstract: A resistor layer (5) is formed on an isolation insulating film (4) selectively formed in a major surface (1S) of a semiconductor substrate (1). An interlayer insulation film (7) covering the resistor layer (5) has first and second plugs (9, 19) buried therein in the form of buried interconnections. The first and second plugs (9, 19) provide connection not only between an end portion of the resistor layer (5) and first and second interconnection layers (8, 18) but also between the end portion of the resistor layer (5) and the major surface (1S) of the semiconductor substrate (1).