Patents by Inventor Yasushi Goto

Yasushi Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070007546
    Abstract: The present invention provides a manufacturing method enabling suppression of threshold voltage fluctuation without giving any damage to a gate insulating film when a transistor structure is formed at first in a field effect transistor type of gas sensor and then an electrode with a material responsive to a gas to be detected is formed. The gate insulating film is a film stack including at least an SiO2 film and an SRN (Si-rich nitride) film. The SRN film functions as a etching stopper film when the gate insulating film is exposed by etching of an inter-layer insulating film. Pressure resistance of the gate insulating film is preserved with SiO2. An electric charge in the SRN film can be removed with a lower voltage as compare to that required for removing an electric charge in the Si3N4 film, which enables suppression of threshold voltage fluctuation in gas sensor transistors.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 11, 2007
    Inventors: Yasushi Goto, Toshiyuki Mine, Koichi Yokosawa
  • Publication number: 20060275986
    Abstract: A semiconductor integrated circuit device with third gates comprising second conduction type source/drain diffusion layer regions 205 formed first conduction type well 201, floating gates 203b formed on semiconductor substrate 200 through an insulator film 202, control gates 211a formed on floating gates 203b through nitrogen-introduced silicon oxide film 210a and third gates 207a different from the floating gates and the control gates, formed through the semiconductor substrates, the floating gates, the control gates and the insulator film, where the third gates are formed as filled in gaps between the floating gates existing in a vertical direction to word lines and channels and the height of third gates 207a thus formed is made lower than that of floating gates 203b, has improved reduction of memory cell size and operating speed and improved reliability after programming/erasing cycles.
    Type: Application
    Filed: August 7, 2006
    Publication date: December 7, 2006
    Inventors: Takashi Kobayashi, Yasushi Goto, Tokuo Kure, Hideaki Kurata, Hitoshi Kume, Katsutaka Kimura, Syunichi Saeki
  • Patent number: 7105409
    Abstract: A semiconductor integrated circuit device with third gates comprising second conduction type source/drain diffusion layer regions 205 formed first conduction type well 201, floating gates 203b formed on semiconductor substrate 200 through an insulator film 202, control gates 211a formed on floating gates 203b through nitrogen-introduced silicon oxide film 210a and third gates 207a different from the floating gates and the control gates, formed through the semiconductor substrates, the floating gates, the control gates and the insulator film, where the third gates are formed as filled in gaps between the floating gates existing in a vertical direction to word lines and channels and the height of third gates 207a thus formed is made lower than that of floating gates 203b, has improved reduction of memory cell size and operating speed and improved reliability after programming/erasing cycles.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: September 12, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Kobayashi, Yasushi Goto, Tokuo Kure, Hideaki Kurata, Hitoshi Kume, Katsutaka Kimura, Syunichi Saeki
  • Patent number: 7064400
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: June 20, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Publication number: 20060114114
    Abstract: In a hydrogen gas station where a great number of sensors are installed, in case hydrogen leakage occurs, sensors in the vicinity of the leakage location start to transmit warning to an access point all at once. This causes channel capacity saturation and failure to transmit warning to the access point. Nodes and the access point are connected each other by an uplink channel and a downlink channel. The access point detects congested/uncongested status of the uplink channel by using a wireless transmitter module and notifies the nodes of the congested/uncongested status of the channel by means for transmitting onto the downlink channel. Meanwhile, each node controls its transmission operation, according to the hydrogen concentration level detected by its hydrogen sensor and the uplink channel congested/uncongested status notified from the access point. In this way, channel overflow due to access congestion in case of hydrogen leakage can be prevented.
    Type: Application
    Filed: July 15, 2005
    Publication date: June 1, 2006
    Inventors: Sadaki Nakano, Koichi Yokosawa, Yasushi Goto
  • Publication number: 20060114113
    Abstract: A gas detection system capable of suppressing the power consumption of the system using gas sensors required for heating for measurement at high accuracy, comprising a server and a plurality of gas sensors connected by way of wireless communication with the server, in which each of the gas sensors is provided with a heater, a controller for controlling the ON-OFF for the power supply to the heater and a comparator for comparing the detected gas concentration with a predetermined threshold value. In the gas detection system, electric power is not usually supplied to the heater in each of the gas sensors and the gas sensor measures the gas concentration at a low accuracy and always compares it with the threshold value. In a case where the gas concentration exceeds the threshold value in one of the gas sensors, it turns the heater of its own to ON thereby switching the measurement to that at high accuracy and turns the heater to OFF upon completing the measurement.
    Type: Application
    Filed: March 3, 2005
    Publication date: June 1, 2006
    Inventors: Koichi Yokosawa, Sadaki Nakano, Yasushi Goto
  • Patent number: 7049243
    Abstract: A plasma processing method for etching a sample having a gate oxide film which generates a plasma in a vacuum chamber using electromagnetic waves, applies an rf bias power to the sample, turns off the rf bias power before a charged voltage of the sample reaches a breakdown voltage of the gate oxide film, turns on the rf bias power after the charged voltage of the sample has substantially dropped and repeats the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time, and the plasma is generated by continuously supplying power to enable generation of the plasma during the repeated turning on and off of the rf bias power.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: May 23, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai
  • Patent number: 7045843
    Abstract: Disclosed herein is a latchable MEMS switch device capable of retaining its ON or OFF state even after the external power source is turned off. It is unnecessary not only to introduce novel materials such as magnetic material but also to form complicated structures. At least one of the cantilever and pull-down electrode of a cold switch is connected to a second MEMS switch. A capacitor between the cantilever and pull-down electrode of the cold switch is charged by the second MEMS switch. Thereafter since the cold switch is isolated in the device, the charge remains stored. Therefore, the cold switch can remain in the ON state since the charge continues to create electrostatic attraction between the cantilever and the pull-down electrode.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: May 16, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Goto, Shuntaro Machida, Natsuki Yokoyama
  • Publication number: 20060081949
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Application
    Filed: December 8, 2005
    Publication date: April 20, 2006
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Publication number: 20060070449
    Abstract: The method for promoting the size reduction, the performance improvement and the reliability improvement of a semiconductor device embedded with pressure sensor is provided. In a semiconductor device embedded with pressure sensor, a part of an uppermost wiring is used as a lower electrode of a pressure detecting unit. A part of a silicon oxide film formed on the lower electrode is a cavity. On a tungsten silicide film formed on the silicon oxide film, a silicon nitride film is formed. The silicon nitride film has a function to fill a hole or holes and suppress immersion of moisture from outside to the semiconductor device embedded with pressure sensor. A laminated film of the silicon nitride film and the tungsten silicide film forms a diaphragm of the pressure sensor.
    Type: Application
    Filed: September 29, 2005
    Publication date: April 6, 2006
    Inventors: Natsuki Yokoyama, Shuntaro Machida, Yasushi Goto
  • Publication number: 20060066451
    Abstract: A measuring system enabled to simultaneously start measurement by a plurality of transponders by communication between a reader/writer and a plurality of transponders each with a built-in sensor is to be provided. In addition to an identifier SID intrinsic to a sensor and a chip identifier TID intrinsic to a transponder chip, a unique identifier UID combining the sensor SID and the chip TID is provided in each transponder. A reader/writer, in designating a transponder and transmitting a measurement command to it, invalidates the chip TID out of the UID of each transponder, validates only information regarding a sensor function, and transmits measurement commands including action commands unique to each type of sensor.
    Type: Application
    Filed: January 18, 2005
    Publication date: March 30, 2006
    Inventors: Ryo Nemoto, Tadashi Oonishi, Kazuki Watanabe, Yoshiaki Yazawa, Yasushi Goto, Hiroshi Yoshigi
  • Publication number: 20050250198
    Abstract: A simple and convenient sensor and measuring apparatus utilizing the optical interference effect of an optical thin film capable of measuring the binding between biochemical substances at a high throughput and having alkali resistance. An optical thin film of silicon nitride is disposed on the first surface and the rear surface of a silicon substrate, and the thickness of the silicon nitride film is modified in a direction parallel to the film. A portion of the thin film with increased thickness is used as a sensor upon which a probe is disposed, and over which a sample-containing solution is caused to flow. The binding between the probe and biochemical sample is detected based upon the change of the intensity of reflected light.
    Type: Application
    Filed: December 9, 2004
    Publication date: November 10, 2005
    Inventors: Toru Fujimura, Yasushi Goto
  • Publication number: 20050173532
    Abstract: The present invention intends to prevent the communication distance from becoming shorter with a reduction in size of a coil antenna to the chip size and with a consequent decrease of an induced voltage. According to the present invention there is provided a semiconductor chip having a coil antenna and a circuit surface and adapted to transmit and receive signals by radio to and from an external device. The semiconductor chip has a configuration for increasing an electromagnetic coupling coefficient between the coil antenna and the external device. According to a concrete example thereof, a magnetic material is disposed, the coil antenna is formed by a stacked structure comprising plural conductor layers and insulating layers superimposed one on another, or the coil antenna is disposed outside an external form of a circuit of the semiconductor chip.
    Type: Application
    Filed: January 7, 2005
    Publication date: August 11, 2005
    Inventors: Takehiko Hasebe, Yasushi Goto, Kouichi Uesaka, Yoshiaki Yazawa, Makoto Torigoe
  • Publication number: 20050136685
    Abstract: A chip having a deaerating function and requiring no bonding or welding for forming a channel, and an apparatus and method for the reaction analysis are provided. The chip contains a first substrate, a second substrate having a liquid inlet and a liquid outlet, and an intermediate member having hydro-phobicity and air permeability and forming a channel between the first and second substrates. It is thereby possible to prevent mixing of air bubbles into the channel.
    Type: Application
    Filed: September 1, 2004
    Publication date: June 23, 2005
    Inventors: Kei Takenaka, Toru Fujimura, Yasushi Goto
  • Publication number: 20050120528
    Abstract: An un-sintered green sheet made of first piezoelectric ceramic composite essentially including lead oxide is provided. Conductive paste made of metal essentially including Ag, second piezoelectric ceramic composite, and oxide is provided. The conductive paste partly is applied onto the green sheet. The green sheet having the conductive paste thereon is fired at a temperature lower than a melting temperature of the oxide in the conductive paste so as to sinter the green sheet, thus providing a piezoelectric ceramic device. The piezoelectric ceramic device manufactured by the method does not cause deformation or crack when the green sheet is sintered.
    Type: Application
    Filed: November 29, 2004
    Publication date: June 9, 2005
    Inventors: Kazuhiro Okuda, Yasushi Goto, Seiichi Minami, Hiroki Moriwake
  • Publication number: 20050115039
    Abstract: Material of piezoelectric ceramic compound of three components of Pb(Zn1/3Nb2/3)O3—PbTiO3—PbZrO3 expressed by a basic formula of Pb(Zn1/3Nb2/3)aZrTixO3 (where 0.90<a+x+y<1.00) is provided. The material is calcined. The calcined material is milled to provide powder. A formed body containing the powder is provided. The formed body is degreased at a temperature having the formed body not sintered. A sintered body is provided by sintering the degreased body. The sintered body is heated to subject the sintered body to predetermined heat treatment. The sintered body subjected to the predetermined heat treatment is polarized to provide the sintered body with a piezoelectric property, thus providing a piezoelectric ceramic device. This piezoelectric ceramic composition can be sintered together with an electrode consisting mainly of Ag at a low temperature. Even after the sintering, the composition has its insulation resistance not decrease and has its piezoelectric properties not decline.
    Type: Application
    Filed: November 22, 2004
    Publication date: June 2, 2005
    Inventors: Kazuhiro Okuda, Yasushi Goto, Seiichi Minami, Hiroki Moriwaki
  • Publication number: 20050104141
    Abstract: There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.
    Type: Application
    Filed: December 2, 2004
    Publication date: May 19, 2005
    Inventors: Jiro Yugami, Natsuki Yokoyama, Toshiyuki Mine, Yasushi Goto
  • Publication number: 20050104621
    Abstract: The present invention relates to an LSI in which functions can be changed, and realizes, particularly, a system LSI in which functions are changed by changing connections of the circuit by use of MEMS switches. A bistable MEMS switch which can maintain states, and exhibits optimal stitching property, i.e., the switch has a very small resistance of several ? or less in an on-state, and has an infinite resistance in an off-state; is employed. An element in which functions can be changed during operation, is produced by utilizing a wiring layer of a CMOS semiconductor to form the MEMS switch. A semiconductor device exhibiting high-degree of freedom for changing functions, high-speed, and having small area, is realized.
    Type: Application
    Filed: September 3, 2004
    Publication date: May 19, 2005
    Inventors: Takayuki Kawahara, Masayuki Miyazaki, Yasushi Goto, Natsuki Yokoyama, Takahiro Onai
  • Publication number: 20050067621
    Abstract: Disclosed herein is a latchable MEMS switch device capable of retaining its ON or OFF state even after the external power source is turned off. It is unnecessary not only to introduce novel materials such as magnetic material but also to form complicated structures. At least one of the cantilever and pull-down electrode of a cold switch is connected to a second MEMS switch. A capacitor between the cantilever and pull-down electrode of the cold switch is charged by the second MEMS switch. Thereafter since the cold switch is isolated in the device, the charge remains stored. Therefore, the cold switch can remain in the ON state since the charge continues to create electrostatic attraction between the cantilever and the pull-down electrode.
    Type: Application
    Filed: March 1, 2004
    Publication date: March 31, 2005
    Inventors: Yasushi Goto, Shuntaro Machida, Natsuki Yokoyama
  • Publication number: 20050014326
    Abstract: A semiconductor integrated circuit device with third gates comprising second conduction type source/drain diffusion layer regions 205 formed first conduction type well 201, floating gates 203b formed on semiconductor substrate 200 through an insulator film 202, control gates 211a formed on floating gates 203b through nitrogen-introduced silicon oxide film 210a and third gates 207a different from the floating gates and the control gates, formed through the semiconductor substrates, the floating gates, the control gates and the insulator film, where the third gates are formed as filled in gaps between the floating gates existing in a vertical direction to word lines and channels and the height of third gates 207a thus formed is made lower than that of floating gates 203b, has improved reduction of memory cell size and operating speed and improved reliability after programming/erasing cycles.
    Type: Application
    Filed: July 27, 2004
    Publication date: January 20, 2005
    Inventors: Takashi Kobayashi, Yasushi Goto, Tokuo Kure, Hideaki Kurata, Hitoshi Kume, Katsutaka Kimura, Syunichi Saeki