Patents by Inventor Yasuyuki Arai
Yasuyuki Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8546811Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.Type: GrantFiled: February 1, 2011Date of Patent: October 1, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiromichi Godo, Yasuyuki Arai, Satohiro Okamoto, Mari Terashima, Eriko Nishida, Junpei Sugao
-
Patent number: 8546790Abstract: The present invention is to provide a semiconductor device in which the step can be simplified, the manufacturing cost can be suppressed, and the decrease in yield can be suppressed. A semiconductor device of the present invention includes an antenna, a storage element, and a transistor, wherein a conductive layer serving as an antenna is provided in the same layer as a conductive layer of the transistor or the storage element. This characteristic makes it possible to omit an independent step of forming the conductive layer serving as an antenna and to conduct the step of forming the conductive layer serving as an antenna at the same time as the step of forming a conductive layer of another element. Therefore, the manufacturing step can be simplified, the manufacturing cost can be suppressed, and the decrease in yield can be suppressed.Type: GrantFiled: January 20, 2006Date of Patent: October 1, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Moriya, Yasuko Watanabe, Yasuyuki Arai
-
Patent number: 8547516Abstract: A driver circuit for use with a passive matrix or active matrix electro-optical display device such as a liquid crystal display is fabricated to occupy a reduced area. A circuit (stick crystal) having a length substantially equal to the length of one side of the matrix of the display device is used as the driver circuit. The circuit is bonded to one substrate of the display device, and then the terminals of the circuit are connected with the terminals of the display device. Subsequently, the substrate of the driver circuit is removed. The driver circuit can be formed on a large-area substrate such as a glass substrate, while the display device can be formed on a lightweight material having a high shock resistance such as a plastic substrate.Type: GrantFiled: September 2, 2011Date of Patent: October 1, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Setsuo Nakajima, Yasuyuki Arai
-
Patent number: 8541790Abstract: An object of the invention is to provide a lighting device which can suppress luminance nonuniformity in a light emitting region when the lighting device has large area. A layer including a light emitting material is formed between a first electrode and a second electrode, and a third electrode is formed to connect to the first electrode through an opening formed in the second electrode and the layer including a light emitting material. An effect of voltage drop due to relatively high resistivity of the first electrode can be reduced by electrically connecting the third electrode to the first electrode through the opening.Type: GrantFiled: September 13, 2012Date of Patent: September 24, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuyuki Arai
-
Publication number: 20130234122Abstract: An organic EL display device of active matrix type wherein insulated-gate field effect transistors formed on a single-crystal semiconductor substrate are overlaid with an organic EL layer; characterized in that the single-crystal semiconductor substrate (413 in FIG. 4) is held in a vacant space (414) which is defined by a bed plate (401) and a cover plate (405) formed of an insulating material, and a packing material (404) for bonding the bed and cover plates; and that the vacant space (414) is filled with an inert gas and a drying agent, whereby the organic EL layer is prevented from oxidizing.Type: ApplicationFiled: April 22, 2013Publication date: September 12, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
-
Publication number: 20130234136Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.Type: ApplicationFiled: May 2, 2013Publication date: September 12, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuyuki ARAI
-
Patent number: 8530896Abstract: A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel unit is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an inter-layer insulation film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.Type: GrantFiled: July 30, 2009Date of Patent: September 10, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Jun Koyama
-
Publication number: 20130228839Abstract: To provide a highly integrated semiconductor memory device. To provide a semiconductor memory device which can hold stored data even when power is not supplied. To provide a semiconductor memory device which has a large number of write cycles. The degree of integration of a memory cell array is increased by forming a memory cell including two transistors and one capacitor which are arranged three-dimensionally. The electric charge accumulated in the capacitor is prevented from being leaking by forming a transistor for controlling the amount of electric charge of the capacitor in the memory cell using a wide-gap semiconductor having a wider band gap than silicon. Accordingly, a semiconductor memory device which can hold stored data even when power is not supplied can be provided.Type: ApplicationFiled: March 1, 2013Publication date: September 5, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Yasuyuki Arai
-
Patent number: 8513072Abstract: In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.Type: GrantFiled: December 15, 2010Date of Patent: August 20, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Ikuko Kawamata
-
Patent number: 8497512Abstract: To prevent a point defect and a line defect in forming a light-emitting device, thereby improving the yield. A light-emitting element and a driver circuit of the light-emitting element, which are provided over different substrates, are electrically connected. That is, a light-emitting element and a driver circuit of the light-emitting element are formed over different substrates first, and then electrically connected. By providing a light-emitting element and a driver circuit of the light-emitting element over different substrates, the step of forming the light-emitting element and the step of forming the driver circuit of the light-emitting element can be performed separately. Therefore, degrees of freedom of each step can be increased, and the process can be flexibly changed. Further, steps (irregularities) on the surface for forming the light-emitting element can be reduced than in the conventional technique.Type: GrantFiled: March 9, 2012Date of Patent: July 30, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Osamu Nakamura, Miyuki Higuchi, Yasuko Watanabe, Yasuyuki Arai
-
Patent number: 8497509Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.Type: GrantFiled: July 16, 2008Date of Patent: July 30, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
-
Patent number: 8497516Abstract: Although an organic resin substrate is highly effective at reducing the weight and improving the shock resistance of a display device, it is required to improve the moisture resistance of the organic resin substrate for the sake of maintaining the reliability of an EL element. Hard carbon films are formed to cover a surface of the organic resin substrate and outer surfaces of a sealing member. Typically, DLC (Diamond like Carbon) films are used as the carbon films. The DLC films have a construction where carbon atoms are bonded into an SP3 bond in terms of a short-distance order, although the films have an amorphous construction from a macroscopic viewpoint. The DLC films contain 95 to 70 atomic % carbon and 5 to 30 atomic % hydrogen, so that the DLC films are very hard and minute and have a superior gas barrier property and insulation performance.Type: GrantFiled: March 14, 2011Date of Patent: July 30, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
-
Patent number: 8476623Abstract: A light emitting device having a plastic substrate is capable of preventing the substrate from deterioration with the transmission of oxygen or moisture content. The light emitting device has light emitting elements formed between a lamination layer and an inorganic compound layer that transmits visual light, where the lamination layer is constructed of one unit or two or more units, and each unit is a laminated structure of a metal layer and an organic compound layer. Alternatively, each unit is a laminated structure of a metal layer and an organic compound layer, wherein the inorganic compound layer is formed so as to cover the end face of the lamination layer. In the present invention, the lamination layer is formed on the primary surface of the plastic substrate, so that a flexible substrate structure can be obtained.Type: GrantFiled: February 28, 2012Date of Patent: July 2, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
-
Patent number: 8466469Abstract: A pair of substrates forming the active matrix liquid crystal display are fabricated from resinous substrates having transparency and flexibility. A thin-film transistor has a semiconductor film formed on a resinous layer formed on one resinous substrate. The resinous layer is formed to prevent generation of oligomers on the surface of the resinous substrate during formation of the film and to planarize the surface of the resinous substrate.Type: GrantFiled: April 2, 2004Date of Patent: June 18, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Satoshi Teramoto
-
Patent number: 8461013Abstract: An IC card is more expensive than a magnetic card, and an electronic tag is also more expensive as a substitute for bar codes. Therefore, the present invention provides an extremely thin integrated circuit that can be mass-produced at low cost unlike a chip of a conventional silicon wafer, and a manufacturing method thereof. One feature of the present invention is that a thin integrated circuit is formed by a formation method that can form a pattern selectively, on a glass substrate, a quartz substrate, a stainless substrate, a substrate made of synthetic resin having flexibility, such as acryl, or the like except for a bulk substrate. Further, another feature of the present invention is that an ID chip in which a thin film integrated circuit and an antenna according to the present invention are mounted is formed.Type: GrantFiled: May 10, 2010Date of Patent: June 11, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinji Maekawa, Gen Fujii, Junya Maruyama, Toru Takayama, Yumiko Fukumoto, Yasuyuki Arai
-
Patent number: 8455954Abstract: The present invention provides a wireless chip having high mechanical strength. Moreover, the present invention also provides a wireless chip which can prevent an electric wave from being blocked. In a wireless chip of the present invention, a layer having a thin film transistor formed over an insulating substrate is fixed to an antenna by an anisotropic conductive adhesive, and the thin film transistor is connected to the antenna. The antenna has a dielectric layer, a first conductive layer, and a second conductive layer; the first conductive layer and the second conductive layer has the dielectric layer therebetween; the first conductive layer serves as a radiating electrode; and the second electrode serves as a ground contact body.Type: GrantFiled: April 12, 2012Date of Patent: June 4, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yukie Suzuki, Yasuyuki Arai, Shunpei Yamazaki
-
Patent number: 8449806Abstract: The present invention provides a laser processing apparatus having a laser oscillator for outputting a pulsed laser beam; deflection unit for deflecting the pulsed laser beam to irradiate a object to be processed with the deflected pulsed laser beam; a mounting base on which the object is placed and which is movable in an axial direction or two-axial directions perpendicular to each other; and local shielding unit for controlling an atmosphere around the surface of the object to be processed which is irradiated with the laser beam. When a thin semiconductor film with a thickness of 1 ?m or less is formed over the surface, minute convex portions are formed, which causes a problem that characteristics of TFTs vary among elements. Minute particles generated and adhered to a main surface of a substrate through a laser processing, which is difficult to remove in general surface cleaning, become preventable by the invention.Type: GrantFiled: November 26, 2007Date of Patent: May 28, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Yasuyuki Arai
-
Patent number: 8445338Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.Type: GrantFiled: July 16, 2012Date of Patent: May 21, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiichi Sekiguchi, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
-
Patent number: 8441007Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.Type: GrantFiled: December 9, 2009Date of Patent: May 14, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuyuki Arai
-
Patent number: 8425016Abstract: A printing apparatus including an ink head having a pathway in which an ink in a liquid state is capable of flowing, the pathway being provided in the ink head and having a first end point and a second end point; a discharge port for discharging the ink, the discharge port being provided at the first end point; and a needle valve provided in the pathway and over the discharge port so that an outer surface of a needle portion of the needle valve is configured to be in contact with the ink.Type: GrantFiled: May 22, 2012Date of Patent: April 23, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai