Patents by Inventor Yasuyuki Arai

Yasuyuki Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8428761
    Abstract: A production system and a production method, which can change a period to delivery of products flexibly depending on a change of demand, in the case of producing a plurality of products having different specifications by mixing. A production system of plural kinds of products has a plurality of lower processes, which is capable of diverging, with respect to an upper process that can be applied common in a plurality of products. These upper process and lower process are organized by including one or a plurality of processes. A production line is constructed by a plurality of manufacturing facilities having different functions through the upper process and the lower process. Such a production system is provided with an order and delivery management system, a design management system, and a process management system.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuyuki Arai
  • Patent number: 8426876
    Abstract: An organic EL display device of active matrix type wherein insulated-gate field effect transistors formed on a single-crystal semiconductor substrate are overlaid with an organic EL layer; characterized in that the single-crystal semiconductor substrate (413 in FIG. 4) is held in a vacant space (414) which is defined by a bed plate (401) and a cover plate (405) formed of an insulating material, and a packing material (404) for bonding the bed and cover plates; and that the vacant space (414) is filled with an inert gas and a drying agent, whereby the organic EL layer is prevented from oxidizing.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8427420
    Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
  • Patent number: 8415231
    Abstract: A photovoltaic device uses a single crystal or polycrystalline semiconductor layer which is separated from a single crystal or polycrystalline semiconductor substrate as a photoelectric conversion layer and has a SOI structure in which the semiconductor layer is bonded to a substrate having an insulating surface or an insulating substrate. A single crystal semiconductor layer which is a separated surface layer part of a single crystal semiconductor substrate and is transferred is used as a photoelectric conversion layer and includes an impurity semiconductor layer to which hydrogen or halogen is added on a light incidence surface or on an opposite surface. The semiconductor layer is fixed to a substrate having an insulating surface or an insulating substrate.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: April 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8405116
    Abstract: An object of the present invention is to reduce the thickness of a lighting device using an electroluminescent material. Another object of the present invention is to simplify the structure of a lighting device using an electroluminescent material to reduce cost. A light-emitting element having a stacked structure of a first electrode layer, an EL layer, and a second electrode layer is provided over a substrate having an opening in its center, and a first connecting portion and a second connecting portion for supplying electric power to the light-emitting element are provided in the center of the substrate (in the vicinity of the opening provided in the substrate).
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: March 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Yasuo Nakamura, Yukie Suzuki, Yoshitaka Moriya
  • Patent number: 8394655
    Abstract: A photoelectric conversion device with an excellent photoelectric conversion characteristic with a silicon semiconductor material effectively utilized. The photoelectric conversion device includes a first unit cell including a first electrode, a first impurity semiconductor layer, a single crystal semiconductor layer, and a second impurity semiconductor layer; and a second unit cell including a third impurity semiconductor layer, a non-single-crystal semiconductor layer, a fourth impurity semiconductor layer, and a second electrode. The second and third impurity semiconductor layers are in contact with each other so that the first and second unit cells are connected in series, and an insulating layer is provided for a surface of the first electrode and bonded to a supporting substrate.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: March 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8395161
    Abstract: At least two TFTs which are connected with a light emitting element are provided, crystallinities of semiconductor regions composing active layers of the respective TFTs are made different from each other. As the semiconductor region, a region obtained by crystallizing an amorphous semiconductor film by laser annealing is applied. In order to change the crystallinity, a method of changing a scan direction of a continuous oscillating laser beam so that crystal growth directions are made different from each other is applied. Alternatively, a method of changing a channel length direction of TFT between the respective semiconductor regions without changing the scan direction of the continuous oscillating laser beam so that a crystal growth direction and a current flowing direction are different from each other is applied.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8384699
    Abstract: The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: February 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
  • Patent number: 8378473
    Abstract: In inlets used for ID tags and the like, a defective connection between an integrated circuit part and an antenna is suppressed by improvement of tolerance for a bending or a pressing pressure. The integrated circuit part includes a semiconductor chip and a multilayer substrate having a concave portion. The semiconductor chip is mounted on the bottom of the concave portion. The multilayer substrate includes a connection electrode at the top surface and a connection electrode connected to the semiconductor chip on the bottom of the concave portion. The connection electrode on the bottom of the concave portion is connected to the connection electrode at the top surface by a penetration electrode inside a multilayer substrate. By such a configuration, the semiconductor chip is connected to the antenna.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: February 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8368083
    Abstract: At least part of a semiconductor layer or a semiconductor substrate includes a semiconductor region having a large energy gap. The semiconductor region having a large energy gap is preferably formed from silicon carbide and is provided in a position at least overlapping with a gate electrode provided with an insulating layer between the semiconductor region and the gate electrode. By making a structure in which the semiconductor region is included in a channel formation region, a dielectric breakdown voltage is improved.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: February 5, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Publication number: 20130012272
    Abstract: Although an organic resin substrate is highly effective at reducing the weight and improving the shock resistance of a display device, it is required to improve the moisture resistance of the organic resin substrate for the sake of maintaining the reliability of an EL element. Hard carbon films are formed to cover a surface of the organic resin substrate and outer surfaces of a sealing member. Typically, DLC (Diamond like Carbon) films are used as the carbon films. The DLC films have a construction where carbon atoms are bonded into an SP3 bond in terms of a short-distance order, although the films have an amorphous construction from a macroscopic viewpoint. The DLC films contain 95 to 70 atomic % carbon and 5 to 30 atomic % hydrogen, so that the DLC films are very hard and minute and have a superior gas barrier property and insulation performance.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 10, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki Arai
  • Publication number: 20130009289
    Abstract: An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuyuki ARAI, Yuko TACHIMURA, Yohei KANNO, Mai AKIBA
  • Publication number: 20130001635
    Abstract: An object of the invention is to provide a lighting device which can suppress luminance nonuniformity in a light emitting region when the lighting device has large area. A layer including a light emitting material is formed between a first electrode and a second electrode, and a third electrode is formed to connect to the first electrode through an opening formed in the second electrode and the layer including a light emitting material. An effect of voltage drop due to relatively high resistivity of the first electrode can be reduced by electrically connecting the third electrode to the first electrode through the opening.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 3, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yasuyuki ARAI
  • Patent number: 8343816
    Abstract: It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm?3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: January 1, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryota Imahayashi, Shinobu Furukawa, Atsuo Isobe, Yasuyuki Arai, Shunpei Yamazaki
  • Patent number: 8322847
    Abstract: When using a liquid droplet ejection method, a conventional photomask is not required, however, it is required instead that a moving path of a nozzle or a substrate is controlled with accuracy at least in ejecting liquid droplets. According to the characteristics of compositions to be ejected or their pattern, such ejection conditions are desirably set as the moving rate of a nozzle or a substrate, ejection quantity, ejection distance and ejection rate of compositions, atmosphere of the space that the compositions are ejected, the temperature and moisture of the space, and heating temperature of the substrate.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: December 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Shinji Maekawa, Yohei Kanno
  • Publication number: 20120299705
    Abstract: One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 29, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuyuki ARAI, Mai AKIBA, Yuko TACHIMURA, Yohei KANNO
  • Publication number: 20120299001
    Abstract: [Problem]A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high.
    Type: Application
    Filed: June 5, 2012
    Publication date: November 29, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hideaki KUWABARA, Yasuyuki ARAI
  • Patent number: 8318554
    Abstract: In forming a thin film transistor, to form a film superior in quality to a film formed by a conventional CVD method and to form a film equal or superior in quality to a film formed by a thermal oxidation method at a temperature which does not affect a substrate. Plasma oxidation or plasma nitridation with a low electron temperature and a high electron density is performed to at least one of a glass substrate, a semiconductor film containing amorphous silicon formed into a predetermined pattern, a gate electrode and a wire pulled from the gate electrode, an insulating film to be a gate insulating film, and a protective film with a temperature of the glass substrate set at a temperature 100° C. or more lower than a strain point of the glass substrate.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Shunpei Yamazaki
  • Patent number: 8319725
    Abstract: The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satohiro Okamoto, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
  • Publication number: 20120286276
    Abstract: A p channel IFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an interlayer insulating film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 15, 2012
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Jun Koyama