Patents by Inventor Yasuyuki Arai
Yasuyuki Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8654270Abstract: In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer insulating layer are disposed on a substrate, and an input terminal portion that is electrically connected to a wiring of another substrate is provided on an end portion of the substrate. The input terminal portion includes a first layer made of the same material as that of the gate electrode and a second layer made of the same material as that of the pixel electrode. With this structure, the number of photomasks used in the photolithography method can be reduced to 5.Type: GrantFiled: August 27, 2008Date of Patent: February 18, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Setsuo Nakajima, Yasuyuki Arai
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Patent number: 8634041Abstract: To sophisticate a portable electronic appliance without hindering reduction of the weight and the size, more specifically, to sophisticate a liquid crystal display apparatus installed in a portable electronic appliance without hindering the mechanical strength, a liquid crystal display apparatus includes a first plastic substrate, a light-emitting device which is disposed over the first plastic substrate, resin which covers the light-emitting device, an insulating film which is in contact with the resin, a semiconductor device which is in contact with the insulating film, a liquid crystal cell which is electrically connected to the semiconductor device, and a second plastic substrate, wherein the semiconductor device and the liquid crystal cell are disposed between the first plastic substrate and the second plastic substrate.Type: GrantFiled: May 8, 2012Date of Patent: January 21, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Akio Endo, Yasuyuki Arai
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Patent number: 8633488Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together; and a pixel electrode connected to the semiconductor layer.Type: GrantFiled: December 14, 2011Date of Patent: January 21, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
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Patent number: 8633473Abstract: It is an object of the present invention to provide a high-contrast light-emitting device without using a polarization plate. In particular, it is an object of the present invention to make contrast control simpler for a light-emitting device provided with a color filter. A light-emitting device according to the present invention has a feature of having a structure for reducing reflection of light from a light-emitting later at a reflective electrode, and further, has a feature of absorbing wavelengths other than the light by a color filter to enhance the contrast. Accordingly, contrast control can be performed in consideration of only a luminescence component from the light-emitting layer, and is thus made simpler.Type: GrantFiled: December 27, 2005Date of Patent: January 21, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takeshi Noda, Masayuki Sakakura, Yasuyuki Arai, Yuko Tachimura
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Publication number: 20140014954Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.Type: ApplicationFiled: September 12, 2013Publication date: January 16, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiromichi GODO, Yasuyuki ARAI, Satohiro OKAMOTO, Mari TERASHIMA, Eriko NISHIDA, Junpei SUGAO
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Patent number: 8629434Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.Type: GrantFiled: May 2, 2013Date of Patent: January 14, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuyuki Arai
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Publication number: 20140011331Abstract: A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel unit is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an inter-layer insulation film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.Type: ApplicationFiled: September 9, 2013Publication date: January 9, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Jun Koyama
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Patent number: 8624248Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.Type: GrantFiled: June 27, 2011Date of Patent: January 7, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideomi Suzawa, Koji Ono, Yasuyuki Arai
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Patent number: 8604334Abstract: An object of the present invention is to provide a simple process to manufacture a wiring connecting photoelectric cells in a photoelectric conversion device. Another object of this invention is to prevent defective rupture from occurring in the said wiring. The photoelectric conversion device comprises a first and a second photoelectric conversion cells comprising respectively a first and a second single crystal semiconductor layers. First electrodes are provided on the downwards surfaces of the first and second photoelectric conversion cells, and second electrodes are provided on their upwards surfaces. The first and second photoelectric conversion cells are fixed onto a support substrate side by side. The second single crystal semiconductor layer has a through hole which reaches the first electrode. The second electrode of the first photoelectric conversion cell is extended to the through hole to be electrically connected to the first electrode of the second photoelectric conversion cell.Type: GrantFiled: September 1, 2009Date of Patent: December 10, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuyuki Arai
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Patent number: 8599469Abstract: A constitution of the display device of the invention is shown in the following. The display device includes a pixel unit including TFTs of which the active layer contains an organic semiconductor material for forming channel portions in the opening portions in an insulating layer arranged to meet the gate electrodes. The pixel unit further includes a contrast media formed on the electrodes connected to the TFTs for changing the reflectivity upon the application of an electric field, or microcapsules containing electrically charged particles that change the reflectivity upon the application of an electric field. The pixel unit is sandwiched by plastic substrates, and barrier layers including an inorganic insulating material are provided between the plastic substrates and the pixel unit. The purpose of the present invention is to supply display devices which are excellent in productivity, light in weight and flexible.Type: GrantFiled: June 6, 2011Date of Patent: December 3, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
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Publication number: 20130314346Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.Type: ApplicationFiled: April 17, 2013Publication date: November 28, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Yasuyuki ARAI, Ikuko KAWAMATA, Atsushi MIYAGUCHI, Yoshitaka MORIYA
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Patent number: 8592267Abstract: At least part of a semiconductor layer or a semiconductor substrate includes a semiconductor region having a large energy gap. The semiconductor region having a large energy gap is preferably formed from silicon carbide and is provided in a position at least overlapping with a gate electrode provided with an insulating layer between the semiconductor region and the gate electrode. By making a structure in which the semiconductor region is included in a channel formation region, a dielectric breakdown voltage is improved.Type: GrantFiled: January 24, 2013Date of Patent: November 26, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
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Patent number: 8586988Abstract: [Summary] [Problem] A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. [Solving Means] By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.Type: GrantFiled: June 5, 2012Date of Patent: November 19, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hideaki Kuwabara, Yasuyuki Arai
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Patent number: 8581260Abstract: Plural kinds of thin film transistors having different film thicknesses of semiconductor layers are provided over a substrate having an insulating surface. A channel formation region of semiconductor layer in a thin film transistor for which high speed operation is required is made thinner than a channel formation region of a semiconductor layer of a thin film transistor for which high withstand voltage is required. A gate insulating layer of the thin film transistor for which high speed operation is required may be thinner than a gate insulating layer of the thin film transistor for which high withstand voltage is required.Type: GrantFiled: February 7, 2008Date of Patent: November 12, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
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Patent number: 8582058Abstract: It is an object of the present invention to provide a lighting system having favorable luminance uniformity in a light-emitting region when the lighting system has large area. According to one feature of the invention, a lighting system comprises a first electrode, a second electrode, a layer containing a light-emitting substance formed between the first electrode and the second electrode, an insulating layer which is formed over a substrate in a grid form and contains a fluorescence substance, and a wiring formed over the insulating layer. The insulating layer and the wiring are covered with the first electrode so that the first electrode and the wiring are in contact with each other.Type: GrantFiled: October 8, 2009Date of Patent: November 12, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Seo, Yasuyuki Arai
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Patent number: 8575604Abstract: An object is to provide a semiconductor memory device which can be miniaturized and also secures a sufficient margin for the refresh period. A memory cell includes a reading transistor, a writing transistor, and a capacitor. In the above structure, the capacitor controls a potential applied to a gate of the reading transistor. The writing transistor controls writing and erasing of data and, when the transistor is off, has small current so that loss of electric charges stored in the capacitor, which is due to leakage current of the writing transistor, can be prevented. A semiconductor layer included in the writing transistor is provided so as to extend from the gate electrode toward a source region of the reading transistor. The capacitor is provided to overlap with the gate electrode of the reading transistor.Type: GrantFiled: November 10, 2011Date of Patent: November 5, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yasuyuki Arai
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Patent number: 8575740Abstract: An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.Type: GrantFiled: September 14, 2012Date of Patent: November 5, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yasuyuki Arai, Yuko Tachimura, Yohei Kanno, Mai Akiba
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Publication number: 20130285031Abstract: A light emitting device having a plastic substrate is capable of preventing the substrate from deterioration with the transmission of oxygen or moisture content. The light emitting device has light emitting elements formed between a lamination layer and an inorganic compound layer that transmits visual light, where the lamination layer is constructed of one unit or two or more units, and each unit is a laminated structure of a metal layer and an organic compound layer. Alternatively, each unit is a laminated structure of a metal layer and an organic compound layer, wherein the inorganic compound layer is formed so as to cover the end face of the lamination layer. In the present invention, the lamination layer is formed on the primary surface of the plastic substrate, so that a flexible substrate structure can be obtained.Type: ApplicationFiled: July 1, 2013Publication date: October 31, 2013Inventors: Shunpei YAMAZAKI, Yasuyuki Arai
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Patent number: 8563979Abstract: In a liquid crystal display device, a first substrate includes electrical wirings and a semiconductor integrated circuit which has TFTs and is connected electrically to the electrical wirings, and a second substrate includes a transparent conductive film on a surface thereof. A surface of the first substrate that the electrical wirings are formed is opposite to the transparent conductive film on the second substrate. Also, in a liquid crystal display device, a first substrate includes a matrix circuit and a peripheral driver circuit, and a second substrate is opposite to the first substrate. Spacers are provided between the first and second substrates. A seal material is formed outside the matrix circuits and the peripheral driver circuits in the first and second substrates. A protective film is formed on the peripheral driver circuit has substantially a thickness equivalent to an interval between the substrates which is formed by the spacers.Type: GrantFiled: September 2, 2011Date of Patent: October 22, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Setsuo Nakajima, Yasuyuki Arai
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Patent number: 8557614Abstract: An object is to provide a method for manufacturing a lighting device, in which a problem of a short circuit between an upper electrode and a lower electrode of a light-emitting element is solved without reducing a light-emitting property of a normal portion of the light-emitting element to the utmost. In a light-emitting element including an upper electrode, an electroluminescent layer, and a lower electrode, a short-circuited portion that is undesirably formed between the upper electrode and the lower electrode is irradiated with a laser beam, whereby a region where the short-circuited portion is removed is formed, and then the region is filled with an insulating resin having a light-transmitting property. Thus, the problem of the short circuit between the upper electrode and the lower electrode is solved and yield of a lighting device is improved.Type: GrantFiled: December 23, 2011Date of Patent: October 15, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Naoto Kusumoto