Patents by Inventor Yasuyuki Arai

Yasuyuki Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8305213
    Abstract: Since the chip formed from a silicon wafer is thick, the chip is protruded from the surface or the chip is so large that it can be seen through the eyes, which affects the design of a business card or the like. Hence, it is an object of the present invention to provide a new integrated circuit which has a structure by which the design is not affected. In view of the above problems, it is a feature of the invention to equip a film-like article with a thin film integrated circuit. It is another feature of the invention that the IDF chip has a semiconductor film of 0.2 mm or less, as an active region. Therefore, the IDF chip can be made thinner as compared with a chip formed from a silicon wafer. In addition, such an integrated circuit can have light transmitting characteristic unlike a chip formed from a silicon wafer.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: November 6, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Mai Akiba, Yohei Kanno, Yuko Tachimura
  • Patent number: 8305509
    Abstract: A liquid crystal display device with improved productivity and a manufacturing method of the same. A liquid crystal display device according to the invention comprises in a region in which a scan line and a data line intersect with each other a first substrate comprising a first thin film transistor using either an amorphous semiconductor or an organic semiconductor for a channel portion, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, and a third substrate comprising a second thin film transistor using a crystalline semiconductor for a channel portion.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: November 6, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Yasuko Watanabe
  • Publication number: 20120276690
    Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 1, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Keiichi SEKIGUCHI, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
  • Patent number: 8300201
    Abstract: A pixel TFT formed in a pixel region is formed on a first substrate by a channel etch type reverse stagger type TFT, and patterning of a source region and a drain region, and patterning of a pixel electrode are performed by the same photomask. A driver circuit formed by using TFTs having a crystalline semiconductor layer, and an input-output terminal dependent on the driver circuit, are taken as one unit. A plurality of units are formed on a third substrate, and afterward the third substrate is partitioned into individual units, and the obtained stick drivers are mounted on the first substrate.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: October 30, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Hideaki Kuwabara
  • Patent number: 8297518
    Abstract: Although a product having such the IC chip has been diffused, information on the product may be capable of being perceived, abstracted, falsified, or the like by a third person with his external device during distribution of the product or after purchase of the product. Further, privacy may be seriously infringed. Paper money, various products, and the like are disclosed according to the present invention with an integrated circuit device having a switching memory for controlling reading and writing of information (lock/unlock of information) in order to protect the information recorded and stored in the integrated circuit such as an IC chip installed to the product or the like.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: October 30, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai, Yohei Kanno
  • Publication number: 20120256896
    Abstract: It is an object to achieve downsizing and a thin shape of a display module and an electronic device provided with the display module. The display module includes a first display panel in which a first display screen is formed on one main side; and a second display panel that is smaller than and overlapped with the first display panel, in which a second display screen is formed on an opposite side of the one main side. The display module includes, over a sealing substrate of the first display panel and/or the second display panel, at least one integrated circuit, which is connected to input terminals of the first display panel and the second display panel and controls operation of the both panels, arranged in a peripheral portion of the second display panel, which is a surface on an opposite side of a display surface of the first display panel.
    Type: Application
    Filed: June 22, 2012
    Publication date: October 11, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Atsushi Umezaki, Yasuyuki Arai
  • Patent number: 8283679
    Abstract: The present invention provides a semiconductor device having an integrated circuit formed by a low cost glass substrate, which can respond to the increase of an amount of information, and which offers high performance at high speed.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: October 9, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Ryoji Nomura, Hiroko Abe, Mikio Yukawa, Yasuyuki Arai
  • Publication number: 20120249497
    Abstract: At least two TFTs which are connected with a light emitting element are provided, crystallinities of semiconductor regions composing active layers of the respective TFTs are made different from each other. As the semiconductor region, a region obtained by crystallizing an amorphous semiconductor film by laser annealing is applied. In order to change the crystallinity, a method of changing a scan direction of a continuous oscillating laser beam so that crystal growth directions are made different from each other is applied. Alternatively, a method of changing a channel length direction of TFT between the respective semiconductor regions without changing the scan direction of the continuous oscillating laser beam so that a crystal growth direction and a current flowing direction are different from each other is applied.
    Type: Application
    Filed: June 11, 2012
    Publication date: October 4, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8269225
    Abstract: An object of the invention is to provide a lighting device which can suppress luminance nonuniformity in a light emitting region when the lighting device has large area. A layer including a light emitting material is formed between a first electrode and a second electrode, and a third electrode is formed to connect to the first electrode through an opening formed in the second electrode and the layer including a light emitting material. An effect of voltage drop due to relatively high resistivity of the first electrode can be reduced by electrically connecting the third electrode to the first electrode through the opening.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: September 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuyuki Arai
  • Publication number: 20120227664
    Abstract: A technique capable of efficient, high speed processing for the formation of an organic compound layer by using an ink jet method is provided. In the method of forming an organic compound layer by using the ink jet method, a composition containing an organic compound having light emitting characteristics is discharged from an ink head, forming a continuous organic compound layer. The organic compound layer is formed on pixel electrodes aligned in a matrix shape, and is formed in a continuous manner over a plurality of pixel electrodes. A light emitting device is manufactured using organic light emitting elements in accordance with this manufacturing method.
    Type: Application
    Filed: May 22, 2012
    Publication date: September 13, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
  • Patent number: 8263983
    Abstract: The present invention provides a thin wiring pattern such as wiring formed by discharging a droplet. In the present invention, a porous (including microporous) substance is formed as a base film in forming pattern by using a droplet discharge method (also referred to as an ink-jetting method). One feature of a wiring substrate according to the present invention provides a porous film and a conductive layer thereon. One feature of a semiconductor device of the present invention provides a thin film transistor in which a gate electrode is formed by the conductive layer having the above-described structure.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: September 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinji Maekawa, Yasuyuki Arai
  • Patent number: 8258025
    Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Yasuyuki Arai, Takayuki Inoue, Erumu Kikuchi
  • Publication number: 20120220062
    Abstract: To sophisticate a portable electronic appliance without hindering reduction of the weight and the size, more specifically, to sophisticate a liquid crystal display apparatus installed in a portable electronic appliance without hindering the mechanical strength, a liquid crystal display apparatus includes a first plastic substrate, a light-emitting device which is disposed over the first plastic substrate, resin which covers the light-emitting device, an insulating film which is in contact with the resin, a semiconductor device which is in contact with the insulating film, a liquid crystal cell which is electrically connected to the semiconductor device, and a second plastic substrate, wherein the semiconductor device and the liquid crystal cell are disposed between the first plastic substrate and the second plastic substrate.
    Type: Application
    Filed: May 8, 2012
    Publication date: August 30, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO, Akio ENDO, Yasuyuki ARAI
  • Patent number: 8242508
    Abstract: A semiconductor device includes a thin film transistor. The thin film transistor includes a semiconductor film over a substrate, in which the semiconductor film includes a pair of first regions, a pair of second regions interposed between the pair of first regions, and a channel formation region interposed between the pair of second regions. A concentration of an impurity in the pair of second regions is smaller than a concentration of the impurity in the pair of first regions. The thin film transistor includes an insulating film, in which a portion of the insulating film is provided over the semiconductor film. The thin film transistor includes a conductive film over the portion, and the conductive film includes a taper shape.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: August 14, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takashi Hamada, Yasuyuki Arai
  • Patent number: 8237569
    Abstract: When a product attached with an ID tag is placed inside a package body, there is a risk that communication with an ID tag using a reader/writer is blocked. Then, it is difficult to manage products in a distribution process of products, which leads to lose convenience of ID tags. One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: August 7, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Mai Akiba, Yuko Tachimura, Yohei Kanno
  • Patent number: 8236633
    Abstract: The present invention provides a method for manufacturing a semiconductor device, by which a transistor including an active layer, a gate insulating film in contact with the active layer, and a gate electrode overlapping the active layer with the gate insulating film therebetween is provided; an impurity is added to a part of a first region overlapped with the gate electrode with the gate insulating film therebetween in the active layer and a second region but the first region in the active layer by adding the impurity to the active layer from one oblique direction; and the second region is situated in the one direction relative to the first region.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: August 7, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keiichi Sekiguchi, Junichi Koezuka, Yasuyuki Arai, Shunpei Yamazaki
  • Publication number: 20120193694
    Abstract: The present invention provides a wireless chip having high mechanical strength. Moreover, the present invention also provides a wireless chip which can prevent an electric wave from being blocked. In a wireless chip of the present invention, a layer having a thin film transistor formed over an insulating substrate is fixed to an antenna by an anisotropic conductive adhesive, and the thin film transistor is connected to the antenna. The antenna has a dielectric layer, a first conductive layer, and a second conductive layer; the first conductive layer and the second conductive layer has the dielectric layer therebetween; the first conductive layer serves as a radiating electrode; and the second electrode serves as a ground contact body.
    Type: Application
    Filed: April 12, 2012
    Publication date: August 2, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukie SUZUKI, Yasuyuki ARAI, Shunpei YAMAZAKI
  • Publication number: 20120194756
    Abstract: The number of photolithography steps used for manufacturing a transistor is reduced to less than the conventional one and a highly reliable semiconductor device is provided. The present invention relates to a semiconductor device including a circuit including a transistor having an oxide semiconductor layer over a first substrate and a second substrate fixed to the first substrate with a sealant. A closed space surrounded by the sealant, the first substrate, and the second substrate is in a reduced pressure state or filled with dry air. The sealant surrounds at least the transistor and has a closed pattern shape. Further, the circuit is a driver circuit including a transistor having an oxide semiconductor layer.
    Type: Application
    Filed: January 24, 2012
    Publication date: August 2, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masahiko HAYAKAWA, Yuta MORIYA, Junya GOTO, Yasuyuki ARAI
  • Patent number: 8232621
    Abstract: When letters are written with a ballpoint pen, pen pressure is greater than or equal to 10 MPa. The IC tag embedded in the paper base material is required to withstand such pen pressure. An integrated circuit including a functional circuit which transmits and receive, performs arithmetic of, and stores information is thinned, and also, when the integrated circuit and a structural body provided with an antenna or a wiring are attached, a second structural body formed of ceramics or the like is also attached to at the same time. When the second structural body formed of ceramics or the like is used, resistance to pressing pressure or bending stress applied externally can be realized. Further, a part of passive elements included in the integrated circuit can be transferred to the second structural body, which leads to reduction in area of the semiconductor device.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: July 31, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8232555
    Abstract: It is an object of the present invention to provide a device suitable for new usage by making use of a semiconductor device such as an RFID tag in terms of the capability to transmit and receive data without being contacted therewith, to decrease a burden on a user, and to improve convenience. A semiconductor device is provided to have an arithmetic processing circuit including a transistor, a conductive layer serving as an antenna, a detecting unit having a means for detecting physical quantity or chemical quantity, and a storage unit for storing data detected by the detecting unit, and to cover the arithmetic processing circuit, the conductive layer, the detecting unit, and the storage unit with a protective layer. In addition, diverse information can be monitored and controlled by providing such a semiconductor device for human beings, animals and plants, or the like without being contacted therewith.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: July 31, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yumiko Noda, Yasuyuki Arai, Yasuko Watanabe, Yoshitaka Moriya, Shunpei Yamazaki