Patents by Inventor Yen-An Chang
Yen-An Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11982944Abstract: A method of lithography process is provided. The method includes forming a conductive layer over a reticle. The method includes applying ionized particles to the reticle by a discharging device. The method includes forming a photoresist layer over a semiconductor substrate. The method includes securing the semiconductor substrate by a wafer electrostatic-clamp. The method also includes patterning the photoresist layer by emitting radiation from a radiation source via the reticle.Type: GrantFiled: May 31, 2023Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsiao-Lun Chang, Chueh-Chi Kuo, Tsung-Yen Lee, Tzung-Chi Fu, Li-Jui Chen, Po-Chung Cheng, Che-Chang Hsu
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Patent number: 11982936Abstract: A method of fabricating a photomask includes selectively exposing portions of a photomask blank to radiation to change an optical property of the portions of the photomask blank exposed to the radiation, thereby forming a pattern of exposed portions of the photomask blank and unexposed portions of the photomask blank. The pattern corresponds to a pattern of semiconductor device features.Type: GrantFiled: June 30, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Chang Lee, Ping-Hsun Lin, Yen-Cheng Ho, Chih-Cheng Lin, Chia-Jen Chen
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Publication number: 20240153843Abstract: A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.Type: ApplicationFiled: January 17, 2024Publication date: May 9, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Yen Hsieh, Chih-Horng Chang, Chung-Yu Lu
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Patent number: 11980040Abstract: A semiconductor device includes a substrate; a memory array over the substrate, the memory array including first magnetic tunnel junctions (MTJs), where the first MTJs are in a first dielectric layer over the substrate; and a resistor circuit over the substrate, the resistor circuit including second MTJs, where the second MTJs are in the first dielectric layer.Type: GrantFiled: June 14, 2021Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tai-Yen Peng, Tsung-Hsien Chang, Yu-Shu Chen, Chih-Yuan Ting, Jyu-Horng Shieh, Chung-Te Lin
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Patent number: 11978492Abstract: The disclosed system and method reduce on-chip power IR drop caused by large write current, to increase the write IO number or improve write throughput and to suppress write voltage ripple at the start and end of a write operation. The disclosed systems and methods are described in relation to stabilizing the bit line voltage for MRAMs, however, the disclosed systems and methods can be used to stabilize the bit line voltage of any memory configuration that draws large currents during short write pulses or, more generally, to selectively assist a power supply generator in supplying adequate power to a load at times of large power consumption.Type: GrantFiled: May 5, 2022Date of Patent: May 7, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-An Chang, Po-Hao Lee, Yi-Chun Shih
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Patent number: 11978570Abstract: An antioxidant conductive thermal paste and a method of manufacturing the same are provided. The antioxidant conductive thermal paste includes a reactive monomer, a thermosetting resin, a polymerization inhibitor, an electrically conductive filler, and a thixotropic agent. The method consists of the steps of mixing a reactive monomer, a thermosetting resin, and a polymerization inhibitor evenly to get a first polymer mixture, and adding an electrically conductive filler and a thixotropic agent into the first polymer mixture in turn and blending the mixture evenly to obtain an antioxidant conductive thermal paste with good adherence, high electrical conductivity, high thermal conductivity, improved thermal-mechanical fatigue resistance or mechanical fatigue resistance.Type: GrantFiled: August 21, 2023Date of Patent: May 7, 2024Assignee: Geckos Technology Corp.Inventors: Wei-Chen Chang, Chen-Yen Fan, Ping-Hung Chen, Tsung-Huan Sheng
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Publication number: 20240142361Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.Type: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Inventors: YEN-CHANG CHU, CHENG-NAN TSAI, CHIH-MING SUN
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Patent number: 11969752Abstract: The present invention discloses an organic polymer film and a manufacturing method thereof. The organic polymer film is mainly manufactured by the following steps. Firstly, the step (A) provides a xylene precursor and a substrate, and the step (B) places the substrate inside of a plasma equipment. After that, the step (C) evacuates the plasma equipment while introducing a carrier gas which carries vapor of the xylene precursor, and the step (D) turns on a pulse power supply system of the plasma equipment, generating a short pulse for plasma ignition. Finally, the step (E) forms the organic polymer film on the substrate. In the aforementioned steps, the frequency of the short pulse plasma is between 1 Hz˜10,000 Hz, and the pulse period of the short pulse plasma is between 1 ?s˜60 ?s.Type: GrantFiled: December 17, 2021Date of Patent: April 30, 2024Assignee: FENG CHIA UNIVERSITYInventors: Ping-Yen Hsieh, Xuan-Xuan Chang, Ying-Hung Chen, Chu-Liang Ho
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Patent number: 11974367Abstract: A lighting device includes a light board and a light dimmer circuit. The light board includes multiple first light emitting elements and second light emitting elements. The first light emitting elements are disposed in a first area of the light board. The second light emitting elements are disposed in a second area of the light board. The light dimmer circuit is configured to drive the second light emitting elements to generate flickering lights from the second area of the light board, and is configured to drive the first light emitting elements to generate non-flickering lights from the first area of the light board.Type: GrantFiled: October 4, 2022Date of Patent: April 30, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Chih-Hsien Wang, Ming-Chieh Cheng, Po-Yen Chen, Shih-Chieh Chang, Kuan-Hsien Tu, Xiu-Yi Lin, Ling-Chun Wang
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Patent number: 11964212Abstract: A game board device is provided for carrying and identifying game pieces that are divided into different piece types. The game board device includes a board, a plurality of optically identifying modules, and a processing module electrically coupled to the optically identifying modules. The optically identifying modules respectively correspond in position to detection regions of the board. Each of the optically identifying modules includes a light emitter that can emit light toward the corresponding detection region and a light receiver that can receive light reflected by the corresponding detection region. When any one of the detection regions is in an unoccupied mode, the corresponding optically identifying module can emit an unoccupied signal. When any one of the detection regions is in an occupied mode, the corresponding optically identifying module enables an identification signal that corresponds to the piece type of the corresponding game piece to be emitted therefrom.Type: GrantFiled: December 28, 2021Date of Patent: April 23, 2024Assignee: PIXART IMAGING INC.Inventors: Chung-Ting Yang, Yen-Min Chang, Yen-Chang Wang
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Patent number: 11964189Abstract: A training device includes a force receiving component, a location detector, a resistance generator, and a controller. The force receiving component moves along a closed trajectory. The location detector is configured to detect a location of the force receiving component in the closed trajectory and to output a location signal. The resistance generator is configured to exert a resistance on the force receiving component. The controller controls the resistance generator to adjust the resistance based on the location signal.Type: GrantFiled: November 6, 2020Date of Patent: April 23, 2024Assignee: WISTRON CORPORATIONInventors: Chuan-Yen Kao, Yao-Tsung Chang, Chih-Yang Hung
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Publication number: 20240128252Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.Type: ApplicationFiled: October 17, 2022Publication date: April 18, 2024Inventors: TZU-WEI CHIU, CHUN-WEI CHANG, SHANG-PIN CHEN, WEI-CHIH CHEN, CHE-YEN HUANG
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Publication number: 20240126002Abstract: A backlight module includes a light source, a first prism sheet disposed on the light source, and a light type adjustment sheet disposed on a side of the first prism sheet away from the light source and including a base and multiple light type adjustment structures. The multiple light type adjustment structures are disposed on the first surface of the base. Each light type adjustment structure has a first structure surface and a second structure surface connected to each other. The first structure surface of each light type adjustment structure and the first surface of the base form a first base angle therebetween, and the second structure surface of each light type adjustment structure and the first surface of the base form a second base angle therebetween. The angle of the first base angle is different from the angle of the second base angle.Type: ApplicationFiled: October 2, 2023Publication date: April 18, 2024Applicant: Coretronic CorporationInventors: Chih-Jen Tsang, Chung-Wei Huang, Shih-Yen Cheng, Jung-Wei Chang, Han-Yuan Liu, Chun-Wei Lee
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Patent number: 11961629Abstract: An antioxidant conductive thermal paste and a method of manufacturing the same are provided. The antioxidant conductive thermal paste includes a reactive monomer, a thermosetting resin, a polymerization inhibitor, an electrically conductive filler, and a thixotropic agent. The method consists of the steps of mixing a reactive monomer, a thermosetting resin, and a polymerization inhibitor evenly to get a first polymer mixture, and adding an electrically conductive filler and a thixotropic agent into the first polymer mixture in turn and blending the mixture evenly to obtain an antioxidant conductive thermal paste with good adherence, high electrical conductivity, high thermal conductivity, improved thermal-mechanical fatigue resistance or mechanical fatigue resistance.Type: GrantFiled: December 8, 2022Date of Patent: April 16, 2024Assignee: Geckos Technology Corp.Inventors: Wei-Chen Chang, Chen-Yen Fan, Ping-Hung Chen, Tsung-Huan Sheng
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Publication number: 20240120430Abstract: A method of forming infrared detector includes the following operations. A sensing structure including a first infrared absorption layer, a first protection layer, a second infrared absorption layer, and a second protection layer from bottom to top is received. A patterned photoresist layer is formed on the sensing structure, in which the patterned photoresist layer has a first opening exposing the second protection layer. The second protection layer is etched through the first opening to form a second opening in the second protection layer, in which the second opening exposes the second infrared absorption layer. The patterned photoresist layer is removed. The second infrared absorption layer and the first protection layer are etched through the second opening to form a third opening, in which the third opening exposes the first infrared absorption layer. An electrode is formed in the third opening.Type: ApplicationFiled: February 16, 2023Publication date: April 11, 2024Inventor: Yen-Chang CHEN
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Publication number: 20240120282Abstract: The present application discloses a semiconductor structure and methods for manufacturing semiconductor structures. The semiconductor structure includes a plurality of bottom dies and a top die stacked on the bottom dies. The bottom dies receive power supplies through tiny through silicon vias (TSVs) formed in backside substrates of the bottom dies, while the top die receives power supplies through dielectric vias (TDVs) formed in a dielectric layer that covers the bottom dies. By enabling backside power delivery to the bottom die, more space can be provided for trace routing between stacked dies. Therefore, greater computation capability can be achieved within a smaller chip area with less power loss.Type: ApplicationFiled: February 20, 2023Publication date: April 11, 2024Inventors: TZU-WEI CHIU, CHUN-WEI CHANG, SHANG-PIN CHEN, WEI-CHIH CHEN, CHE-YEN HUANG
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Patent number: 11955441Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.Type: GrantFiled: March 28, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jian-Hong Lin, Kuo-Yen Liu, Hsin-Chun Chang, Tzu-Li Lee, Yu-Ching Lee, Yih-Ching Wang
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Publication number: 20240112707Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.Type: ApplicationFiled: December 15, 2023Publication date: April 4, 2024Applicant: Etron Technology, IncInventors: Der-Min Yuan, Yen-An Chang, Wei-Ming Huang
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Publication number: 20240112870Abstract: A backlight module for a lighting keyboard comprises a lighting board including light emitting units, a light guide panel disposed on the lighting board and including light guide holes, and a shielding sheet disposed on the light guide panel. Each light emitting unit is located in each light guide hole. The backlight module is divided into regions including a middle region and two first side regions located outside the middle region. The light guide holes include at least one middle light guide hole in the middle region and at least one first light guide hole in the first side region. A distance between a light emitting unit located in the middle light guide hole and a wall of the middle light guide hole is lesser than a distance between a light emitting unit located in the first light guide hole and a wall of the first light guide hole.Type: ApplicationFiled: September 28, 2023Publication date: April 4, 2024Applicant: Darfon Electronics Corp.Inventors: Yen-Chang CHEN, Heng-Yi HUANG
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Publication number: 20240113071Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao