Patents by Inventor Yen-Hao Chen
Yen-Hao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10219366Abstract: A multilayer printed circuit board includes an inner circuit layer, a first outer circuit layer, a second outer circuit layer, a via, and a layer of high dielectric dissipation solder resist ink. The first outer circuit layer includes a first trace for transmitting a high frequency signal. The inner circuit layer includes a second trace, and is formed between the first outer circuit layer and the second outer circuit layer. The via is formed from the first outer circuit layer to the second outer circuit layer, and is coupled to the first trace and the second trace. The second trace is coupled to the first trace through the via for transmitting the high frequency signal. The layer of high dielectric dissipation solder resist ink is formed on a terminal of the open stub of the via exposed outside of the second outer circuit layer.Type: GrantFiled: January 8, 2018Date of Patent: February 26, 2019Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Chun-I Tseng, Mu-Chih Chuang, Wei-Fan Ting, Yen-Hao Chen
-
Publication number: 20180341175Abstract: Resist materials having enhanced sensitivity to radiation are disclosed herein, along with methods for lithography patterning that implement such resist materials. An exemplary resist material includes a polymer, a sensitizer, and a photo-acid generator (PAG). The sensitizer is configured to generate a secondary radiation in response to the radiation. The PAG is configured to generate acid in response to the radiation and the secondary radiation. The PAG includes a sulfonium cation having a first phenyl ring and a second phenyl ring, where the first phenyl ring is chemically bonded to the second phenyl ring.Type: ApplicationFiled: August 6, 2018Publication date: November 29, 2018Inventors: Yen-Hao Chen, Wei-Han Lai, Chien-Wei Wang, Chin-Hsiang Lin
-
Publication number: 20180318836Abstract: The present disclosure relates to a microfluidic-based analyzer, including a drive module and a microfluidic disc. On the microfluidic disk, a capillary is connected between a mixing chamber and a waste chamber. More particularly, the capillary is connected to the mixing chamber through a first access on the first radius of the microfluidic disc, and the capillary is connected to the waste chamber through a second access on the second radius of the microfluidic disk. Specifically, a turn of the capillary is disposed between the first access and the second access, in which a folding is configured on a third radius of the microfluidic disc. Overall, the aforementioned microfluidic-based analyzer is able to be operated in different rotational speeds and is capable of evacuating the mixing chamber and enhancing the washing efficiency.Type: ApplicationFiled: May 3, 2018Publication date: November 8, 2018Inventors: CHIH-HSIN SHIH, HO-CHIN WU, YEN-HAO CHEN
-
Patent number: 10042252Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a photoresist layer over a substrate, wherein the photoresist layer includes a polymer, a sensitizer, and a photo-acid generator (PAG), wherein the PAG includes a first phenyl ring and a second phenyl ring both chemically bonded to a sulfur, the first and second phenyl rings being further chemically bonded with enhanced sensitivity; performing an exposing process to the photoresist layer; and developing the photoresist layer, thereby forming a patterned photoresist layer.Type: GrantFiled: January 23, 2017Date of Patent: August 7, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Hao Chen, Wei-Han Lai, Chien-Wei Wang, Chin-Hsiang Lin
-
Publication number: 20180149971Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a photoresist layer over a substrate, wherein the photoresist layer includes a polymer, a sensitizer, and a photo-acid generator (PAG), wherein the PAG includes a first phenyl ring and a second phenyl ring both chemically bonded to a sulfur, the first and second phenyl rings being further chemically bonded with enhanced sensitivity; performing an exposing process to the photoresist layer; and developing the photoresist layer, thereby forming a patterned photoresist layer.Type: ApplicationFiled: January 23, 2017Publication date: May 31, 2018Inventors: Yen-Hao Chen, Wei-Han Lai, Chien-Wei Wang, Chin-Hsiang Lin
-
Patent number: 9983474Abstract: The present disclosure is directed to a photoresist and a method of performing a lithography process using the photoresist. The photoresist contains a polymer and a photo-acid generator. The photo-acid generator contains a sensitizer component, an acid generator component, and a bonding component that bonds the sensitizer component to the acid generator component. The bonding component may be either a single bond or a conjugated bond. The lithography process may be an EUV lithography process or an e-beam lithography process.Type: GrantFiled: September 11, 2015Date of Patent: May 29, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Hao Chen, Chien-Wei Wang
-
Publication number: 20170307803Abstract: A display apparatus including an image unit, a light source module and a transparent plate is provided. The image unit has an image display surface which includes a first side and a second side opposite to the first side. The light source module is disposed at the first side of the image display surface, and adapted to serve as a front light source of the image unit to provide a light beam to the image display surface. The transparent plate is disposed above the image display surface.Type: ApplicationFiled: March 3, 2017Publication date: October 26, 2017Applicant: Young Lighting Technology Inc.Inventors: Hsin-Hung Lee, Yen-Hao Chen, Chao-Chun Cheng, Chiao-Chih Yang, Huei-Tzu Lin
-
Publication number: 20170075216Abstract: The present disclosure is directed to a photoresist and a method of performing a lithography process using the photoresist. The photoresist contains a polymer and a photo-acid generator. The photo-acid generator contains a sensitizer component, an acid generator component, and a bonding component that bonds the sensitizer component to the acid generator component. The bonding component may be either a single bond or a conjugated bond. The lithography process may be an EUV lithography process or an e-beam lithography process.Type: ApplicationFiled: September 11, 2015Publication date: March 16, 2017Inventors: Yen-Hao Chen, Chien-Wei Wang
-
Publication number: 20170017158Abstract: One of the broader forms of the present disclosure relates to a method of making a semiconductor device. The method includes exposing a photoresist layer to a radiation source and applying a hardening agent to the photoresist layer. Therefore after applying the hardening agent a first portion of the photoresist layer has a higher glass transition temperature, higher mechanical strength, than a second portion of the photoresist layer.Type: ApplicationFiled: July 17, 2015Publication date: January 19, 2017Inventors: Ya-Ling Cheng, Ching-Yu Chang, Chien-Wei Wang, Yen-Hao Chen
-
Patent number: 9543147Abstract: A system and method for anti-reflective layers is provided. In an embodiment the anti-reflective layer comprises a floating additive in order to form a floating additive region along a top surface of the anti-reflective layer after the anti-reflective layer has dispersed. The floating additive may comprise an additive group which will decompose along with a fluorine unit bonded to the additive group which will decompose. Additionally, adhesion between the middle layer and the photoresist may be increased by applying an adhesion promotion layer using either a deposition process or phase separation, or a cross-linking may be performed between the middle layer and the photoresist.Type: GrantFiled: September 9, 2015Date of Patent: January 10, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yu Liu, Ching-Yu Chang, Chien-Chih Chen, Yen-Hao Chen
-
Patent number: 9188608Abstract: An analysis method for a signal time margin is provided. An input signal is received. The input signal is extracted to obtain a primary waveform, at least one first secondary waveform and at least one second secondary waveform of the input signal. The first secondary waveform and the second secondary waveform are respectively located before and after the primary waveform. Quantities of the first secondary waveform and the second secondary waveform are counted to respectively generate a first quantity and a second quantity. According to the first quantity, the primary waveform and the first secondary waveform, first bit combinations are generated, and according to the second quantity, the primary waveform and the second secondary waveform, second bit combinations are generated. The first and second bit combinations are integrated to generate third bit combinations. Signal analysis is performed on the third bit combinations to obtain a signal time margin.Type: GrantFiled: March 8, 2013Date of Patent: November 17, 2015Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATIONInventor: Yen-Hao Chen
-
Patent number: 8915637Abstract: A light source module including a light guide plate, a plurality of light emitting devices, and a plurality of first reflective devices is provided. The light guide plate has a plurality of through holes and a light emitting surface. The through holes pass through the light emitting surface. Each of the through holes has a first side wall and a second side wall opposite the first side wall. At least one of the light emitting devices is disposed in each of the through holes. Each of the light emitting devices is capable emitting a light beam. The light beam enters the light guide plate from the first side wall of the through hole which the light emitting device is disposed in and leaves the light guide plate from the light emitting surface. The first reflective devices are disposed on the second side walls of the through holes.Type: GrantFiled: March 20, 2013Date of Patent: December 23, 2014Assignee: Young Lighting Technology Inc.Inventors: Chiao-Chih Yang, Chao-Chun Cheng, Hsin-Hung Lee, Wei-Ching Wu, Yen-Hao Chen
-
Publication number: 20140117973Abstract: An analysis method for a signal time margin is provided. An input signal is received. The input signal is extracted to obtain a primary waveform, at least one first secondary waveform and at least one second secondary waveform of the input signal. The first secondary waveform and the second secondary waveform are respectively located before and after the primary waveform. Quantities of the first secondary waveform and the second secondary waveform are counted to respectively generate a first quantity and a second quantity. According to the first quantity, the primary waveform and the first secondary waveform, first bit combinations are generated, and according to the second quantity, the primary waveform and the second secondary waveform, second bit combinations are generated. The first and second bit combinations are integrated to generate third bit combinations. Signal analysis is performed on the third bit combinations to obtain a signal time margin.Type: ApplicationFiled: March 8, 2013Publication date: May 1, 2014Applicants: INVENTEC CORPORATION, INVENTEC (PUDONG) TECHNOLOGY CORPORATIONInventor: Yen-Hao Chen
-
Publication number: 20130286685Abstract: A light source module including a light guide plate, a plurality of light emitting devices, and a plurality of first reflective devices is provided. The light guide plate has a plurality of through holes and a light emitting surface. The through holes pass through the light emitting surface. Each of the through holes has a first side wall and a second side wall opposite the first side wall. At least one of the light emitting devices is disposed in each of the through holes. Each of the light emitting devices is capable emitting a light beam. The light beam enters the light guide plate from the first side wall of the through hole which the light emitting device is disposed in and leaves the light guide plate from the light emitting surface. The first reflective devices are disposed on the second side walls of the through holes.Type: ApplicationFiled: March 20, 2013Publication date: October 31, 2013Applicant: YOUNG LIGHTING TECHNOLOGY INC.Inventors: Chiao-Chih Yang, Chao-Chun Cheng, Hsin-Hung Lee, Wei-Ching Wu, Yen-Hao Chen
-
Patent number: 8050044Abstract: A power plane includes a first circuit region and a second circuit region. The length of the first circuit region or second circuit region is related to the noise frequency to be filtered out. The width of the first circuit region can be wider or narrower than the width of the second circuit region. While manufacturing the power plane, a predetermined length is decided according to the resonance frequency of an original power plane, then the proposed power plane is formed with the first circuit region and the second circuit region of a predetermined length, and making the width of the first circuit region wider or narrower than the width of the second circuit region, such that the noises with the resonance frequency can be mitigated.Type: GrantFiled: August 31, 2007Date of Patent: November 1, 2011Assignee: Inventec CorporationInventor: Yen-Hao Chen
-
Publication number: 20090058560Abstract: A power plane includes a first circuit region and a second circuit region. The length of the first circuit region or second circuit region is related to the noise frequency to be filtered out. The width of the first circuit region can be wider or narrower than the width of the second circuit region. While manufacturing the power plane, a predetermined length is decided according to the resonance frequency of an original power plane, then the proposed power plane is formed with the first circuit region and the second circuit region of a predetermined length, and making the width of the first circuit region wider or narrower than the width of the second circuit region, such that the noises with the resonance frequency can be mitigated.Type: ApplicationFiled: August 31, 2007Publication date: March 5, 2009Inventor: Yen-Hao Chen
-
Patent number: 7449641Abstract: A high-speed signal transmission structure having parallel disposed and serially connected vias is disclosed. The structure is applicable to a multi-layered circuit board such as a high-speed digital circuit board for forming a high-speed signal transmission circuit on the high-speed digital circuit board. The structure includes a pair of parallel disposed and serially connected vias for connecting an upper conductive circuit installed on an upper layer of the multi-layered circuit board and a lower conductive circuit installed on a lower layer of the multi-layered circuit board. Compared with the prior art, an open stub formed by the remaining portion of the vias has become shorter, thereby reducing a resonance effect affecting the quality of signal transmission.Type: GrantFiled: July 24, 2006Date of Patent: November 11, 2008Assignee: Inventec CorporationInventor: Yen-Hao Chen
-
Publication number: 20080158840Abstract: A DC power plane structure applied in multi-layer circuit board is provided. The DC power plane structure includes a first circuit area for receiving a DC power, a noise filter with one end electrically connected to a DC power output end of the first circuit area, and a second circuit area which is electrically isolated from the first circuit area. The second circuit area has a band gap structure, and the DC power input end of the band gap structure is electrically connected to the other end of the noise filter for inhibiting high-frequency noise generated between layers of the multi-layer circuit board.Type: ApplicationFiled: December 27, 2006Publication date: July 3, 2008Applicant: INVENTEC CORPORATIONInventors: Yen-Hao Chen, Chun-Yu Lai
-
Patent number: D754147Type: GrantFiled: May 27, 2014Date of Patent: April 19, 2016Assignee: Acer IncorporatedInventors: Yen-Hao Chen, Ching-Chih Chang, Zheng-Yan Lee, Shu-Han Wang, Pin-Hsun Huang
-
Patent number: D756406Type: GrantFiled: July 7, 2014Date of Patent: May 17, 2016Assignee: Acer IncorporatedInventors: Yen-Hao Chen, Ching-Chih Chang, Zheng-Yan Lee, Shu-Han Wang, Pin-Hsun Huang